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| author | Theodore Ateba <tf.ateba@gmail.com> | 2017-09-01 22:42:58 +0000 |
|---|---|---|
| committer | Theodore Ateba <tf.ateba@gmail.com> | 2017-09-01 22:42:58 +0000 |
| commit | 4658591470f6776a18edf15625b31dbaef14a1b9 (patch) | |
| tree | ef17d26b6e717e9ef47e5392b53c81239cec9e7f /os/hal/ports/AVR/MEGA/LLD/SPIv1/hal_spi_lld.h | |
| parent | f0dd706419939527c5d040fc103b9582a0b9a31f (diff) | |
| download | ChibiOS-4658591470f6776a18edf15625b31dbaef14a1b9.tar.gz ChibiOS-4658591470f6776a18edf15625b31dbaef14a1b9.tar.bz2 ChibiOS-4658591470f6776a18edf15625b31dbaef14a1b9.zip | |
Fixed SPI interruption enable, driver restart with different configuration.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10522 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/AVR/MEGA/LLD/SPIv1/hal_spi_lld.h')
| -rw-r--r-- | os/hal/ports/AVR/MEGA/LLD/SPIv1/hal_spi_lld.h | 89 |
1 files changed, 51 insertions, 38 deletions
diff --git a/os/hal/ports/AVR/MEGA/LLD/SPIv1/hal_spi_lld.h b/os/hal/ports/AVR/MEGA/LLD/SPIv1/hal_spi_lld.h index 73d8ff856..23f13fbaf 100644 --- a/os/hal/ports/AVR/MEGA/LLD/SPIv1/hal_spi_lld.h +++ b/os/hal/ports/AVR/MEGA/LLD/SPIv1/hal_spi_lld.h @@ -15,7 +15,7 @@ */
/**
- * @file hal_spi_lld.h
+ * @file AVR/hal_spi_lld.h
* @brief AVR SPI subsystem low level driver header.
*
* @addtogroup SPI
@@ -31,29 +31,46 @@ /* Driver constants. */
/*===========================================================================*/
-/** @brief SPI Mode (Polarity/Phase) */
-#define SPI_CPOL0_CPHA0 0
-#define SPI_CPOL0_CPHA1 1
-#define SPI_CPOL1_CPHA0 2
-#define SPI_CPOL1_CPHA1 3
-
-#define SPI_MODE_0 SPI_CPOL0_CPHA0
-#define SPI_MODE_1 SPI_CPOL0_CPHA1
-#define SPI_MODE_2 SPI_CPOL1_CPHA0
-#define SPI_MODE_3 SPI_CPOL1_CPHA1
-
-/** @brief Bit order */
-#define SPI_LSB_FIRST 0
-#define SPI_MSB_FIRST 1
-
-/** @brief SPI clock rate FOSC/x */
-#define SPI_SCK_FOSC_2 0
-#define SPI_SCK_FOSC_4 1
-#define SPI_SCK_FOSC_8 2
-#define SPI_SCK_FOSC_16 3
-#define SPI_SCK_FOSC_32 4
-#define SPI_SCK_FOSC_64 5
-#define SPI_SCK_FOSC_128 6
+/**
+ * @name SPI Configuration Register
+ * @{
+ */
+#define SPI_CR_SPIE (1 << SPIE)
+
+#define SPI_CR_SPE (1 << SPE)
+
+#define SPI_CR_DORD_MSB_FIRST (0 << DORD)
+#define SPI_CR_DORD_LSB_FIRST (1 << DORD)
+
+#define SPI_CR_MSTR (1 << MSTR)
+
+#define SPI_CR_CPOL_CPHA_MODE(n) ((n) << CPHA)
+
+#define SPI_CR_SCK_FOSC_2 (0 << SPR0)
+#define SPI_CR_SCK_FOSC_4 (0 << SPR0)
+#define SPI_CR_SCK_FOSC_8 (1 << SPR0)
+#define SPI_CR_SCK_FOSC_16 (1 << SPR0)
+#define SPI_CR_SCK_FOSC_32 (2 << SPR0)
+#define SPI_CR_SCK_FOSC_64 (2 << SPR0)
+#define SPI_CR_SCK_FOSC_128 (3 << SPR0)
+/** @} */
+
+/**
+ * @name SPI Status Register
+ * {
+ */
+#define SPI_SR_SPIF (1 << SPIF)
+
+#define SPI_SR_WCOL (1 << WCOL)
+
+#define SPI_SR_SCK_FOSC_2 (1 << SPI2X)
+#define SPI_SR_SCK_FOSC_4 (0 << SPI2X)
+#define SPI_SR_SCK_FOSC_8 (1 << SPI2X)
+#define SPI_SR_SCK_FOSC_16 (0 << SPI2X)
+#define SPI_SR_SCK_FOSC_32 (1 << SPI2X)
+#define SPI_SR_SCK_FOSC_64 (0 << SPI2X)
+#define SPI_SR_SCK_FOSC_128 (0 << SPI2X)
+/** @} */
/*===========================================================================*/
/* Driver pre-compile time settings. */
@@ -68,7 +85,7 @@ * @details If set to @p TRUE the support for SPI1 is included.
*/
#if !defined(AVR_SPI_USE_SPI1) || defined(__DOXYGEN__)
-#define AVR_SPI_USE_SPI1 FALSE
+#define AVR_SPI_USE_SPI1 FALSE
#endif
/** @} */
@@ -100,6 +117,11 @@ typedef void (*spicallback_t)(SPIDriver *spip); */
typedef struct {
/**
+ * @brief Operation complete callback.
+ */
+ spicallback_t end_cb;
+ /* End of the mandatory fields.*/
+ /**
* @brief Port used of Slave Select
*/
ioportid_t ssport;
@@ -108,22 +130,13 @@ typedef struct { */
uint8_t sspad;
/**
- * @brief Polarity/Phase mode
+ * @brief SPI Control Register initialization data.
*/
- uint8_t mode;
+ uint8_t spcr;
/**
- * @brief Use MSB/LSB first?
+ * @brief SPI Status Register initialization data.
*/
- uint8_t bitorder;
- /**
- * @brief Clock rate of the subsystem
- */
- uint8_t clockrate;
- /**
- * @brief Operation complete callback.
- */
- spicallback_t end_cb;
- /* End of the mandatory fields.*/
+ uint8_t spsr;
} SPIConfig;
/**
|