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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-05-09 19:30:55 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-05-09 19:30:55 +0000
commitf91dff51cc155f265a65417087f3402e99f6e5ae (patch)
treecdb44696001398415156aaf6c261b09d4231d4f9 /os/hal/platforms
parent539fc8bfc35d0d03c46d553d21c8f332f4a9eb55 (diff)
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Added SDC status check to sdcWrite();
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2945 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms')
-rw-r--r--os/hal/platforms/STM32/sdc_lld.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/os/hal/platforms/STM32/sdc_lld.c b/os/hal/platforms/STM32/sdc_lld.c
index 9b56591b7..a0d5965fc 100644
--- a/os/hal/platforms/STM32/sdc_lld.c
+++ b/os/hal/platforms/STM32/sdc_lld.c
@@ -399,7 +399,8 @@ error:
*/
bool_t sdc_lld_write(SDCDriver *sdcp, uint32_t startblk,
const uint8_t *buf, uint32_t n) {
- uint32_t resp[1];
+ uint32_t sts, resp[1];
+ bool_t err;
/* Prepares the DMA channel for writing.*/
dmaChannelSetup(&STM32_DMA2->channels[STM32_DMA_CHANNEL_4],
@@ -446,7 +447,14 @@ bool_t sdc_lld_write(SDCDriver *sdcp, uint32_t startblk,
SDIO->DCTRL = 0;
chSysUnlock();
- return sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_STOP_TRANSMISSION, 0, resp);
+ err = sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_STOP_TRANSMISSION, 0, resp);
+ do {
+ if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_SEND_STATUS,sdcp->rca, resp) ||
+ (resp[0] & SDC_R1_ERROR_MASK))
+ return TRUE;
+ sts = SDC_STS(resp[0]);
+ } while ((sts == SDC_STS_RCV) || (sts == SDC_STS_PRG));
+ return err;
error:
dmaDisableChannel(STM32_DMA2, STM32_DMA_CHANNEL_4);
SDIO->ICR = 0xFFFFFFFF;