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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-04-03 11:29:27 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-04-03 11:29:27 +0000
commitc4fec713d238a4396ee5693c986e3d25a74082e5 (patch)
tree7f228bfc51fd8746443940cef8576c21b7e55d1f /os/hal/platforms
parent8d2e166f09025f1cdb36f4ac09260dc66f29e598 (diff)
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Improvements to the PAL drivers.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2867 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms')
-rw-r--r--os/hal/platforms/AT91SAM7/pal_lld.h21
-rw-r--r--os/hal/platforms/LPC214x/pal_lld.h13
-rw-r--r--os/hal/platforms/MSP430/pal_lld.h4
-rw-r--r--os/hal/platforms/Posix/pal_lld.h9
-rw-r--r--os/hal/platforms/STM32/pal_lld.h7
-rw-r--r--os/hal/platforms/STM8L/pal_lld.h5
-rw-r--r--os/hal/platforms/STM8S/pal_lld.h5
-rw-r--r--os/hal/platforms/Win32/pal_lld.h9
8 files changed, 28 insertions, 45 deletions
diff --git a/os/hal/platforms/AT91SAM7/pal_lld.h b/os/hal/platforms/AT91SAM7/pal_lld.h
index ebb22f2cb..9c5796a40 100644
--- a/os/hal/platforms/AT91SAM7/pal_lld.h
+++ b/os/hal/platforms/AT91SAM7/pal_lld.h
@@ -155,9 +155,7 @@ typedef AT91PS_PIO ioportid_t;
*
* @notapi
*/
-#define pal_lld_writeport(port, bits) { \
- (port)->PIO_ODSR = (bits); \
-}
+#define pal_lld_writeport(port, bits) ((port)->PIO_ODSR = (bits))
/**
* @brief Sets a bits mask on a I/O port.
@@ -169,9 +167,7 @@ typedef AT91PS_PIO ioportid_t;
*
* @notapi
*/
-#define pal_lld_setport(port, bits) { \
- (port)->PIO_SODR = (bits); \
-}
+#define pal_lld_setport(port, bits) ((port)->PIO_SODR = (bits))
/**
* @brief Clears a bits mask on a I/O port.
@@ -183,9 +179,7 @@ typedef AT91PS_PIO ioportid_t;
*
* @notapi
*/
-#define pal_lld_clearport(port, bits) { \
- (port)->PIO_CODR = (bits); \
-}
+#define pal_lld_clearport(port, bits) ((port)->PIO_CODR = (bits))
/**
* @brief Writes a group of bits.
@@ -201,11 +195,10 @@ typedef AT91PS_PIO ioportid_t;
*
* @notapi
*/
-#define pal_lld_writegroup(port, mask, offset, bits) { \
- (port)->PIO_OWER = (mask) << (offset); \
- (port)->PIO_ODSR = (bits) << (offset); \
- (port)->PIO_OWDR = (mask) << (offset); \
-}
+#define pal_lld_writegroup(port, mask, offset, bits) \
+ ((port)->PIO_OWER = (mask) << (offset), \
+ (port)->PIO_ODSR = (bits) << (offset), \
+ (port)->PIO_OWDR = (mask) << (offset))
/**
* @brief Pads group mode setup.
diff --git a/os/hal/platforms/LPC214x/pal_lld.h b/os/hal/platforms/LPC214x/pal_lld.h
index 424cb73f1..1a45cd6a9 100644
--- a/os/hal/platforms/LPC214x/pal_lld.h
+++ b/os/hal/platforms/LPC214x/pal_lld.h
@@ -194,11 +194,10 @@ typedef FIO * ioportid_t;
*
* @notapi
*/
-#define pal_lld_writegroup(port, mask, offset, bits) { \
- (port)->FIO_MASK = ~((mask) << (offset)); \
- (port)->FIO_PIN = (bits) << (offset); \
- (port)->FIO_MASK = 0; \
-}
+#define pal_lld_writegroup(port, mask, offset, bits) \
+ ((port)->FIO_MASK = ~((mask) << (offset)), \
+ (port)->FIO_PIN = (bits) << (offset), \
+ (port)->FIO_MASK = 0)
/**
* @brief Pads group mode setup.
@@ -236,9 +235,7 @@ typedef FIO * ioportid_t;
*
* @notapi
*/
-#define pal_lld_lpc214x_set_direction(port, dir) { \
- (port)->FIO_DIR = (dir); \
-}
+#define pal_lld_lpc214x_set_direction(port, dir) ((port)->FIO_DIR = (dir))
extern const PALConfig pal_default_config;
diff --git a/os/hal/platforms/MSP430/pal_lld.h b/os/hal/platforms/MSP430/pal_lld.h
index 7741e8f12..31ee669a0 100644
--- a/os/hal/platforms/MSP430/pal_lld.h
+++ b/os/hal/platforms/MSP430/pal_lld.h
@@ -255,9 +255,7 @@ typedef msp430_ioport_t *ioportid_t;
*
* @notapi
*/
-#define pal_lld_writeport(port, bits) { \
- (port)->iop_common.out.reg_p = (bits); \
-}
+#define pal_lld_writeport(port, bits) ((port)->iop_common.out.reg_p = (bits))
/**
* @brief Pads group mode setup.
diff --git a/os/hal/platforms/Posix/pal_lld.h b/os/hal/platforms/Posix/pal_lld.h
index edfa73c73..1984c06f0 100644
--- a/os/hal/platforms/Posix/pal_lld.h
+++ b/os/hal/platforms/Posix/pal_lld.h
@@ -129,10 +129,9 @@ typedef sim_vio_port_t *ioportid_t;
*
* @param[in] config architecture-dependent ports configuration
*/
-#define pal_lld_init(config) { \
- vio_port_1 = (config)->VP1Data; \
- vio_port_2 = (config)->VP2Data; \
-}
+#define pal_lld_init(config) \
+ (vio_port_1 = (config)->VP1Data, \
+ vio_port_2 = (config)->VP2Data)
/**
* @brief Reads the physical I/O port states.
@@ -178,7 +177,7 @@ typedef sim_vio_port_t *ioportid_t;
* @param[in] mask group mask
* @param[in] mode group mode
*/
-#define pal_lld_setgroupmode(port, mask, mode) \
+#define pal_lld_setgroupmode(port, mask, mode) \
_pal_lld_setgroupmode(port, mask, mode)
#if !defined(__DOXYGEN__)
diff --git a/os/hal/platforms/STM32/pal_lld.h b/os/hal/platforms/STM32/pal_lld.h
index 0ecde182d..2919c91f6 100644
--- a/os/hal/platforms/STM32/pal_lld.h
+++ b/os/hal/platforms/STM32/pal_lld.h
@@ -279,10 +279,9 @@ typedef GPIO_TypeDef * ioportid_t;
*
* @notapi
*/
-#define pal_lld_writegroup(port, mask, offset, bits) { \
- (port)->BSRR = ((~(bits) & (mask)) << (16 + (offset))) | \
- (((bits) & (mask)) << (offset)); \
-}
+#define pal_lld_writegroup(port, mask, offset, bits) \
+ ((port)->BSRR = ((~(bits) & (mask)) << (16 + (offset))) | \
+ (((bits) & (mask)) << (offset)))
/**
* @brief Pads group mode setup.
diff --git a/os/hal/platforms/STM8L/pal_lld.h b/os/hal/platforms/STM8L/pal_lld.h
index da698ea7a..f42973218 100644
--- a/os/hal/platforms/STM8L/pal_lld.h
+++ b/os/hal/platforms/STM8L/pal_lld.h
@@ -175,7 +175,7 @@ typedef GPIO_TypeDef *ioportid_t;
*
* @notapi
*/
-#define pal_lld_init(config) *IOPORTS = *(config)
+#define pal_lld_init(config) (*IOPORTS = *(config))
/**
* @brief Reads the physical I/O port states.
@@ -215,7 +215,6 @@ typedef GPIO_TypeDef *ioportid_t;
*/
#define pal_lld_writeport(port, bits) ((port)->ODR = (bits))
-
/**
* @brief Pads group mode setup.
* @details This function programs a pads group belonging to the same port
@@ -231,7 +230,7 @@ typedef GPIO_TypeDef *ioportid_t;
* @notapi
*/
#define pal_lld_setgroupmode(port, mask, mode) \
- _pal_lld_setgroupmode(port, mask, mode)
+ _pal_lld_setgroupmode(port, mask, mode)
extern ROMCONST PALConfig pal_default_config;
diff --git a/os/hal/platforms/STM8S/pal_lld.h b/os/hal/platforms/STM8S/pal_lld.h
index 8bb1caae8..ef69d1379 100644
--- a/os/hal/platforms/STM8S/pal_lld.h
+++ b/os/hal/platforms/STM8S/pal_lld.h
@@ -160,7 +160,7 @@ typedef GPIO_TypeDef *ioportid_t;
*
* @notapi
*/
-#define pal_lld_init(config) *IOPORTS = *(config)
+#define pal_lld_init(config) (*IOPORTS = *(config))
/**
* @brief Reads the physical I/O port states.
@@ -200,7 +200,6 @@ typedef GPIO_TypeDef *ioportid_t;
*/
#define pal_lld_writeport(port, bits) ((port)->ODR = (bits))
-
/**
* @brief Pads group mode setup.
* @details This function programs a pads group belonging to the same port
@@ -216,7 +215,7 @@ typedef GPIO_TypeDef *ioportid_t;
* @notapi
*/
#define pal_lld_setgroupmode(port, mask, mode) \
- _pal_lld_setgroupmode(port, mask, mode)
+ _pal_lld_setgroupmode(port, mask, mode)
extern ROMCONST PALConfig pal_default_config;
diff --git a/os/hal/platforms/Win32/pal_lld.h b/os/hal/platforms/Win32/pal_lld.h
index f89510f76..a1c84b13a 100644
--- a/os/hal/platforms/Win32/pal_lld.h
+++ b/os/hal/platforms/Win32/pal_lld.h
@@ -129,10 +129,9 @@ typedef sim_vio_port_t *ioportid_t;
*
* @param[in] config architecture-dependent ports configuration
*/
-#define pal_lld_init(config) { \
- vio_port_1 = (config)->VP1Data; \
- vio_port_2 = (config)->VP2Data; \
-}
+#define pal_lld_init(config) \
+ (vio_port_1 = (config)->VP1Data, \
+ vio_port_2 = (config)->VP2Data)
/**
* @brief Reads the physical I/O port states.
@@ -178,7 +177,7 @@ typedef sim_vio_port_t *ioportid_t;
* @param[in] mask group mask
* @param[in] mode group mode
*/
-#define pal_lld_setgroupmode(port, mask, mode) \
+#define pal_lld_setgroupmode(port, mask, mode) \
_pal_lld_setgroupmode(port, mask, mode)
#if !defined(__DOXYGEN__)