git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1713 35acf78f-673a-0410-8e92-d51de3d6d3f4

8 files changed, 1102 insertions, 0 deletions

diff --git a/os/hal/platforms/STM8/hal_lld.c b/os/hal/platforms/STM8/hal_lld.c
new file mode 100644
index 000000000..524c39c7c
--- /dev/null
+++ b/os/hal/platforms/STM8/hal_lld.c
@@ -0,0 +1,111 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file    STM8/hal_lld.c

+ * @brief   STM8 HAL subsystem low level driver source.

+ *

+ * @addtogroup STM8_HAL

+ * @{

+ */

+

+#include "ch.h"

+#include "hal.h"

+

+/*===========================================================================*/

+/* Driver exported variables.                                                */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver local variables.                                                   */

+/*===========================================================================*/

+

+/**

+ * @brief PAL setup.

+ * @details Digital I/O ports static configuration as defined in @p board.h.

+ */

+const STM8GPIOConfig pal_default_config =

+{

+  {

+    {VAL_GPIOAODR, 0, VAL_GPIOADDR, VAL_GPIOACR1, VAL_GPIOACR2},

+    {VAL_GPIOBODR, 0, VAL_GPIOBDDR, VAL_GPIOBCR1, VAL_GPIOBCR2},

+    {VAL_GPIOCODR, 0, VAL_GPIOCDDR, VAL_GPIOCCR1, VAL_GPIOCCR2},

+    {VAL_GPIODODR, 0, VAL_GPIODDDR, VAL_GPIODCR1, VAL_GPIODCR2},

+    {VAL_GPIOEODR, 0, VAL_GPIOEDDR, VAL_GPIOECR1, VAL_GPIOECR2},

+    {VAL_GPIOFODR, 0, VAL_GPIOFDDR, VAL_GPIOFCR1, VAL_GPIOFCR2},

+    {VAL_GPIOGODR, 0, VAL_GPIOGDDR, VAL_GPIOGCR1, VAL_GPIOGCR2},

+    {VAL_GPIOHODR, 0, VAL_GPIOHDDR, VAL_GPIOHCR1, VAL_GPIOHCR2},

+    {VAL_GPIOIODR, 0, VAL_GPIOIDDR, VAL_GPIOICR1, VAL_GPIOICR2}

+  }

+};

+

+/*===========================================================================*/

+/* Driver local functions.                                                   */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver interrupt handlers.                                                */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver exported functions.                                                */

+/*===========================================================================*/

+

+/**

+ * @brief   Low level HAL driver initialization.

+ */

+void hal_lld_init(void) {

+

+#if STM8_CLOCK_SOURCE != CLK_SOURCE_DEFAULT

+#if STM8_CLOCK_SOURCE == CLK_SOURCE_HSI

+  CLK_ICKR    = 1;                  /* HSIEN */

+  while ((CLK_ICKR & 2) == 0)       /* HSIRDY */

+    ;

+#elif STM8_CLOCK_SOURCE == CLK_SOURCE_LSI

+  CLK_ICKR    = 8;                  /* LSIEN */             

+  while ((CLK_ICKR & 16) == 0)      /* LSIRDY */

+    ;

+#else /* STM8_CLOCK_SOURCE == CLK_SOURCE_HSE */

+  CLK_ECKR    = 1;                  /* HSEEN */

+  while ((CLK_ECKR & 2) == 0)       /* HSERDY */

+    ;

+#endif

+#if STM8_CLOCK_SOURCE != CLK_SOURCE_HSI

+  /* Switching clock (manual switch mode).*/

+  CLK_SWCR    = 0;

+  CLK_SWR     = STM8_CLOCK_SOURCE;

+  while ((CLK_SWCR & 8) == 0)       /* SWIF */

+    ;

+  CLK_SWCR    = 2;                  /* SWEN */

+#endif

+  /* Setting up clock dividers.*/

+  CLK_CKDIVR  = (STM8_HSI_DIVIDER << 3) | (STM8_CPU_DIVIDER << 0);

+

+  /* Clocks initially all disabled.*/

+  CLK_PCKENR1 = 0;

+  CLK_PCKENR2 = 0;

+  

+  /* Other clock related initializations.*/

+  CLK_CSSR    = 0;

+  CLK_CCOR    = 0;

+  CLK_CANCCR  = 0;

+#endif /* STM8_CLOCK_SOURCE != CLK_SOURCE_DEFAULT */

+}

+

+/** @} */

diff --git a/os/hal/platforms/STM8/hal_lld.h b/os/hal/platforms/STM8/hal_lld.h
new file mode 100644
index 000000000..38ea50001
--- /dev/null
+++ b/os/hal/platforms/STM8/hal_lld.h
@@ -0,0 +1,142 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file    STM8/hal_lld.h

+ * @brief   STM8 HAL subsystem low level driver source.

+ *

+ * @addtogroup STM8_HAL

+ * @{

+ */

+

+#ifndef _HAL_LLD_H_

+#define _HAL_LLD_H_

+

+#include "stm8.h"

+

+/*===========================================================================*/

+/* Driver constants.                                                         */

+/*===========================================================================*/

+

+#define LSICLK              128000      /**< Low speed internal clock.      */

+#define HSICLK              16000000    /**< High speed internal clock.     */

+

+#define CLK_SOURCE_DEFAULT  0           /**< No clock initialization.       */

+#define CLK_SOURCE_HSI      0xE1        /**< HSI clock selector.            */

+#define CLK_SOURCE_LSI      0xD2        /**< LSI clock selector.            */

+#define CLK_SOURCE_HSE      0xB4        /**< HSE clock selector.            */

+

+#define CLK_HSI_DIV1        0           /**< HSI clock divided by 1.        */

+#define CLK_HSI_DIV2        1           /**< HSI clock divided by 2.        */

+#define CLK_HSI_DIV4        2           /**< HSI clock divided by 4.        */

+#define CLK_HSI_DIV8        3           /**< HSI clock divided by 8.        */

+

+#define CLK_CPU_DIV1        0           /**< CPU clock divided by 1.        */

+#define CLK_CPU_DIV2        1           /**< CPU clock divided by 2.        */

+#define CLK_CPU_DIV4        2           /**< CPU clock divided by 4.        */

+#define CLK_CPU_DIV8        3           /**< CPU clock divided by 8.        */

+#define CLK_CPU_DIV16       4           /**< CPU clock divided by 16.       */

+#define CLK_CPU_DIV32       5           /**< CPU clock divided by 32.       */

+#define CLK_CPU_DIV64       6           /**< CPU clock divided by 64.       */

+#define CLK_CPU_DIV128      7           /**< CPU clock divided by 128.      */

+

+/*===========================================================================*/

+/* Driver pre-compile time settings.                                         */

+/*===========================================================================*/

+

+/**

+ * @brief Clock source setting.

+ */

+#if !defined(STM8_CLOCK_SOURCE) || defined(__DOXYGEN__)

+#define STM8_CLOCK_SOURCE           CLK_SOURCE_DEFAULT

+#endif

+

+/**

+ * @brief HSI clock divider.

+ */

+#if !defined(STM8_HSI_DIVIDER) || defined(__DOXYGEN__)

+#define STM8_HSI_DIVIDER            CLK_HSI_DIV8

+#endif

+

+/**

+ * @brief CPU clock divider.

+ */

+#if !defined(STM8_CPU_DIVIDER) || defined(__DOXYGEN__)

+#define STM8_CPU_DIVIDER            CLK_CPU_DIV1

+#endif

+

+/*===========================================================================*/

+/* Derived constants and error checks.                                       */

+/*===========================================================================*/

+

+#if (STM8_HSI_DIVIDER != CLK_HSI_DIV1)  &&                                  \

+    (STM8_HSI_DIVIDER != CLK_HSI_DIV2)  &&                                  \

+    (STM8_HSI_DIVIDER != CLK_HSI_DIV4)  &&                                  \

+    (STM8_HSI_DIVIDER != CLK_HSI_DIV8)

+#error "specified invalid HSI divider"

+#endif

+

+#if (STM8_CPU_DIVIDER != CLK_CPU_DIV1)  &&                                  \

+    (STM8_CPU_DIVIDER != CLK_CPU_DIV2)  &&                                  \

+    (STM8_CPU_DIVIDER != CLK_CPU_DIV4)  &&                                  \

+    (STM8_CPU_DIVIDER != CLK_CPU_DIV8)  &&                                  \

+    (STM8_CPU_DIVIDER != CLK_CPU_DIV16) &&                                  \

+    (STM8_CPU_DIVIDER != CLK_CPU_DIV32) &&                                  \

+    (STM8_CPU_DIVIDER != CLK_CPU_DIV64) &&                                  \

+    (STM8_CPU_DIVIDER != CLK_CPU_DIV128)

+#error "specified invalid CPU divider"

+#endif

+

+#if STM8_CLOCK_SOURCE == CLK_SOURCE_DEFAULT

+#define SYSCLK                      (HSICLK / 8)

+#elif STM8_CLOCK_SOURCE == CLK_SOURCE_HSI

+#define SYSCLK                      (HSICLK / (1 << STM8_HSI_DIVIDER))

+#elif STM8_CLOCK_SOURCE == CLK_SOURCE_LSI

+#define SYSCLK                      LSICLK

+#elif STM8_CLOCK_SOURCE == CLK_SOURCE_HSE

+#define SYSCLK                      HSECLK

+#else

+#error "specified invalid clock source"

+#endif

+

+#define CPUCLK                      (SYSCLK / (1 << STM8_CPU_DIVIDER))

+

+/*===========================================================================*/

+/* Driver data structures and types.                                         */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver macros.                                                            */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* External declarations.                                                    */

+/*===========================================================================*/

+

+#ifdef __cplusplus

+extern "C" {

+#endif

+  void hal_lld_init(void);

+#ifdef __cplusplus

+}

+#endif

+

+#endif /* _HAL_LLD_H_ */

+

+/** @} */

diff --git a/os/hal/platforms/STM8/pal_lld.c b/os/hal/platforms/STM8/pal_lld.c
new file mode 100644
index 000000000..e55717077
--- /dev/null
+++ b/os/hal/platforms/STM8/pal_lld.c
@@ -0,0 +1,55 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file    STM8/pal_lld.c

+ * @brief   STM8 GPIO low level driver code.

+ *

+ * @addtogroup STM8_PAL

+ * @{

+ */

+

+#include "ch.h"

+#include "hal.h"

+

+#if CH_HAL_USE_PAL || defined(__DOXYGEN__)

+

+/*===========================================================================*/

+/* Driver exported variables.                                                */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver local variables.                                                   */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver local functions.                                                   */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver interrupt handlers.                                                */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver exported functions.                                                */

+/*===========================================================================*/

+

+#endif /* CH_HAL_USE_PAL */

+

+/** @} */

diff --git a/os/hal/platforms/STM8/pal_lld.h b/os/hal/platforms/STM8/pal_lld.h
new file mode 100644
index 000000000..d5517fe86
--- /dev/null
+++ b/os/hal/platforms/STM8/pal_lld.h
@@ -0,0 +1,200 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file    STM8/pal_lld.h

+ * @brief   STM8 GPIO low level driver header.

+ *

+ * @addtogroup STM8_PAL

+ * @{

+ */

+

+#ifndef _PAL_LLD_H_

+#define _PAL_LLD_H_

+

+#if CH_HAL_USE_PAL || defined(__DOXYGEN__)

+

+/*===========================================================================*/

+/* Unsupported modes and specific modes                                      */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* I/O Ports Types and constants.                                            */

+/*===========================================================================*/

+

+typedef struct {

+  volatile uint8_t      ODR;

+  volatile uint8_t      IDR;

+  volatile uint8_t      DDR;

+  volatile uint8_t      CR1;

+  volatile uint8_t      CR2;

+} gpio_t;

+

+/**

+ * @brief   Generic I/O ports static initializer.

+ * @details An instance of this structure must be passed to @p palInit() at

+ *          system startup time in order to initialized the digital I/O

+ *          subsystem. This represents only the initial setup, specific pads

+ *          or whole ports can be reprogrammed at later time.

+ */

+typedef struct {

+  gpio_t                P[9];

+} STM8GPIOConfig;

+

+/**

+ * @brief   Width, in bits, of an I/O port.
+ */

+#define PAL_IOPORTS_WIDTH 32

+

+/**

+ * @brief   Whole port mask.

+ * @brief   This macro specifies all the valid bits into a port.
+ */

+#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFFFFFF)

+

+/**

+ * @brief   Digital I/O port sized unsigned type.
+ */

+typedef uint32_t ioportmask_t;

+

+/**

+ * @brief   Port Identifier.

+ */

+typedef gpio_t *ioportid_t;

+

+/*===========================================================================*/

+/* I/O Ports Identifiers.                                                    */

+/*===========================================================================*/

+

+/**

+ * @brief   GPIO ports as a whole.

+ */

+#define IOPORTS         ((STM8GPIOConfig *)0x5000)

+

+/**

+ * @brief   GPIO port A identifier.

+ */

+#define IOPORT1         ((gpio_t *)0x5000)

+

+/**

+ * @brief   GPIO port B identifier.

+ */

+#define IOPORT2         ((gpio_t *)0x5005)

+

+/**

+ * @brief   GPIO port C identifier.

+ */

+#define IOPORT3         ((gpio_t *)0x500A)

+

+/**

+ * @brief   GPIO port D identifier.

+ */

+#define IOPORT4         ((gpio_t *)0x500F)

+

+/**

+ * @brief   GPIO port E identifier.

+ */

+#define IOPORT5         ((gpio_t *)0x5014)

+

+/**

+ * @brief   GPIO port F identifier.

+ */

+#define IOPORT6         ((gpio_t *)0x5019)

+

+/**

+ * @brief   GPIO port G identifier.

+ */

+#define IOPORT7         ((gpio_t *)0x501E)

+

+/**

+ * @brief   GPIO port H identifier.

+ */

+#define IOPORT8         ((gpio_t *)0x5023)

+

+/**

+ * @brief   GPIO port I identifier.

+ */

+#define IOPORT9         ((gpio_t *)0x5028)

+

+/*===========================================================================*/

+/* Implementation, some of the following macros could be implemented as      */

+/* functions, if so please put them in pal_lld.c.                            */

+/*===========================================================================*/

+

+/**

+ * @brief   Low level PAL subsystem initialization.

+ *

+ * @param[in] config    architecture-dependent ports configuration

+ */

+#define pal_lld_init(config)    *IOPORTS = *(config)

+

+/**

+ * @brief   Reads the physical I/O port states.

+ * @note    This function is not meant to be invoked directly by the

+ *          application code.

+ *

+ * @param[in] port      port identifier

+ * @return              The port bits.

+ */

+#define pal_lld_readport(port) ((port)->IDR)

+

+/**

+ * @brief   Reads the output latch.

+ * @details The purpose of this function is to read back the latched output

+ *          value.

+ * @note    This function is not meant to be invoked directly by the

+ *          application code.

+ *

+ * @param[in] port      port identifier

+ * @return              The latched logical states.

+ */

+#define pal_lld_readlatch(port) ((port)->ODR)

+

+/**

+ * @brief   Writes a bits mask on a I/O port.

+ * @note    This function is not meant to be invoked directly by the

+ *          application code.

+ *

+ * @param[in] port      port identifier

+ * @param[in] bits      bits to be written on the specified port

+ */

+#define pal_lld_writeport(port, bits) ((port)->ODR = (bits))

+

+

+/**

+ * @brief   Pads group mode setup.

+ * @details This function programs a pads group belonging to the same port

+ *          with the specified mode.

+ * @note    This function is not meant to be invoked directly by the

+ *          application code.

+ * @note    Programming an unknown or unsupported mode is silently ignored.

+ *

+ * @param[in] port      port identifier

+ * @param[in] mask      group mask

+ * @param[in] mode      group mode

+ */

+#define pal_lld_setgroupmode(port, mask, mode) ((void)(mode))

+

+extern const STM8GPIOConfig pal_default_config;

+

+#endif /* CH_HAL_USE_PAL */

+

+#endif /* _PAL_LLD_H_ */

+

+/** @} */

diff --git a/os/hal/platforms/STM8/platform.dox b/os/hal/platforms/STM8/platform.dox
new file mode 100644
index 000000000..1bf5a16bd
--- /dev/null
+++ b/os/hal/platforms/STM8/platform.dox
@@ -0,0 +1,68 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @defgroup STM8_DRIVERS STM8 Drivers

+ * @brief Device drivers included in the STM8 support.

+ *

+ * @ingroup STM8

+ */

+

+/**

+ * @defgroup STM8_HAL STM8 HAL Support

+ * @brief HAL support.

+ *

+ * @ingroup STM8_DRIVERS

+ */

+

+/**

+ * @defgroup STM8_PAL STM8 I/O Ports Support

+ * @brief I/O Ports peripherals support.

+ * @details This module supports the STM8 GPIO controller. The controller

+ * supports the following features (see @ref PAL):

+ * - 8 bits wide ports.

+ * - Atomic set/reset/toggle functions because special STM8 instruction set.

+ * - Output latched regardless of the pad setting.

+ * - Direct read of input pads regardless of the pad setting.

+ * .

+ * <h2>Supported Setup Modes</h2>

+ * - @p PAL_MODE_RESET.

+ * - @p PAL_MODE_UNCONNECTED.

+ * - @p PAL_MODE_INPUT.

+ * - @p PAL_MODE_INPUT_PULLUP.

+ * - @p PAL_MODE_OUTPUT_PUSHPULL.

+ * - @p PAL_MODE_OUTPUT_OPENDRAIN.

+ * .

+ * Any attempt to setup an invalid mode is ignored.

+ *

+ * <h2>Suboptimal Behavior</h2>

+ * Some STM8 I/O ports features are less than optimal:

+ * - Bus/group writing is not atomic.

+ * - Pad/group mode setup is not atomic.

+ * .

+ * @ingroup STM8_DRIVERS

+ */

+

+/**

+ * @defgroup STM8_SERIAL STM8 UART Support

+ * @brief USART support.

+ * @details The serial driver supports the STM8 USARTs in asynchronous mode.

+ *

+ * @ingroup STM8_DRIVERS

+ */

diff --git a/os/hal/platforms/STM8/serial_lld.c b/os/hal/platforms/STM8/serial_lld.c
new file mode 100644
index 000000000..547b8a98c
--- /dev/null
+++ b/os/hal/platforms/STM8/serial_lld.c
@@ -0,0 +1,326 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file    STM8/serial_lld.c

+ * @brief   STM8 low level serial driver code.

+ *

+ * @addtogroup STM8_SERIAL

+ * @{

+ */

+

+#include "ch.h"

+#include "hal.h"

+

+/* Because someone somewhere couldn't use the same name for the same thing.*/

+#if STM8_PLATFORM == PLATFORM_STM8AF51AA

+#define UART1_BRR1  USART_BRR1

+#define UART1_BRR2  USART_BRR2

+#define UART1_SR    USART_SR

+#define UART1_DR    USART_DR

+#define UART1_CR1   USART_CR1

+#define UART1_CR2   USART_CR2

+#define UART1_CR3   USART_CR3

+#define UART1_CR4   USART_CR4

+#define UART1_CR5   USART_CR5

+

+#define UART3_BRR1  LINUART_BRR1

+#define UART3_BRR2  LINUART_BRR2

+#define UART3_SR    LINUART_SR

+#define UART3_DR    LINUART_DR

+#define UART3_CR1   LINUART_CR1

+#define UART3_CR2   LINUART_CR2

+#define UART3_CR3   LINUART_CR3

+#define UART3_CR4   LINUART_CR4

+#define UART3_CR5   LINUART_CR5

+#define UART3_CR6   LINUART_CR6

+#endif

+

+#if CH_HAL_USE_SERIAL || defined(__DOXYGEN__)

+

+/*===========================================================================*/

+/* Driver exported variables.                                                */

+/*===========================================================================*/

+

+/**

+ * @brief   UART1 serial driver identifier.

+ */

+#if USE_STM8_UART1 || defined(__DOXYGEN__)

+SerialDriver SD1;

+#endif

+

+/**

+ * @brief   UART3 serial driver identifier.

+ */

+#if USE_STM8_UART3 || defined(__DOXYGEN__)

+SerialDriver SD3;

+#endif

+

+/*===========================================================================*/

+/* Driver local variables.                                                   */

+/*===========================================================================*/

+

+/**

+ * @brief   Driver default configuration.

+ */

+static const SerialConfig default_config = {

+  BBR(SERIAL_DEFAULT_BITRATE),

+  SD_MODE_PARITY_NONE | SD_MODE_STOP_1

+};

+

+/*===========================================================================*/

+/* Driver local functions.                                                   */

+/*===========================================================================*/

+

+static void set_error(SerialDriver *sdp, uint8_t sr) {

+  sdflags_t sts = 0;

+

+  if (sr & 0x08)                            /* OR bit.                      */

+    sts |= SD_OVERRUN_ERROR;

+  if (sr & 0x04)                            /* NF bit.                      */

+    sts |= SD_NOISE_ERROR;

+  if (sr & 0x02)                            /* FE bit.                      */

+    sts |= SD_FRAMING_ERROR;

+  if (sr & 0x01)                            /* PE bit.                      */

+    sts |= SD_PARITY_ERROR;

+  chSysLockFromIsr();

+  sdAddFlagsI(sdp, sts);

+  chSysUnlockFromIsr();

+}

+

+#if USE_STM8_UART1 || defined(__DOXYGEN__)

+static void notify1(void) {

+

+  UART1_CR2 |= 0x80;                        /* TIEN bit.                    */

+}

+

+/**

+ * @brief   UART1 initialization.

+ *

+ * @param[in] config    architecture-dependent serial driver configuration

+ */

+static void uart1_init(const SerialConfig *config) {

+

+  UART1_BRR2 = ((uint8_t)(config->sc_brr >> 8) % (uint8_t)0xF0) |

+               ((uint8_t)config->sc_brr & (uint8_t)0x0F);

+  UART1_BRR1 = (uint8_t)(config->sc_brr >> 4);

+  UART1_CR1  = config->sc_mode &

+               SD_MODE_PARITY;              /* PIEN included.               */

+  UART1_CR2  = 0x2C;                        /* RIEN | TEN | REN.            */

+  UART1_CR3  = config->sc_mode & SD_MODE_STOP;

+  UART1_CR4  = 0;

+  UART1_CR5  = 0;

+  UART1_PSCR = 1;

+  (void)UART1_SR;

+  (void)UART1_DR;

+}

+

+/**

+ * @brief   UART1 de-initialization.

+ */

+static void uart1_deinit(void) {

+

+  UART1_CR1  = 0x20;                        /* UARTD (low power).           */

+  UART1_CR2  = 0;

+  UART1_CR3  = 0;

+  UART1_CR4  = 0;

+  UART1_CR5  = 0;

+  UART1_PSCR = 0;

+}

+#endif /* USE_STM8_UART1 */

+

+#if USE_STM8_UART3 || defined(__DOXYGEN__)

+static void notify3(void) {

+

+  UART1_CR2 |= 0x80;                        /* TIEN bit.                    */

+}

+

+/**

+ * @brief   UART3 initialization.

+ *

+ * @param[in] config    architecture-dependent serial driver configuration

+ */

+static void uart3_init(const SerialConfig *config) {

+

+  UART3_BRR2 = ((uint8_t)(config->sc_brr >> 8) % (uint8_t)0xF0) |

+               ((uint8_t)config->sc_brr & (uint8_t)0x0F);

+  UART3_BRR1 = (uint8_t)(config->sc_brr >> 4);

+  UART3_CR1  = config->sc_mode &

+               SD_MODE_PARITY;              /* PIEN included.               */

+  UART3_CR2  = 0x2C;                        /* RIEN | TEN | REN.            */

+  UART3_CR3  = config->sc_mode & SD_MODE_STOP;

+  UART3_CR4  = 0;

+  UART3_CR6  = 0;

+  (void)UART3_SR;

+  (void)UART3_DR;

+}

+

+/**

+ * @brief   UART3 de-initialization.

+ */

+static void uart3_deinit(void) {

+

+  UART3_CR1  = 0x20;                        /* UARTD (low power).           */

+  UART3_CR2  = 0;

+  UART3_CR3  = 0;

+  UART3_CR4  = 0;

+  UART3_CR6  = 0;

+}

+#endif /* USE_STM8_UART3 */

+

+/*===========================================================================*/

+/* Driver interrupt handlers.                                                */

+/*===========================================================================*/

+

+#if USE_STM8_UART1 || defined(__DOXYGEN__)

+CH_IRQ_HANDLER(17) {

+  msg_t b;

+

+  CH_IRQ_PROLOGUE();

+

+  chSysLockFromIsr();

+  b = sdRequestDataI(&SD1);

+  chSysUnlockFromIsr();

+  if (b < Q_OK)

+    UART1_CR2 &= ~0x80;                         /* TIEN.                    */

+  else

+    UART1_DR = b;

+

+  CH_IRQ_EPILOGUE();

+}

+

+CH_IRQ_HANDLER(18) {

+  uint8_t sr = UART1_SR;

+

+  CH_IRQ_PROLOGUE();

+

+  if ((sr = UART1_SR) & 0x0F)                   /* OR | BF | FE | PE.       */

+    set_error(&SD1, sr);

+  chSysLockFromIsr();

+  sdIncomingDataI(&SD1, UART1_DR);

+  chSysUnlockFromIsr();

+

+  CH_IRQ_EPILOGUE();

+}

+#endif /* USE_STM8_UART1 */

+

+#if USE_STM8_UART3 || defined(__DOXYGEN__)

+CH_IRQ_HANDLER(20) {

+  msg_t b;

+

+  CH_IRQ_PROLOGUE();

+

+  chSysLockFromIsr();

+  b = sdRequestDataI(&SD3);

+  chSysUnlockFromIsr();

+  if (b < Q_OK)

+    UART3_CR2 &= ~0x80;                         /* TIEN.                    */

+  else

+    UART3_DR = b;

+

+  CH_IRQ_EPILOGUE();

+}

+

+CH_IRQ_HANDLER(21) {

+  uint8_t sr = UART3_SR;

+

+  CH_IRQ_PROLOGUE();

+

+  if ((sr = UART3_SR) & 0x0F)                   /* OR | BF | FE | PE.       */

+    set_error(&SD3, sr);

+  chSysLockFromIsr();

+  sdIncomingDataI(&SD3, UART3_DR);

+  chSysUnlockFromIsr();

+

+  CH_IRQ_EPILOGUE();

+}

+#endif /* USE_STM8_UART3 */

+

+/*===========================================================================*/

+/* Driver exported functions.                                                */

+/*===========================================================================*/

+

+/**

+ * @brief   Low level serial driver initialization.
+ */

+void sd_lld_init(void) {

+

+#if USE_STM8_UART1

+  sdObjectInit(&SD1, NULL, notify1);

+  CLK_PCKENR1 |= 4;                         /* PCKEN12, clock source.       */

+  UART1_CR1 = 0x20;                         /* UARTD (low power).           */

+#endif

+

+#if USE_STM8_UART3

+  sdObjectInit(&SD3, NULL, notify3);

+  CLK_PCKENR1 |= 8;                         /* PCKEN13, clock source.       */

+  UART3_CR1 = 0x20;                         /* UARTD (low power).           */

+#endif

+}

+

+/**

+ * @brief   Low level serial driver configuration and (re)start.

+ *

+ * @param[in] sdp       pointer to a @p SerialDriver object

+ */

+void sd_lld_start(SerialDriver *sdp) {

+

+  if (sdp->config == NULL)

+    sdp->config = &default_config;

+

+#if USE_STM8_UART1

+  if (&SD1 == sdp) {

+    uart1_init(sdp->config);

+    return;

+  }

+#endif

+#if USE_STM8_UART3

+  if (&SD3 == sdp) {

+    uart3_init(sdp->config);

+    return;

+  }

+#endif

+}

+

+/**

+ * @brief   Low level serial driver stop.

+ * @details De-initializes the USART, stops the associated clock, resets the

+ *          interrupt vector.

+ *

+ * @param[in] sdp       pointer to a @p SerialDriver object

+ */

+void sd_lld_stop(SerialDriver *sdp) {

+

+#if USE_STM8_UART1

+  if (&SD1 == sdp) {

+    uart1_deinit();

+    return;

+  }

+#endif

+#if USE_STM8_UART3

+  if (&SD3 == sdp) {

+    uart3_deinit();

+    return;

+  }

+#endif

+}

+

+#endif /* CH_HAL_USE_SERIAL */

+

+/** @} */

diff --git a/os/hal/platforms/STM8/serial_lld.h b/os/hal/platforms/STM8/serial_lld.h
new file mode 100644
index 000000000..a67e5246c
--- /dev/null
+++ b/os/hal/platforms/STM8/serial_lld.h
@@ -0,0 +1,159 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file    STM8/serial_lld.h

+ * @brief   STM8 low level serial driver header.

+ *

+ * @addtogroup STM8_SERIAL

+ * @{

+ */

+

+#ifndef _SERIAL_LLD_H_

+#define _SERIAL_LLD_H_

+

+#if CH_HAL_USE_SERIAL || defined(__DOXYGEN__)

+

+/*===========================================================================*/

+/* Driver constants.                                                         */

+/*===========================================================================*/

+

+#define SD_MODE_PARITY          0x07        /**< @brief Parity field mask.  */

+#define SD_MODE_PARITY_NONE     0x00        /**< @brief No parity.          */

+#define SD_MODE_PARITY_EVEN     0x05        /**< @brief Even parity.        */

+#define SD_MODE_PARITY_ODD      0x07        /**< @brief Odd parity.         */

+

+#define SD_MODE_STOP            0x30        /**< @brief Stop bits mask.     */

+#define SD_MODE_STOP_1          0x00        /**< @brief One stop bit.       */

+#define SD_MODE_STOP_2          0x20        /**< @brief Two stop bits.      */

+#define SD_MODE_STOP_1P5        0x30        /**< @brief 1.5 stop bits.      */

+

+/*===========================================================================*/

+/* Driver pre-compile time settings.                                         */

+/*===========================================================================*/

+

+/**

+ * @brief   UART1 driver enable switch.

+ * @details If set to @p TRUE the support for UART1 is included.

+ * @note    The default is @p TRUE.

+ */

+#if !defined(USE_STM8_UART1) || defined(__DOXYGEN__)

+#define USE_STM8_UART1              TRUE

+#endif

+

+/**

+ * @brief   UART3 driver enable switch.

+ * @details If set to @p TRUE the support for UART3 is included.

+ * @note    The default is @p TRUE.

+ */

+#if !defined(USE_STM8_UART3) || defined(__DOXYGEN__)

+#define USE_STM8_UART3              TRUE

+#endif

+

+/*===========================================================================*/

+/* Derived constants and error checks.                                       */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver data structures and types.                                         */

+/*===========================================================================*/

+

+/**

+ * @brief   Serial Driver condition flags type.

+ */

+typedef uint8_t sdflags_t;

+

+/**

+ * @brief   Generic Serial Driver configuration structure.

+ * @details An instance of this structure must be passed to @p sdStart()

+ *          in order to configure and start a serial driver operations.

+ * @note    This structure content is architecture dependent, each driver

+ *          implementation defines its own version and the custom static

+ *          initializers.

+ */

+typedef struct {

+  /**

+   * @brief Bit rate register.

+   */

+  uint16_t                  sc_brr;

+  /**

+   * @brief Mode flags.

+   */

+  uint8_t                   sc_mode;

+} SerialConfig;

+

+/**

+ * @brief   @p SerialDriver specific data.

+ */

+#define _serial_driver_data                                                 \

+  _base_asynchronous_channel_data                                           \

+  /* Driver state.*/                                                        \

+  sdstate_t                 state;                                          \

+  /* Current configuration data.*/                                          \

+  const SerialConfig        *config;                                        \

+  /* Input queue.*/                                                         \

+  InputQueue                iqueue;                                         \

+  /* Output queue.*/                                                        \

+  OutputQueue               oqueue;                                         \

+  /* Status Change @p EventSource.*/                                        \

+  EventSource               sevent;                                         \

+  /* I/O driver status flags.*/                                             \

+  sdflags_t                 flags;                                          \

+  /* Input circular buffer.*/                                               \

+  uint8_t                   ib[SERIAL_BUFFERS_SIZE];                        \

+  /* Output circular buffer.*/                                              \

+  uint8_t                   ob[SERIAL_BUFFERS_SIZE];                        \

+  /* End of the mandatory fields.*/

+

+/*===========================================================================*/

+/* Driver macros.                                                            */

+/*===========================================================================*/

+

+/**

+ * @brief   Macro for baud rate computation.

+ * @note    Make sure the final baud rate is within tolerance.

+ */

+#define BBR(b) (SYSCLK / (b))

+

+/*===========================================================================*/

+/* External declarations.                                                    */

+/*===========================================================================*/

+

+#if USE_STM8_UART1 && !defined(__DOXYGEN__)

+extern SerialDriver SD1;

+#endif

+#if USE_STM8_UART3 && !defined(__DOXYGEN__)

+extern SerialDriver SD3;

+#endif

+

+#ifdef __cplusplus

+extern "C" {

+#endif

+  void sd_lld_init(void);

+  void sd_lld_start(SerialDriver *sdp);

+  void sd_lld_stop(SerialDriver *sdp);

+#ifdef __cplusplus

+}

+#endif

+

+#endif /* CH_HAL_USE_SERIAL */

+

+#endif /* _SERIAL_LLD_H_ */

+

+/** @} */

diff --git a/os/hal/platforms/STM8/stm8.h b/os/hal/platforms/STM8/stm8.h
new file mode 100644
index 000000000..9a7172b71
--- /dev/null
+++ b/os/hal/platforms/STM8/stm8.h
@@ -0,0 +1,41 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+#ifndef _STM8_H_

+#define _STM8_H_

+

+/*

+ * Supported platforms.

+ */

+#define PLATFORM_STM8S208RB     1

+#define PLATFORM_STM8AF51AA     2

+

+#ifndef STM8_PLATFORM

+#error "STM8 platform not defined"

+#endif

+

+#if STM8_PLATFORM == PLATFORM_STM8S208RB

+#include "STM8/STM8S208RB.h"

+#elif STM8_PLATFORM == PLATFORM_STM8AF51AA

+#include "STM8/STM8AF51AA.h"

+#else

+#error "unsupported or invalid STM8 platform"

+#endif

+

+#endif /* _STM8_H_ */