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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-01-08 20:10:20 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-01-08 20:10:20 +0000 |
commit | ab5dc4cae1ee3d7ab47afb58ee9f52056c507d3a (patch) | |
tree | 7ab7f63c1a5c4bdeb6ca7e67aab41accf673962e /os/hal/platforms | |
parent | 7f73cde984a9ce13a3f8308c0c72c394d00af9cc (diff) | |
download | ChibiOS-ab5dc4cae1ee3d7ab47afb58ee9f52056c507d3a.tar.gz ChibiOS-ab5dc4cae1ee3d7ab47afb58ee9f52056c507d3a.tar.bz2 ChibiOS-ab5dc4cae1ee3d7ab47afb58ee9f52056c507d3a.zip |
Fixed bug 3153437.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2623 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms')
-rw-r--r-- | os/hal/platforms/STM32/uart_lld.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/os/hal/platforms/STM32/uart_lld.c b/os/hal/platforms/STM32/uart_lld.c index 5d5f323f1..9769aa090 100644 --- a/os/hal/platforms/STM32/uart_lld.c +++ b/os/hal/platforms/STM32/uart_lld.c @@ -243,7 +243,7 @@ CH_IRQ_HANDLER(DMA1_Ch5_IRQHandler) { /* Receiver in idle state, a callback is generated, if enabled, for each
received character and then the driver stays in the same state.*/
if (uartp->ud_config->uc_rxchar != NULL)
- uartp->ud_config->uc_rxchar(uartp->ud_rxbuf);
+ uartp->ud_config->uc_rxchar(uartp, uartp->ud_rxbuf);
}
else {
/* Receiver in active state, a callback is generated, if enabled, after
@@ -379,7 +379,7 @@ CH_IRQ_HANDLER(DMA1_Ch3_IRQHandler) { /* Receiver in idle state, a callback is generated, if enabled, for each
received character and then the driver stays in the same state.*/
if (uartp->ud_config->uc_rxchar != NULL)
- uartp->ud_config->uc_rxchar(uartp->ud_rxbuf);
+ uartp->ud_config->uc_rxchar(uartp, uartp->ud_rxbuf);
}
else {
/* Receiver in active state, a callback is generated, if enabled, after
@@ -463,11 +463,11 @@ void uart_lld_init(void) { RCC->APB1RSTR = RCC_APB1RSTR_USART3RST;
RCC->APB1RSTR = 0;
uartObjectInit(&UARTD3);
- UARTD2.ud_usart = USART3;
- UARTD2.ud_dmap = STM32_DMA1;
- UARTD2.ud_dmarx = STM32_DMA_CHANNEL_3;
- UARTD2.ud_dmatx = STM32_DMA_CHANNEL_2;
- UARTD2.ud_dmaccr = 0;
+ UARTD3.ud_usart = USART3;
+ UARTD3.ud_dmap = STM32_DMA1;
+ UARTD3.ud_dmarx = STM32_DMA_CHANNEL_3;
+ UARTD3.ud_dmatx = STM32_DMA_CHANNEL_2;
+ UARTD3.ud_dmaccr = 0;
#endif
}
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