Added support for timer 9 to the STM32 PWM driver.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5550 35acf78f-673a-0410-8e92-d51de3d6d3f4

4 files changed, 112 insertions, 3 deletions

diff --git a/os/hal/platforms/STM32/pwm_lld.c b/os/hal/platforms/STM32/pwm_lld.c
index 53859db92..1e9e0adfb 100644
--- a/os/hal/platforms/STM32/pwm_lld.c
+++ b/os/hal/platforms/STM32/pwm_lld.c
@@ -77,12 +77,20 @@ PWMDriver PWMD5;
 

 /**

  * @brief   PWMD8 driver identifier.

- * @note    The driver PWMD5 allocates the timer TIM5 when enabled.

+ * @note    The driver PWMD8 allocates the timer TIM8 when enabled.

  */

 #if STM32_PWM_USE_TIM8 || defined(__DOXYGEN__)

 PWMDriver PWMD8;

 #endif

 

+/**

+ * @brief   PWMD9 driver identifier.

+ * @note    The driver PWMD9 allocates the timer TIM9 when enabled.

+ */

+#if STM32_PWM_USE_TIM9 || defined(__DOXYGEN__)

+PWMDriver PWMD9;

+#endif

+

 /*===========================================================================*/

 /* Driver local variables and types.                                         */

 /*===========================================================================*/

@@ -92,7 +100,8 @@ PWMDriver PWMD8;
 /*===========================================================================*/

 

 #if STM32_PWM_USE_TIM2 || STM32_PWM_USE_TIM3 || STM32_PWM_USE_TIM4 ||       \

-    STM32_PWM_USE_TIM5 || defined(__DOXYGEN__)

+    STM32_PWM_USE_TIM5 || STM32_PWM_USE_TIM8 || STM32_PWM_USE_TIM9 ||       \

+    defined(__DOXYGEN__)

 /**

  * @brief   Common TIM2...TIM5 IRQ handler.

  * @note    It is assumed that the various sources are only activated if the

@@ -308,6 +317,25 @@ CH_IRQ_HANDLER(STM32_TIM8_CC_HANDLER) {
 }

 #endif /* STM32_PWM_USE_TIM8 */

 

+#if STM32_PWM_USE_TIM9

+#if !defined(STM32_TIM9_HANDLER)

+#error "STM32_TIM9_HANDLER not defined"

+#endif

+/**

+ * @brief   TIM9 interrupt handler.

+ *

+ * @isr

+ */

+CH_IRQ_HANDLER(STM32_TIM9_HANDLER) {

+

+  CH_IRQ_PROLOGUE();

+

+  pwm_lld_serve_interrupt(&PWMD9);

+

+  CH_IRQ_EPILOGUE();

+}

+#endif /* STM32_PWM_USE_TIM9 */

+

 /*===========================================================================*/

 /* Driver exported functions.                                                */

 /*===========================================================================*/

@@ -354,6 +382,12 @@ void pwm_lld_init(void) {
   pwmObjectInit(&PWMD8);

   PWMD8.tim = STM32_TIM8;

 #endif

+

+#if STM32_PWM_USE_TIM9

+  /* Driver initialization.*/

+  pwmObjectInit(&PWMD9);

+  PWMD9.tim = STM32_TIM9;

+#endif

 }

 

 /**

@@ -430,6 +464,15 @@ void pwm_lld_start(PWMDriver *pwmp) {
       pwmp->clock = STM32_TIMCLK2;

     }

 #endif

+#if STM32_PWM_USE_TIM9

+    if (&PWMD9 == pwmp) {

+      rccEnableTIM9(FALSE);

+      rccResetTIM9();

+      nvicEnableVector(STM32_TIM9_NUMBER,

+                       CORTEX_PRIORITY_MASK(STM32_PWM_TIM9_IRQ_PRIORITY));

+      pwmp->clock = STM32_TIMCLK1;

+    }

+#endif

 

     /* All channels configured in PWM1 mode with preload enabled and will

        stay that way until the driver is stopped.*/

@@ -605,6 +648,12 @@ void pwm_lld_stop(PWMDriver *pwmp) {
       rccDisableTIM8(FALSE);

     }

 #endif

+#if STM32_PWM_USE_TIM9

+    if (&PWMD9 == pwmp) {

+      nvicDisableVector(STM32_TIM9_NUMBER);

+      rccDisableTIM9(FALSE);

+    }

+#endif

   }

 }

 

diff --git a/os/hal/platforms/STM32/pwm_lld.h b/os/hal/platforms/STM32/pwm_lld.h
index 6b889a4a1..94426e28c 100644
--- a/os/hal/platforms/STM32/pwm_lld.h
+++ b/os/hal/platforms/STM32/pwm_lld.h
@@ -139,6 +139,15 @@
 #endif

 

 /**

+ * @brief   PWMD9 driver enable switch.

+ * @details If set to @p TRUE the support for PWMD9 is included.

+ * @note    The default is @p TRUE.

+ */

+#if !defined(STM32_PWM_USE_TIM9) || defined(__DOXYGEN__)

+#define STM32_PWM_USE_TIM9                  FALSE

+#endif

+

+/**

  * @brief   PWMD1 interrupt priority level setting.

  */

 #if !defined(STM32_PWM_TIM1_IRQ_PRIORITY) || defined(__DOXYGEN__)

@@ -181,6 +190,14 @@
 #endif

 /** @} */

 

+/**

+ * @brief   PWMD9 interrupt priority level setting.

+ */

+#if !defined(STM32_PWM_TIM9_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_PWM_TIM9_IRQ_PRIORITY         7

+#endif

+/** @} */

+

 /*===========================================================================*/

 /* Configuration checks.                                                     */

 /*===========================================================================*/

@@ -209,9 +226,14 @@
 #error "TIM8 not present in the selected device"

 #endif

 

+#if STM32_PWM_USE_TIM9 && !STM32_HAS_TIM9

+#error "TIM9 not present in the selected device"

+#endif

+

 #if !STM32_PWM_USE_TIM1 && !STM32_PWM_USE_TIM2 &&                           \

     !STM32_PWM_USE_TIM3 && !STM32_PWM_USE_TIM4 &&                           \

-    !STM32_PWM_USE_TIM5 && !STM32_PWM_USE_TIM8

+    !STM32_PWM_USE_TIM5 && !STM32_PWM_USE_TIM8 &&                           \

+    !STM32_PWM_USE_TIM8

 #error "PWM driver activated but no TIM peripheral assigned"

 #endif

 

@@ -249,6 +271,11 @@
 #error "Invalid IRQ priority assigned to TIM8"

 #endif

 

+#if STM32_PWM_USE_TIM9 &&                                                   \

+    !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_PWM_TIM9_IRQ_PRIORITY)

+#error "Invalid IRQ priority assigned to TIM9"

+#endif

+

 /*===========================================================================*/

 /* Driver data structures and types.                                         */

 /*===========================================================================*/

@@ -407,6 +434,10 @@ extern PWMDriver PWMD5;
 extern PWMDriver PWMD8;

 #endif

 

+#if STM32_PWM_USE_TIM9 && !defined(__DOXYGEN__)

+extern PWMDriver PWMD9;

+#endif

+

 #ifdef __cplusplus

 extern "C" {

 #endif

diff --git a/os/hal/platforms/STM32F4xx/stm32_isr.h b/os/hal/platforms/STM32F4xx/stm32_isr.h
index 66095c218..2f3664f61 100644
--- a/os/hal/platforms/STM32F4xx/stm32_isr.h
+++ b/os/hal/platforms/STM32F4xx/stm32_isr.h
@@ -85,6 +85,7 @@
 #define STM32_TIM5_HANDLER          TIM5_IRQHandler

 #define STM32_TIM8_UP_HANDLER       TIM8_UP_IRQHandler

 #define STM32_TIM8_CC_HANDLER       TIM8_CC_IRQHandler

+#define STM32_TIM9_HANDLER          TIM9_IRQHandler

 

 #define STM32_TIM1_UP_NUMBER        TIM1_UP_TIM10_IRQn

 #define STM32_TIM1_CC_NUMBER        TIM1_CC_IRQn

@@ -94,6 +95,7 @@
 #define STM32_TIM5_NUMBER           TIM5_IRQn

 #define STM32_TIM8_UP_NUMBER        TIM8_UP_TIM13_IRQn

 #define STM32_TIM8_CC_NUMBER        TIM8_CC_IRQn

+#define STM32_TIM9_NUMBER           TIM1_BRK_TIM9_IRQn

 

 /*

  * USART units.

diff --git a/os/hal/platforms/STM32F4xx/stm32_rcc.h b/os/hal/platforms/STM32F4xx/stm32_rcc.h
index 295bbc5a3..db3f594ee 100644
--- a/os/hal/platforms/STM32F4xx/stm32_rcc.h
+++ b/os/hal/platforms/STM32F4xx/stm32_rcc.h
@@ -915,6 +915,33 @@
  * @api

  */

 #define rccResetTIM8() rccResetAPB2(RCC_APB2RSTR_TIM8RST)

+

+/**

+ * @brief   Disables the TIM9 peripheral clock.

+ * @note    The @p lp parameter is ignored in this family.

+ *

+ * @param[in] lp        low power enable flag

+ *

+ * @api

+ */

+#define rccDisableTIM9(lp) rccDisableAPB2(RCC_APB2ENR_TIM9EN, lp)

+

+/**

+ * @brief   Resets the TIM8 peripheral.

+ *

+ * @api

+ */

+#define rccResetTIM9() rccResetAPB2(RCC_APB2RSTR_TIM9RST)

+

+/**

+ * @brief   Enables the TIM89peripheral clock.

+ * @note    The @p lp parameter is ignored in this family.

+ *

+ * @param[in] lp        low power enable flag

+ *

+ * @api

+ */

+#define rccEnableTIM9(lp) rccEnableAPB2(RCC_APB2ENR_TIM9EN, lp)

 /** @} */

 

 /**