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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-12-31 13:56:40 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-12-31 13:56:40 +0000 |
| commit | 853d2fa07f22a94c8eeaf1c93c45a464743b391c (patch) | |
| tree | 249e4bbb4dabd9b727004cc1c3d74ff2922c5a14 /os/hal/platforms | |
| parent | 046963bc734cfa983ff5db3851c36c678f4db780 (diff) | |
| download | ChibiOS-853d2fa07f22a94c8eeaf1c93c45a464743b391c.tar.gz ChibiOS-853d2fa07f22a94c8eeaf1c93c45a464743b391c.tar.bz2 ChibiOS-853d2fa07f22a94c8eeaf1c93c45a464743b391c.zip | |
STM32F3xx ADC driver complete, added demos in normal and dual mode.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5005 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms')
| -rw-r--r-- | os/hal/platforms/STM32F3xx/adc_lld.c | 7 | ||||
| -rw-r--r-- | os/hal/platforms/STM32F3xx/adc_lld.h | 2 |
2 files changed, 7 insertions, 2 deletions
diff --git a/os/hal/platforms/STM32F3xx/adc_lld.c b/os/hal/platforms/STM32F3xx/adc_lld.c index 0d5bed09d..a35c73c03 100644 --- a/os/hal/platforms/STM32F3xx/adc_lld.c +++ b/os/hal/platforms/STM32F3xx/adc_lld.c @@ -491,8 +491,13 @@ void adc_lld_start_conversion(ADCDriver *adcp) { dmamode |= STM32_DMA_CR_HTIE;
}
dmaStreamSetMemory0(adcp->dmastp, adcp->samples);
- dmaStreamSetTransactionSize(adcp->dmastp, (uint32_t)grpp->num_channels *
+#if STM32_ADC_DUAL_MODE
+ dmaStreamSetTransactionSize(adcp->dmastp, ((uint32_t)grpp->num_channels/2) *
(uint32_t)adcp->depth);
+#else
+ dmaStreamSetTransactionSize(adcp->dmastp, (uint32_t)grpp->num_channels *
+ (uint32_t)adcp->depth);
+#endif
dmaStreamSetMode(adcp->dmastp, dmamode);
dmaStreamEnable(adcp->dmastp);
diff --git a/os/hal/platforms/STM32F3xx/adc_lld.h b/os/hal/platforms/STM32F3xx/adc_lld.h index 127678595..3cd846f20 100644 --- a/os/hal/platforms/STM32F3xx/adc_lld.h +++ b/os/hal/platforms/STM32F3xx/adc_lld.h @@ -135,7 +135,7 @@ #define ADC_CCR_DMACFG_CIRCULAR (1 << 13)
#define ADC_CCR_MDMA_MASK (3 << 14)
#define ADC_CCR_MDMA_DISABLED (0 << 14)
-#define ADC_CCR_MDMA_WORD (1 << 14)
+#define ADC_CCR_MDMA_WORD (2 << 14)
#define ADC_CCR_MDMA_HWORD (3 << 14)
#define ADC_CCR_CKMODE_MASK (3 << 16)
#define ADC_CCR_CKMODE_ADCCK (0 << 16)
|