diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-11-16 21:21:28 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-11-16 21:21:28 +0000 |
| commit | 83d562f6b2842c4ec03ff08662ddc629ccc4e424 (patch) | |
| tree | 4a3e877ce3cb566c1767f87191cc96546897a734 /os/hal/platforms | |
| parent | d70b7e599250fae96dbdc9cbfab11bb9c6d5a649 (diff) | |
| download | ChibiOS-83d562f6b2842c4ec03ff08662ddc629ccc4e424.tar.gz ChibiOS-83d562f6b2842c4ec03ff08662ddc629ccc4e424.tar.bz2 ChibiOS-83d562f6b2842c4ec03ff08662ddc629ccc4e424.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3504 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms')
| -rw-r--r-- | os/hal/platforms/STM32F4xx/adc_lld.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/os/hal/platforms/STM32F4xx/adc_lld.c b/os/hal/platforms/STM32F4xx/adc_lld.c index 97d1623d8..69cef5d57 100644 --- a/os/hal/platforms/STM32F4xx/adc_lld.c +++ b/os/hal/platforms/STM32F4xx/adc_lld.c @@ -170,9 +170,11 @@ void adc_lld_init(void) { ADCD1.dmastp = STM32_DMA_STREAM(STM32_ADC_ADC1_DMA_STREAM);
ADCD1.dmamode = STM32_DMA_CR_CHSEL(ADC1_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_ADC_ADC1_DMA_PRIORITY) |
+ STM32_DMA_CR_DIR_P2M |
STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD |
STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE |
- STM32_DMA_CR_TEIE | STM32_DMA_CR_EN;
+ STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE |
+ STM32_DMA_CR_EN;
#endif
#if STM32_ADC_USE_ADC2
@@ -182,9 +184,11 @@ void adc_lld_init(void) { ADCD2.dmastp = STM32_DMA_STREAM(STM32_ADC_ADC2_DMA_STREAM);
ADCD2.dmamode = STM32_DMA_CR_CHSEL(ADC2_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_ADC_ADC2_DMA_PRIORITY) |
+ STM32_DMA_CR_DIR_P2M |
STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD |
STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE |
- STM32_DMA_CR_TEIE | STM32_DMA_CR_EN;
+ STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE |
+ STM32_DMA_CR_EN;
#endif
#if STM32_ADC_USE_ADC3
@@ -194,9 +198,11 @@ void adc_lld_init(void) { ADCD3.dmastp = STM32_DMA_STREAM(STM32_ADC_ADC3_DMA_STREAM);
ADCD3.dmamode = STM32_DMA_CR_CHSEL(ADC3_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_ADC_ADC3_DMA_PRIORITY) |
+ STM32_DMA_CR_DIR_P2M |
STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD |
STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE |
- STM32_DMA_CR_TEIE | STM32_DMA_CR_EN;
+ STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE |
+ STM32_DMA_CR_EN;
#endif
/* The shared vector is initialized on driver initialization and never
|