aboutsummaryrefslogtreecommitdiffstats
path: root/os/hal/platforms
diff options
context:
space:
mode:
authorbarthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-06-18 14:31:27 +0000
committerbarthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-06-18 14:31:27 +0000
commit79f477ba95384ef082a7f2ec71e228e02e62e864 (patch)
tree14e183910332e525df1033a56f39155029662033 /os/hal/platforms
parentf3e571839bd7649073664d1c2c4ea3842695b6d5 (diff)
downloadChibiOS-79f477ba95384ef082a7f2ec71e228e02e62e864.tar.gz
ChibiOS-79f477ba95384ef082a7f2ec71e228e02e62e864.tar.bz2
ChibiOS-79f477ba95384ef082a7f2ec71e228e02e62e864.zip
I2C. "Slave_addr" and "nbit_addr" fields from I2CSlaveConfig structure merged together.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3057 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms')
-rw-r--r--os/hal/platforms/STM32/i2c_lld.c44
1 files changed, 20 insertions, 24 deletions
diff --git a/os/hal/platforms/STM32/i2c_lld.c b/os/hal/platforms/STM32/i2c_lld.c
index 75dd9d4bc..c56514095 100644
--- a/os/hal/platforms/STM32/i2c_lld.c
+++ b/os/hal/platforms/STM32/i2c_lld.c
@@ -522,19 +522,17 @@ void i2c_lld_master_transmit(I2CDriver *i2cp) {
i2cp->id_i2c->CR2 |= (I2C_CR2_ITERREN|I2C_CR2_ITEVTEN|I2C_CR2_ITBUFEN);
i2cp->id_i2c->CR1 &= ~I2C_CR1_POS;
- switch(i2cp->id_slave_config->nbit_addr){
- case 7:
- // LSB = 0 -> write
- i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr <<1) & 0x00FE);
- break;
- case 10:
- // add the two msb of 10-bit address to the header
- i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr >>7) & 0x0006);
- // add the header bits with LSB = 0 -> write
- i2cp->slave_addr1 |= 0xF0;
- // the remaining 8 bit of 10-bit address
- i2cp->slave_addr2 = i2cp->id_slave_config->slave_addr & 0x00FF;
- break;
+ if(i2cp->id_slave_config->slave_addr & 0x8000){// 10-bit mode used
+ // add the two msb of 10-bit address to the header
+ i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr >>7) & 0x0006);
+ // add the header bits with LSB = 0 -> write
+ i2cp->slave_addr1 |= 0xF0;
+ // the remaining 8 bit of 10-bit address
+ i2cp->slave_addr2 = i2cp->id_slave_config->slave_addr & 0x00FF;
+ }
+ else{
+ // LSB = 0 -> write
+ i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr <<1) & 0x00FE);
}
i2cp->id_slave_config->flags = 0;
@@ -564,19 +562,17 @@ void i2c_lld_master_receive(I2CDriver *i2cp){
i2cp->id_i2c->CR1 |= I2C_CR1_ACK; // acknowledge returned
i2cp->id_i2c->CR1 &= ~I2C_CR1_POS;
- switch(i2cp->id_slave_config->nbit_addr){
- case 7:
+ if(i2cp->id_slave_config->slave_addr & 0x8000){// 10-bit mode used
+ // add the two msb of 10-bit address to the header
+ i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr >>7) & 0x0006);
+ // add the header bits (the LSB -> 1 will be add to second
+ i2cp->slave_addr1 |= 0xF0;
+ // the remaining 8 bit of 10-bit address
+ i2cp->slave_addr2 = i2cp->id_slave_config->slave_addr & 0x00FF;
+ }
+ else{
// LSB = 1 -> receive
i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr <<1) | 0x01);
- break;
- case 10:
- // add the two msb of 10-bit address to the header
- i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr >>7) & 0x0006);
- // add the header bits (the LSB -> 1 will be add to second
- i2cp->slave_addr1 |= 0xF0;
- // the remaining 8 bit of 10-bit address
- i2cp->slave_addr2 = i2cp->id_slave_config->slave_addr & 0x00FF;
- break;
}
i2cp->id_slave_config->flags = I2C_FLG_MASTER_RECEIVER;