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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-05-24 18:47:20 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-05-24 18:47:20 +0000 |
| commit | 5a7b2c4fba9b17cd17c9006704d52cecc7fef169 (patch) | |
| tree | 4023f937aaf526f60f701eb78f9853b2fb5598a5 /os/hal/platforms | |
| parent | 7a6a1679a413987ffa47f2f9892e241f3448f5f0 (diff) | |
| download | ChibiOS-5a7b2c4fba9b17cd17c9006704d52cecc7fef169.tar.gz ChibiOS-5a7b2c4fba9b17cd17c9006704d52cecc7fef169.tar.bz2 ChibiOS-5a7b2c4fba9b17cd17c9006704d52cecc7fef169.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4233 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms')
| -rw-r--r-- | os/hal/platforms/STM32/serial_lld.c | 16 | ||||
| -rw-r--r-- | os/hal/platforms/STM32F0xx/hal_lld.h | 3 |
2 files changed, 4 insertions, 15 deletions
diff --git a/os/hal/platforms/STM32/serial_lld.c b/os/hal/platforms/STM32/serial_lld.c index fdb99cbc8..a2eefc5db 100644 --- a/os/hal/platforms/STM32/serial_lld.c +++ b/os/hal/platforms/STM32/serial_lld.c @@ -98,17 +98,13 @@ static const SerialConfig default_config = static void usart_init(SerialDriver *sdp, const SerialConfig *config) {
USART_TypeDef *u = sdp->usart;
- /*
- * Baud rate setting.
- */
+ /* Baud rate setting.*/
if (sdp->usart == USART1)
u->BRR = STM32_USART1CLK / config->sc_speed;
else
u->BRR = STM32_PCLK / config->sc_speed;
- /*
- * Note that some bits are enforced.
- */
+ /* Note that some bits are enforced.*/
u->CR1 = config->sc_cr1 | USART_CR1_UE | USART_CR1_PEIE |
USART_CR1_RXNEIE | USART_CR1_TE |
USART_CR1_RE;
@@ -215,9 +211,7 @@ static void serve_interrupt(SerialDriver *sdp) { static void usart_init(SerialDriver *sdp, const SerialConfig *config) {
USART_TypeDef *u = sdp->usart;
- /*
- * Baud rate setting.
- */
+ /* Baud rate setting.*/
#if STM32_HAS_USART6
if ((sdp->usart == USART1) || (sdp->usart == USART6))
#else
@@ -227,9 +221,7 @@ static void usart_init(SerialDriver *sdp, const SerialConfig *config) { else
u->BRR = STM32_PCLK1 / config->sc_speed;
- /*
- * Note that some bits are enforced.
- */
+ /* Note that some bits are enforced.*/
u->CR1 = config->sc_cr1 | USART_CR1_UE | USART_CR1_PEIE |
USART_CR1_RXNEIE | USART_CR1_TE |
USART_CR1_RE;
diff --git a/os/hal/platforms/STM32F0xx/hal_lld.h b/os/hal/platforms/STM32F0xx/hal_lld.h index 30a46fa79..f5c32a82d 100644 --- a/os/hal/platforms/STM32F0xx/hal_lld.h +++ b/os/hal/platforms/STM32F0xx/hal_lld.h @@ -223,18 +223,15 @@ */
/* ADC attributes.*/
#define STM32_HAS_ADC1 TRUE
-#define STM32_ADC1_DMA_DEFAULT STM32_DMA_STREAM_ID(1, 0)
#define STM32_ADC1_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 0) | \
STM32_DMA_STREAM_ID_MSK(1, 1))
#define STM32_ADC1_DMA_CHN 0x00000000
#define STM32_HAS_ADC2 FALSE
-#define STM32_ADC2_DMA_DEFAULT 0
#define STM32_ADC2_DMA_MSK 0x00000000
#define STM32_ADC2_DMA_CHN 0x00000000
#define STM32_HAS_ADC3 FALSE
-#define STM32_ADC3_DMA_DEFAULT 0
#define STM32_ADC3_DMA_MSK 0x00000000
#define STM32_ADC3_DMA_CHN 0x00000000
|