git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3179 35acf78f-673a-0410-8e92-d51de3d6d3f4

2 files changed, 109 insertions, 63 deletions

diff --git a/os/hal/platforms/STM32/GPIOv2/pal_lld.c b/os/hal/platforms/STM32/GPIOv2/pal_lld.c
index 3637c99ca..acd2f164d 100644
--- a/os/hal/platforms/STM32/GPIOv2/pal_lld.c
+++ b/os/hal/platforms/STM32/GPIOv2/pal_lld.c
@@ -19,8 +19,8 @@
 */

 

 /**

- * @file    STM32/pal_lld.c

- * @brief   STM32 GPIO low level driver code.

+ * @file    STM32/GPIOv2/pal_lld.c

+ * @brief   STM32L1xx/STM32F2xx GPIO low level driver code.

  *

  * @addtogroup PAL

  * @{

@@ -31,19 +31,27 @@
 

 #if HAL_USE_PAL || defined(__DOXYGEN__)

 

-#if STM32_HAS_GPIOG

-#define APB2_EN_MASK  (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN |            \

-                       RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN |            \

-                       RCC_APB2ENR_IOPEEN | RCC_APB2ENR_IOPFEN |            \

-                       RCC_APB2ENR_IOPGEN | RCC_APB2ENR_AFIOEN)

+#if STM32_HAS_GPIOH

+#define AHB_EN_MASK     (RCC_APBENR_IOPAEN | RCC_APBENR_IOPBEN |            \

+                         RCC_APBENR_IOPCEN | RCC_APBENR_IOPDEN |            \

+                         RCC_APBENR_IOPEEN | RCC_APBENR_IOPFEN |            \

+                         RCC_APBENR_IOPGEN | RCC_APBENR_IOPHEN)

+#define AHB_LPEN_MASK   AHB_EN_MASK

+#elif STM32_HAS_GPIOG

+#define AHB_EN_MASK     (RCC_APBENR_IOPAEN | RCC_APBENR_IOPBEN |            \

+                         RCC_APBENR_IOPCEN | RCC_APBENR_IOPDEN |            \

+                         RCC_APBENR_IOPEEN | RCC_APBENR_IOPFEN |            \

+                         RCC_APBENR_IOPGEN)

+#define AHB_LPEN_MASK   AHB_EN_MASK

 #elif STM32_HAS_GPIOE

-#define APB2_EN_MASK  (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN |            \

-                       RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN |            \

-                       RCC_APB2ENR_IOPEEN | RCC_APB2ENR_AFIOEN)

+#define AHB_EN_MASK     (RCC_APBENR_IOPAEN | RCC_APBENR_IOPBEN |            \

+                         RCC_APBENR_IOPCEN | RCC_APBENR_IOPDEN |            \

+                         RCC_APBENR_IOPEEN)

+#define AHB_LPEN_MASK   AHB_EN_MASK

 #else

-#define APB2_EN_MASK  (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN |            \

-                       RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN |            \

-                       RCC_APB2ENR_AFIOEN)

+#define AHB_EN_MASK     (RCC_APBENR_IOPAEN | RCC_APBENR_IOPBEN |            \

+                         RCC_APBENR_IOPCEN | RCC_APBENR_IOPDEN)

+#define AHB_LPEN_MASK   AHB_EN_MASK

 #endif

 

 /*===========================================================================*/

@@ -58,6 +66,12 @@
 /* Driver local functions.                                                   */

 /*===========================================================================*/

 

+/**

+ * @brief   Initializes a GPIO peripheral.

+ *

+ * @param[in] gpiop     pointer to the GPIO registers block

+ * @param[in] config    pointer to the configuration structure

+ */

 static void initgpio(GPIO_TypeDef *gpiop, const stm32_gpio_setup_t *config) {

 

   gpiop->MODER   = config->moder;

@@ -79,7 +93,7 @@ static void initgpio(GPIO_TypeDef *gpiop, const stm32_gpio_setup_t *config) {
 

 /**

  * @brief   STM32 I/O ports configuration.

- * @details Ports A-D(E, F, G) clocks enabled, AFIO clock enabled.

+ * @details Ports A-D(E, F, G, H) clocks enabled.

  *

  * @param[in] config    the STM32 ports configuration

  *

@@ -90,12 +104,8 @@ void _pal_lld_init(const PALConfig *config) {
   /*

    * Enables the GPIO related clocks.

    */

-  RCC->AHBENR   |= RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN |

-                   RCC_AHBENR_GPIOCEN | RCC_AHBENR_GPIODEN |

-                   RCC_AHBENR_GPIOEEN | RCC_AHBENR_GPIOHEN;

-  RCC->AHBLPENR |= RCC_AHBLPENR_GPIOALPEN | RCC_AHBLPENR_GPIOBLPEN |

-                   RCC_AHBLPENR_GPIOCLPEN | RCC_AHBLPENR_GPIODLPEN |

-                   RCC_AHBLPENR_GPIOELPEN | RCC_AHBLPENR_GPIOHLPEN;

+  RCC->AHBENR   |= AHB_EN_MASK;

+  RCC->AHBLPENR |= AHB_LPEN_MASK;

 

   /*

    * Initial GPIO setup.

@@ -124,10 +134,8 @@ void _pal_lld_init(const PALConfig *config) {
  *          with the specified mode.

  * @note    This function is not meant to be invoked directly by the

  *          application code.

- * @note    @p PAL_MODE_UNCONNECTED is implemented as push pull output at 2MHz.

- * @note    Writing on pads programmed as pull-up or pull-down has the side

- *          effect to modify the resistor setting because the output latched

- *          data is used for the resistor selection.

+ * @note    @p PAL_MODE_UNCONNECTED is implemented as push pull at minimum

+ *          speed.

  *

  * @param[in] port      the port identifier

  * @param[in] mask      the group mask

diff --git a/os/hal/platforms/STM32/GPIOv2/pal_lld.h b/os/hal/platforms/STM32/GPIOv2/pal_lld.h
index 99b4f48f4..748e3be97 100644
--- a/os/hal/platforms/STM32/GPIOv2/pal_lld.h
+++ b/os/hal/platforms/STM32/GPIOv2/pal_lld.h
@@ -19,8 +19,8 @@
 */

 

 /**

- * @file    STM32L1xx/pal_lld.h

- * @brief   STM32L1xx GPIO low level driver header.

+ * @file    STM32/GPIOv2/pal_lld.h

+ * @brief   STM32L1xx/STM32F2xx GPIO low level driver header.

  *

  * @addtogroup PAL

  * @{

@@ -35,6 +35,8 @@
 /* Unsupported modes and specific modes                                      */

 /*===========================================================================*/

 

+/* Overriding standard PAL definitions with STM32-specific enhanced

+   definitions.*/

 #undef PAL_MODE_RESET

 #undef PAL_MODE_UNCONNECTED

 #undef PAL_MODE_INPUT

@@ -44,91 +46,127 @@
 #undef PAL_MODE_OUTPUT_PUSHPULL

 #undef PAL_MODE_OUTPUT_OPENDRAIN

 

-#define PAL_STM32_MODE_MASK             (3 >> 0)

-#define PAL_STM32_MODE_INPUT            (0 >> 0)

-#define PAL_STM32_MODE_OUTPUT           (1 >> 0)

-#define PAL_STM32_MODE_ALTERNATE        (2 >> 0)

-#define PAL_STM32_MODE_ANALOG           (3 >> 0)

+/**

+ * @name    Pads mode PAL flags.

+ * @{

+ */

+#define PAL_STM32_MODE_MASK         (3 >> 0)    /**< @brief Mode field mask.*/

+#define PAL_STM32_MODE_INPUT        (0 >> 0)    /**< @brief Pad mode input. */

+#define PAL_STM32_MODE_OUTPUT       (1 >> 0)    /**< @brief Pad mode output.*/

+#define PAL_STM32_MODE_ALTERNATE    (2 >> 0)    /**< @brief Pad mode alt.   */

+#define PAL_STM32_MODE_ANALOG       (3 >> 0)    /**< @brief Pad mode analog.*/

+/** @} */

 

-#define PAL_STM32_OTYPE_MASK            (1 >> 2)

-#define PAL_STM32_OTYPE_PUSHPULL        (0 >> 2)

-#define PAL_STM32_OTYPE_OPENDRAIN       (1 >> 2)

+/**

+ * @name    Output type PAL flags.

+ * @{

+ */

+#define PAL_STM32_OTYPE_MASK        (1 >> 2)    /**< @brief Output type

+                                                     mask.                  */

+#define PAL_STM32_OTYPE_PUSHPULL    (0 >> 2)    /**< @brief Output is

+                                                     push-pull.             */

+#define PAL_STM32_OTYPE_OPENDRAIN   (1 >> 2)    /**< @brief Output is open

+                                                     drain.                 */

+/** @} */

 

-#define PAL_STM32_OSPEED_MASK           (3 >> 3)

-#define PAL_STM32_OSPEED_400K           (0 >> 3)

-#define PAL_STM32_OSPEED_2M             (1 >> 3)

-#define PAL_STM32_OSPEED_10M            (2 >> 3)

-#define PAL_STM32_OSPEED_40M            (3 >> 3)

+/**

+ * @name    Output pads speed PAL flags.

+ * @{

+ */

+#define PAL_STM32_OSPEED_MASK       (3 >> 3)    /**< @brief Output speed

+                                                     mask.                  */

+#define PAL_STM32_OSPEED(n)         ((n) >> 3)  /**< @brief Speed setting

+                                                     from 0 to 3.           */

+/** @} */

 

-#define PAL_STM32_PUDR_MASK             (3 >> 5)

-#define PAL_STM32_PUDR_FLOATING         (0 >> 5)

-#define PAL_STM32_PUDR_PULLUP           (1 >> 5)

-#define PAL_STM32_PUDR_PULLDOWN         (2 >> 5)

+/**

+ * @name    Pull up/down resistors mode PAL flags.

+ * @{

+ */

+#define PAL_STM32_PUDR_MASK         (3 >> 5)    /**< @brief Resistors mode

+                                                     mask.                  */

+#define PAL_STM32_PUDR_FLOATING     (0 >> 5)    /**< @brief Floating input. */

+#define PAL_STM32_PUDR_PULLUP       (1 >> 5)    /**< @brief Input with

+                                                     pull-up resistor.      */

+#define PAL_STM32_PUDR_PULLDOWN     (2 >> 5)    /**< @brief Input with

+                                                     pull-down resistor.    */

+/** @} */

 

-#define PAL_STM32_ALTERNATE_MASK        (15 >> 7)

-#define PAL_STM32_ALTERNATE(n)          ((n) >> 7)

+/**

+ * @name    Alternate function selection PAL flags.

+ * @{

+ */

+#define PAL_STM32_ALTERNATE_MASK    (15 >> 7)   /**< @brief Alternate function

+                                                     mask.                  */

+#define PAL_STM32_ALTERNATE(n)      ((n) >> 7)  /**< @brief Alternate function

+                                                     setting from 0 to 15.  */

+/** @} */

 

 /**

  * @brief   This mode is implemented as input.

  */

-#define PAL_MODE_RESET                  PAL_STM32_MODE_INPUT

+#define PAL_MODE_RESET              PAL_STM32_MODE_INPUT

 

 /**

  * @brief   This mode is implemented as output.

  */

-#define PAL_MODE_UNCONNECTED            PAL_STM32_MODE_OUTPUT

+#define PAL_MODE_UNCONNECTED        PAL_STM32_MODE_OUTPUT

 

 /**

  * @brief   Regular input high-Z pad.

  */

-#define PAL_MODE_INPUT                  PAL_STM32_MODE_INPUT

+#define PAL_MODE_INPUT              PAL_STM32_MODE_INPUT

 

 /**

  * @brief   Input pad with weak pull up resistor.

  */

-#define PAL_MODE_INPUT_PULLUP           (PAL_STM32_MODE_INPUT |             \

-                                         PAL_STM32_PUDR_PULLUP)

+#define PAL_MODE_INPUT_PULLUP       (PAL_STM32_MODE_INPUT |                 \

+                                     PAL_STM32_PUDR_PULLUP)

 

 /**

  * @brief   Input pad with weak pull down resistor.

  */

-#define PAL_MODE_INPUT_PULLDOWN         (PAL_STM32_MODE_INPUT |             \

-                                         PAL_STM32_PUDR_PULLDOWN)

+#define PAL_MODE_INPUT_PULLDOWN     (PAL_STM32_MODE_INPUT |                 \

+                                     PAL_STM32_PUDR_PULLDOWN)

 

 /**

  * @brief   Analog input mode.

  */

-#define PAL_MODE_INPUT_ANALOG           PAL_STM32_MODE_ANALOG

+#define PAL_MODE_INPUT_ANALOG       PAL_STM32_MODE_ANALOG

 

 /**

  * @brief   Push-pull output pad.

  */

-#define PAL_MODE_OUTPUT_PUSHPULL        (PAL_STM32_MODE_OUTPUT |            \

-                                         PAL_STM32_OTYPE_PUSHPULL)

+#define PAL_MODE_OUTPUT_PUSHPULL    (PAL_STM32_MODE_OUTPUT |                \

+                                     PAL_STM32_OTYPE_PUSHPULL |             \

+                                     PAL_STM32_OSPEED(3))

 

 /**

  * @brief   Open-drain output pad.

  */

-#define PAL_MODE_OUTPUT_OPENDRAIN       (PAL_STM32_MODE_OUTPUT |            \

-                                         PAL_STM32_OTYPE_OPENDRAIN)

+#define PAL_MODE_OUTPUT_OPENDRAIN   (PAL_STM32_MODE_OUTPUT |                \

+                                     PAL_STM32_OTYPE_OPENDRAIN |            \

+                                     PAL_STM32_OSPEED(3))

 

 /**

  * @brief   Alternate push-pull output.

  *

  * @param[in] n         alternate function selector

  */

-#define PAL_MODE_ALTERNATE_PUSHPULL(n)  (PAL_STM32_MODE_ALTERNATE |         \

-                                         PAL_STM32_OTYPE_PUSHPULL |         \

-                                         PAL_STM32_ALTERNATE(n))

+#define PAL_MODE_ALT_PUSHPULL(n)    (PAL_STM32_MODE_ALTERNATE |             \

+                                     PAL_STM32_OTYPE_PUSHPULL |             \

+                                     PAL_STM32_OSPEED(3) |                  \

+                                     PAL_STM32_ALTERNATE(n))

 

 /**

  * @brief   Alternate push-pull output.

  *

  * @param[in] n         alternate function selector

  */

-#define PAL_MODE_ALTERNATE_OPENDRAIN(n) (PAL_STM32_MODE_ALTERNATE |         \

-                                         PAL_STM32_OTYPE_OPENDRAIN |        \

-                                         PAL_STM32_ALTERNATE(n))

+#define PAL_MODE_ALT_OPENDRAIN(n)   (PAL_STM32_MODE_ALTERNATE |             \

+                                     PAL_STM32_OTYPE_OPENDRAIN |            \

+                                     PAL_STM32_OSPEED(3) |                  \

+                                     PAL_STM32_ALTERNATE(n))

 

 /*===========================================================================*/

 /* I/O Ports Types and constants.                                            */