diff options
author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-12-17 11:29:39 +0000 |
---|---|---|
committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-12-17 11:29:39 +0000 |
commit | 478679edd2a5fd14abb3e62f4ae9699a947673b7 (patch) | |
tree | 5fb21be001f12704e6adffa52ea947eeaeafcafc /os/hal/platforms | |
parent | 557d6e7520ac52583ec7df6dcd75008f8dddde3c (diff) | |
download | ChibiOS-478679edd2a5fd14abb3e62f4ae9699a947673b7.tar.gz ChibiOS-478679edd2a5fd14abb3e62f4ae9699a947673b7.tar.bz2 ChibiOS-478679edd2a5fd14abb3e62f4ae9699a947673b7.zip |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4939 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms')
-rw-r--r-- | os/hal/platforms/SPC560BCxx/hal_lld.c | 6 | ||||
-rw-r--r-- | os/hal/platforms/SPC560Pxx/hal_lld.c | 2 |
2 files changed, 4 insertions, 4 deletions
diff --git a/os/hal/platforms/SPC560BCxx/hal_lld.c b/os/hal/platforms/SPC560BCxx/hal_lld.c index c29247d5c..cfd931349 100644 --- a/os/hal/platforms/SPC560BCxx/hal_lld.c +++ b/os/hal/platforms/SPC560BCxx/hal_lld.c @@ -110,17 +110,17 @@ void spc_clock_init(void) { while (!ME.GS.B.S_FIRC)
;
+#if !SPC5_NO_INIT
+
/* Oscillators dividers setup.*/
CGM.FIRC_CTL.B.RCDIV = SPC5_IRCDIV_VALUE - 1;
CGM.FXOSC_CTL.B.OSCDIV = SPC5_XOSCDIV_VALUE - 1;
-#if !SPC5_NO_INIT
-
#if defined(SPC5_OSC_BYPASS)
/* If the board is equipped with an oscillator instead of a xtal then the
bypass must be activated.*/
CGM.OSC_CTL.B.OSCBYP = TRUE;
-#endif /* SPC5_ENABLE_XOSC */
+#endif /* SPC5_OSC_BYPASS */
/* Initialization of the FMPLLs settings.*/
CGM.FMPLL_CR.R = SPC5_FMPLL0_ODF |
diff --git a/os/hal/platforms/SPC560Pxx/hal_lld.c b/os/hal/platforms/SPC560Pxx/hal_lld.c index 638557ddb..603df7aba 100644 --- a/os/hal/platforms/SPC560Pxx/hal_lld.c +++ b/os/hal/platforms/SPC560Pxx/hal_lld.c @@ -116,7 +116,7 @@ void spc_clock_init(void) { /* If the board is equipped with an oscillator instead of a xtal then the
bypass must be activated.*/
CGM.OSC_CTL.B.OSCBYP = TRUE;
-#endif /* SPC5_ENABLE_XOSC */
+#endif /* SPC5_OSC_BYPASS */
/* Initialization of the FMPLLs settings.*/
CGM.FMPLL[0].CR.R = SPC5_FMPLL0_ODF |
|