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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-11-20 15:53:33 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-11-20 15:53:33 +0000 |
commit | 24c823f54822a2abc01a9d4e6f6dcf9c31a4e8e3 (patch) | |
tree | de566c634f2cd78d9372e8308ca64233bdaf5d76 /os/hal/platforms | |
parent | 4fa5db982c206a4ab3f512d4651f15dd4367e08b (diff) | |
download | ChibiOS-24c823f54822a2abc01a9d4e6f6dcf9c31a4e8e3.tar.gz ChibiOS-24c823f54822a2abc01a9d4e6f6dcf9c31a4e8e3.tar.bz2 ChibiOS-24c823f54822a2abc01a9d4e6f6dcf9c31a4e8e3.zip |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4834 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms')
-rw-r--r-- | os/hal/platforms/SPC560BCxx/spc560bc_registry.h | 25 | ||||
-rw-r--r-- | os/hal/platforms/SPC560Pxx/spc560p_registry.h | 2 | ||||
-rw-r--r-- | os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c | 6 | ||||
-rw-r--r-- | os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h | 28 |
4 files changed, 51 insertions, 10 deletions
diff --git a/os/hal/platforms/SPC560BCxx/spc560bc_registry.h b/os/hal/platforms/SPC560BCxx/spc560bc_registry.h index 1390b6575..6fe68be87 100644 --- a/os/hal/platforms/SPC560BCxx/spc560bc_registry.h +++ b/os/hal/platforms/SPC560BCxx/spc560bc_registry.h @@ -56,16 +56,31 @@ #define SPC5_LINFLEX1_TXI_NUMBER 100
#define SPC5_LINFLEX1_ERR_NUMBER 101
-#define SPC5_HAS_LINFLEX2 FALSE
+#define SPC5_HAS_LINFLEX2 TRUE
+#define SPC5_LINFLEX2_PCTL 50
+#define SPC5_LINFLEX2_RXI_HANDLER vector119
+#define SPC5_LINFLEX2_TXI_HANDLER vector120
+#define SPC5_LINFLEX2_ERR_HANDLER vector121
+#define SPC5_LINFLEX2_RXI_NUMBER 119
+#define SPC5_LINFLEX2_TXI_NUMBER 120
+#define SPC5_LINFLEX2_ERR_NUMBER 121
-#define SPC5_HAS_LINFLEX3 FALSE
+#define SPC5_HAS_LINFLEX3 TRUE
+#define SPC5_LINFLEX3_PCTL 51
+#define SPC5_LINFLEX3_RXI_HANDLER vector122
+#define SPC5_LINFLEX3_TXI_HANDLER vector123
+#define SPC5_LINFLEX3_ERR_HANDLER vector124
+#define SPC5_LINFLEX3_RXI_NUMBER 122
+#define SPC5_LINFLEX3_TXI_NUMBER 123
+#define SPC5_LINFLEX3_ERR_NUMBER 124
/* SIU/SIUL attributes.*/
#define SPC5_HAS_SIU FALSE
+#define SPC5_SIU_PCTL 68
#define SPC5_SIU_SUPPORTS_PORTS TRUE
-#define SPC5_SIU_NUM_PORTS 4
-#define SPC5_SIU_NUM_PCRS 108
-#define SPC5_SIU_NUM_PADSELS 36
+#define SPC5_SIU_NUM_PORTS 8
+#define SPC5_SIU_NUM_PCRS 123
+#define SPC5_SIU_NUM_PADSELS 32
/** @} */
#endif /* _SPC560BC_REGISTRY_H_ */
diff --git a/os/hal/platforms/SPC560Pxx/spc560p_registry.h b/os/hal/platforms/SPC560Pxx/spc560p_registry.h index bb55dede0..714455d51 100644 --- a/os/hal/platforms/SPC560Pxx/spc560p_registry.h +++ b/os/hal/platforms/SPC560Pxx/spc560p_registry.h @@ -63,7 +63,7 @@ /* SIU/SIUL attributes.*/
#define SPC5_HAS_SIU FALSE
#define SPC5_SIU_SUPPORTS_PORTS TRUE
-#define SPC5_SIU_NUM_PORTS 4
+#define SPC5_SIU_NUM_PORTS 8
#define SPC5_SIU_NUM_PCRS 108
#define SPC5_SIU_NUM_PADSELS 36
/** @} */
diff --git a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c index edb4934ba..e098391ce 100644 --- a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c +++ b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.c @@ -65,6 +65,12 @@ void _pal_lld_init(const PALConfig *config) {
unsigned i;
+#if defined(SPC5_SIU_PCTL)
+ /* SIUL clock gating if present.*/
+ halSPCSetPeripheralClockMode(SPC5_SIU_PCTL,
+ SPC5_ME_PCTL_RUN(2) | SPC5_ME_PCTL_LP(2));
+#endif
+
/* Initialize PCR registers for undefined pads.*/
for (i = 0; i < SPC5_SIU_NUM_PCRS; i++)
SIU.PCR[i].R = config->default_mode;
diff --git a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h index 74d2e4920..a766e1e64 100644 --- a/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h +++ b/os/hal/platforms/SPC5xx/SIUL_v1/pal_lld.h @@ -175,25 +175,45 @@ typedef struct { /*===========================================================================*/
/**
- * @brief I/O port 1 identifier.
+ * @brief I/O port A identifier.
*/
#define PA 0
/**
- * @brief I/O port 2 identifier.
+ * @brief I/O port B identifier.
*/
#define PB 1
/**
- * @brief I/O port 3 identifier.
+ * @brief I/O port C identifier.
*/
#define PC 2
/**
- * @brief I/O port 4 identifier.
+ * @brief I/O port D identifier.
*/
#define PD 3
+/**
+ * @brief I/O port E identifier.
+ */
+#define PE 4
+
+/**
+ * @brief I/O port F identifier.
+ */
+#define PF 5
+
+/**
+ * @brief I/O port G identifier.
+ */
+#define PG 6
+
+/**
+ * @brief I/O port H identifier.
+ */
+#define PH 7
+
/*===========================================================================*/
/* Implementation, some of the following macros could be implemented as */
/* functions, if so please put them in pal_lld.c. */
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