diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-01-30 19:18:26 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-01-30 19:18:26 +0000 |
| commit | 22781883e073a764779a36fe1a0b02baf8f946a0 (patch) | |
| tree | b9a5f809075416413e9f323b18b4120f516e5917 /os/hal/platforms | |
| parent | 5e31d55f748df66a6fef7570b4c11947e360d3fa (diff) | |
| download | ChibiOS-22781883e073a764779a36fe1a0b02baf8f946a0.tar.gz ChibiOS-22781883e073a764779a36fe1a0b02baf8f946a0.tar.bz2 ChibiOS-22781883e073a764779a36fe1a0b02baf8f946a0.zip | |
Merged the USB branch and made the needed adjustments, not tested yet.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2695 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms')
| -rw-r--r-- | os/hal/platforms/STM32/platform.mk | 1 | ||||
| -rw-r--r-- | os/hal/platforms/STM32/stm32_usb.h | 221 | ||||
| -rw-r--r-- | os/hal/platforms/STM32/usb_lld.c | 507 | ||||
| -rw-r--r-- | os/hal/platforms/STM32/usb_lld.h | 284 |
4 files changed, 1013 insertions, 0 deletions
diff --git a/os/hal/platforms/STM32/platform.mk b/os/hal/platforms/STM32/platform.mk index 35e732116..ceadcea62 100644 --- a/os/hal/platforms/STM32/platform.mk +++ b/os/hal/platforms/STM32/platform.mk @@ -7,6 +7,7 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/STM32/hal_lld.c \ ${CHIBIOS}/os/hal/platforms/STM32/serial_lld.c \
${CHIBIOS}/os/hal/platforms/STM32/spi_lld.c \
${CHIBIOS}/os/hal/platforms/STM32/uart_lld.c \
+ ${CHIBIOS}/os/hal/platforms/STM32/usb_lld.c \
${CHIBIOS}/os/hal/platforms/STM32/stm32_dma.c
# Required include directories
diff --git a/os/hal/platforms/STM32/stm32_usb.h b/os/hal/platforms/STM32/stm32_usb.h new file mode 100644 index 000000000..8c04ba85f --- /dev/null +++ b/os/hal/platforms/STM32/stm32_usb.h @@ -0,0 +1,221 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file stm32_usb.h
+ * @brief STM32 USB registers layout header.
+ * @note This file requires definitions from the ST STM32 header file
+ * stm3232f10x.h.
+ *
+ * @addtogroup STM32_USB
+ * @{
+ */
+
+#ifndef _STM32_USB_H_
+#define _STM32_USB_H_
+
+/**
+ * @brief Number of the available endpoints.
+ * @details This value does not include the endpoint 0 which is always present.
+ */
+#define USB_ENDOPOINTS_NUMBER 7
+
+/**
+ * @brief USB registers block.
+ */
+typedef struct {
+ /**
+ * @brief Endpoint registers.
+ */
+ volatile uint32_t EPR[USB_ENDOPOINTS_NUMBER + 1];
+ /*
+ * @brief Reserved space.
+ */
+ volatile uint32_t _r20[8];
+ /*
+ * @brief Control Register.
+ */
+ volatile uint32_t CNTR;
+ /*
+ * @brief Interrupt Status Register.
+ */
+ volatile uint32_t ISTR;
+ /*
+ * @brief Frame Number Register.
+ */
+ volatile uint32_t FNR;
+ /*
+ * @brief Device Address Register.
+ */
+ volatile uint32_t DADDR;
+ /*
+ * @brief Buffer Table Address.
+ */
+ volatile uint32_t BTABLE;
+} stm32_usb_t;
+
+/**
+ * @brief USB descriptor registers block.
+ */
+typedef struct {
+ /**
+ * @brief TX buffer offset register.
+ */
+ volatile uint32_t TXADDR;
+ /**
+ * @brief TX counter register.
+ */
+ volatile uint32_t TXCOUNT;
+ /**
+ * @brief RX buffer offset register.
+ */
+ volatile uint32_t RXADDR;
+ /**
+ * @brief RX counter register.
+ */
+ volatile uint32_t RXCOUNT;
+} stm32_usb_descriptor_t;
+
+/**
+ * @brief USB registers block numeric address.
+ */
+#define STM32_USB_BASE (APB1PERIPH_BASE + 0x5C00)
+
+/**
+ * @brief USB RAM numeric address.
+ */
+#define STM32_USBRAM_BASE (APB1PERIPH_BASE + 0x6000)
+
+/**
+ * @brief Pointer to the USB registers block.
+ */
+#define STM32_USB ((stm32_usb_t *)STM32_USB_BASE)
+
+/**
+ * @brief Pointer to the USB RAM.
+ */
+#define STM32_USBRAM ((uint32_t *)STM32_USBRAM_BASE)
+
+/**
+ * @brief Mask of all the toggling bits in the EPR register.
+ */
+#define EPR_TOGGLE_MASK (EPR_STAT_TX_MASK | EPR_DTOG_TX | \
+ EPR_STAT_RX_MASK | EPR_DTOG_RX | \
+ EPR_SETUP)
+
+#define EPR_EA_MASK 0x000F
+#define EPR_STAT_TX_MASK 0x0030
+#define EPR_STAT_TX_DIS 0x0000
+#define EPR_STAT_TX_STALL 0x0010
+#define EPR_STAT_TX_NAK 0x0020
+#define EPR_STAT_TX_VALID 0x0030
+#define EPR_DTOG_TX 0x0040
+#define EPR_CTR_TX 0x0080
+#define EPR_EP_KIND 0x0100
+#define EPR_EP_TYPE_MASK 0x0600
+#define EPR_EP_TYPE_BULK 0x0000
+#define EPR_EP_TYPE_CONTROL 0x0200
+#define EPR_EP_TYPE_ISO 0x0400
+#define EPR_EP_TYPE_INTERRUPT 0x0600
+#define EPR_SETUP 0x0800
+#define EPR_STAT_RX_MASK 0x3000
+#define EPR_STAT_RX_DIS 0x0000
+#define EPR_STAT_RX_STALL 0x1000
+#define EPR_STAT_RX_NAK 0x2000
+#define EPR_STAT_RX_VALID 0x3000
+#define EPR_DTOG_RX 0x4000
+#define EPR_CTR_RX 0x8000
+
+#define CNTR_FRES 0x0001
+#define CNTR_PDWN 0x0002
+#define CNTR_LP_MODE 0x0004
+#define CNTR_FSUSP 0x0008
+#define CNTR_RESUME 0x0010
+#define CNTR_ESOFM 0x0100
+#define CNTR_SOFM 0x0200
+#define CNTR_RESETM 0x0400
+#define CNTR_SUSPM 0x0800
+#define CNTR_WKUPM 0x1000
+#define CNTR_ERRM 0x2000
+#define CNTR_PMAOVRM 0x4000
+#define CNTR_CTRM 0x8000
+
+#define ISTR_EP_ID_MASK 0x000F
+#define ISTR_DIR 0x0010
+#define ISTR_ESOF 0x0100
+#define ISTR_SOF 0x0200
+#define ISTR_RESET 0x0400
+#define ISTR_SUSP 0x0800
+#define ISTR_WKUP 0x1000
+#define ISTR_ERR 0x2000
+#define ISTR_PMAOVR 0x4000
+#define ISTR_CTR 0x8000
+
+#define FNR_FN_MASK 0x07FF
+#define FNR_LSOF 0x1800
+#define FNR_LCK 0x2000
+#define FNR_RXDM 0x4000
+#define FNR_RXDP 0x8000
+
+#define DADDR_ADD_MASK 0x007F
+#define DADDR_EF 0x0080
+
+#define RXCOUNT_COUNT_MASK 0x03FF
+#define TXCOUNT_COUNT_MASK 0x03FF
+
+#define EPR_SET(ep, epr) \
+ STM32_USB->EPR[ep] = (epr) & ~EPR_TOGGLE_MASK
+
+#define EPR_TOGGLE(ep, epr) \
+ STM32_USB->EPR[ep] = (STM32_USB->EPR[ep] ^ ((epr) & EPR_TOGGLE_MASK))
+
+#define EPR_SET_STAT_RX(ep, epr) \
+ STM32_USB->EPR[ep] = (STM32_USB->EPR[ep] & \
+ ~(EPR_TOGGLE_MASK & ~EPR_STAT_RX_MASK)) ^ \
+ (epr)
+
+#define EPR_SET_STAT_TX(ep, epr) \
+ STM32_USB->EPR[ep] = (STM32_USB->EPR[ep] & \
+ ~(EPR_TOGGLE_MASK & ~EPR_STAT_TX_MASK)) ^ \
+ (epr)
+
+#define EPR_CLEAR_CTR_RX(ep) \
+ STM32_USB->EPR[ep] &= ~EPR_CTR_RX & ~EPR_TOGGLE_MASK
+
+#define EPR_CLEAR_CTR_TX(ep) \
+ STM32_USB->EPR[ep] &= ~EPR_CTR_TX & ~EPR_TOGGLE_MASK
+
+/**
+ * @brief Returns an endpoint descriptor pointer.
+ */
+#define USB_GET_DESCRIPTOR(ep) \
+ ((stm32_usb_descriptor_t *)((uint32_t)STM32_USBRAM_BASE + \
+ (uint32_t)STM32_USB->BTABLE * 2 + \
+ (uint32_t)(ep) * \
+ sizeof(stm32_usb_descriptor_t)))
+
+/**
+ * @brief Converts from a PMA address to a physical address.
+ */
+#define USB_ADDR2PTR(addr) \
+ ((uint32_t *)((addr) * 2 + STM32_USBRAM_BASE))
+
+#endif /* _STM32_USB_H_ */
+
+/** @} */
diff --git a/os/hal/platforms/STM32/usb_lld.c b/os/hal/platforms/STM32/usb_lld.c new file mode 100644 index 000000000..91be0f625 --- /dev/null +++ b/os/hal/platforms/STM32/usb_lld.c @@ -0,0 +1,507 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file STM32/usb_lld.c
+ * @brief STM32 USB subsystem low level driver source.
+ *
+ * @addtogroup USB
+ * @{
+ */
+
+#include "ch.h"
+#include "hal.h"
+#include "usb.h"
+
+#if HAL_USE_USB || defined(__DOXYGEN__)
+
+#define BTABLE_ADDR 0x0000
+
+/*===========================================================================*/
+/* Driver exported variables. */
+/*===========================================================================*/
+
+/** @brief USB1 driver identifier.*/
+#if STM32_USB_USE_USB1 || defined(__DOXYGEN__)
+USBDriver USBD1;
+#endif
+
+/**
+ * @brief EP0 initialization structure.
+ */
+const USBEndpointConfig usb_lld_ep0config = {
+ _usb_ep0in,
+ _usb_ep0out,
+ 0x40,
+ 0x40,
+ EPR_EP_TYPE_CONTROL | EPR_STAT_TX_STALL | EPR_STAT_RX_VALID,
+ 0x40,
+ 0x80
+};
+
+/*===========================================================================*/
+/* Driver local variables. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local functions. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver interrupt handlers. */
+/*===========================================================================*/
+
+#if STM32_USB_USE_USB1 || defined(__DOXYGEN__)
+/**
+ * @brief USB high priority interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(USB_HP_IRQHandler) {
+
+ CH_IRQ_PROLOGUE();
+
+ CH_IRQ_EPILOGUE();
+}
+
+/**
+ * @brief USB low priority interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(USB_LP_IRQHandler) {
+ uint32_t istr;
+ USBDriver *usbp = &USBD1;
+
+ CH_IRQ_PROLOGUE();
+
+ istr = STM32_USB->ISTR;
+
+ /* USB bus reset condition handling.*/
+ if (istr & ISTR_RESET) {
+ _usb_reset(usbp);
+ if (usbp->usb_config->uc_event_cb)
+ usbp->usb_config->uc_event_cb(usbp, USB_EVENT_RESET);
+ STM32_USB->ISTR = ~ISTR_RESET;
+ }
+
+ /* SOF handling.*/
+ if (istr & ISTR_SOF) {
+ if (usbp->usb_config->uc_sof_cb)
+ usbp->usb_config->uc_sof_cb(usbp);
+ STM32_USB->ISTR = ~ISTR_SOF;
+ }
+
+ /* Endpoint events handling.*/
+ while (istr & ISTR_CTR) {
+ uint32_t ep;
+ uint32_t epr = STM32_USB->EPR[ep = istr & ISTR_EP_ID_MASK];
+
+ if (epr & EPR_CTR_TX) {
+ /* IN endpoint, transmission.*/
+ EPR_CLEAR_CTR_TX(ep);
+ if (usbp->usb_epc[ep]->uepc_in_cb)
+ usbp->usb_epc[ep]->uepc_in_cb(usbp, ep);
+ }
+ if (epr & EPR_CTR_RX) {
+ /* OUT endpoint, receive.*/
+ EPR_CLEAR_CTR_RX(ep);
+ if (usbp->usb_epc[ep]->uepc_out_cb)
+ usbp->usb_epc[ep]->uepc_out_cb(usbp, ep);
+ }
+ istr = STM32_USB->ISTR;
+ }
+
+ CH_IRQ_EPILOGUE();
+}
+#endif
+
+/*===========================================================================*/
+/* Driver exported functions. */
+/*===========================================================================*/
+
+/**
+ * @brief Low level USB driver initialization.
+ *
+ * @notapi
+ */
+void usb_lld_init(void) {
+
+ /* USB reset, ensures reset state in order to avoid trouble with JTAGs.*/
+ RCC->APB1RSTR = RCC_APB1RSTR_USBRST;
+ RCC->APB1RSTR = 0;
+
+ /* Driver initialization.*/
+ usbObjectInit(&USBD1);
+}
+
+/**
+ * @brief Configures and activates the USB peripheral.
+ *
+ * @param[in] usbp pointer to the @p USBDriver object
+ *
+ * @notapi
+ */
+void usb_lld_start(USBDriver *usbp) {
+
+ if (usbp->usb_state == USB_STOP) {
+ /* Clock activation.*/
+#if STM32_USB_USE_USB1
+ if (&USBD1 == usbp) {
+ /* USB clock enabled.*/
+ RCC->APB1ENR |= RCC_APB1ENR_USBEN;
+ /* Powers up the transceiver while holding the USB in reset state.*/
+ STM32_USB->CNTR = CNTR_FRES;
+ /* Enabling the USB IRQ vectors, this also gives enough time to allow
+ the transceiver power up (1uS).*/
+ NVICEnableVector(USB_HP_CAN1_TX_IRQn,
+ CORTEX_PRIORITY_MASK(STM32_USB_USB1_HP_IRQ_PRIORITY));
+ NVICEnableVector(USB_LP_CAN1_RX0_IRQn,
+ CORTEX_PRIORITY_MASK(STM32_USB_USB1_LP_IRQ_PRIORITY));
+
+ /* Reset procedure enforced on driver start.*/
+ _usb_reset(&USBD1);
+ }
+#endif
+ }
+ /* Configuration.*/
+}
+
+/**
+ * @brief Deactivates the USB peripheral.
+ *
+ * @param[in] usbp pointer to the @p USBDriver object
+ *
+ * @notapi
+ */
+void usb_lld_stop(USBDriver *usbp) {
+
+ /* If in ready state then disables the USB clock.*/
+ if (usbp->usb_state == USB_STOP) {
+#if STM32_ADC_USE_ADC1
+ if (&USBD1 == usbp) {
+ NVICDisableVector(USB_HP_CAN1_TX_IRQn);
+ NVICDisableVector(USB_LP_CAN1_RX0_IRQn);
+ RCC->APB1ENR &= ~RCC_APB1ENR_USBEN;
+ }
+#endif
+ }
+}
+
+/**
+ * @brief USB low level reset routine.
+ *
+ * @param[in] usbp pointer to the @p USBDriver object
+ *
+ * @notapi
+ */
+void usb_lld_reset(USBDriver *usbp) {
+ uint32_t cntr;
+
+ /* Powers up the transceiver while holding the USB in reset state.*/
+ STM32_USB->CNTR = CNTR_FRES;
+
+ /* Releases the USB reset, BTABLE is reset to zero.*/
+ STM32_USB->CNTR = 0;
+ STM32_USB->ISTR = 0;
+ STM32_USB->DADDR = DADDR_EF;
+ cntr = /*CNTR_ESOFM | */ CNTR_RESETM | /*CNTR_SUSPM |*/
+ /*CNTR_WKUPM | CNTR_ERRM | CNTR_PMAOVRM |*/ CNTR_CTRM;
+ /* The SOF interrupt is only enabled if a callback is defined for
+ this service because it is an high rate source.*/
+ if (usbp->usb_config->uc_sof_cb != NULL)
+ cntr |= CNTR_SOFM;
+ STM32_USB->CNTR = cntr;
+}
+
+/**
+ * @brief Sets the USB address.
+ *
+ * @param[in] usbp pointer to the @p USBDriver object
+ * @param[in] addr the USB address
+ *
+ * @notapi
+ */
+void usb_lld_set_address(USBDriver *usbp, uint8_t addr) {
+
+ STM32_USB->DADDR = (uint32_t)addr | DADDR_EF;
+}
+
+/**
+ * @brief Enables an endpoint.
+ *
+ * @param[in] usbp pointer to the @p USBDriver object
+ * @param[in] ep endpoint number
+ * @param[in] epcp the endpoint configuration
+ *
+ * @notapi
+ */
+void usb_lld_enable_endpoint(USBDriver *usbp, usbep_t ep,
+ const USBEndpointConfig *epcp) {
+ uint16_t nblocks;
+ stm32_usb_descriptor_t *dp;
+
+ /* EPxR register setup.*/
+ EPR_SET(ep, epcp->uepc_epr | ep);
+ EPR_TOGGLE(ep, epcp->uepc_epr);
+
+ /* Endpoint size and address initialization.*/
+ if (epcp->uepc_out_maxsize > 62)
+ nblocks = (((((epcp->uepc_out_maxsize - 1) | 0x1f) + 1) / 32) << 10) | 0x8000;
+ else
+ nblocks = ((((epcp->uepc_out_maxsize - 1) | 1) + 1) / 2) << 10;
+ dp = USB_GET_DESCRIPTOR(ep);
+ dp->TXCOUNT = 0;
+ dp->RXCOUNT = nblocks;
+ dp->TXADDR = epcp->uepc_inaddr;
+ dp->RXADDR = epcp->uepc_outaddr;
+
+ /* Logically enabling the endpoint in the USBDriver structure.*/
+ usbp->usb_epc[ep] = epcp;
+}
+
+/**
+ * @brief Disables all the active endpoints except the endpoint zero.
+ *
+ * @param[in] usbp pointer to the @p USBDriver object
+ *
+ * @notapi
+ */
+void usb_lld_disable_endpoints(USBDriver *usbp) {
+ unsigned i;
+
+ for (i = 1; i <= USB_ENDOPOINTS_NUMBER; i++) {
+ EPR_TOGGLE(i, 0);
+ EPR_SET(i, 0);
+ }
+
+}
+
+/**
+ * @brief Returns the number of bytes readable from the receive packet
+ * buffer.
+ *
+ * @param[in] usbp pointer to the @p USBDriver object
+ * @param[in] ep endpoint number
+ * @return The number of bytes that are effectively available.
+ * @retval 0 Data not yet available.
+ *
+ * @notapi
+ */
+size_t usb_lld_get_readable(USBDriver *usbp, usbep_t ep) {
+
+ if ((STM32_USB->EPR[ep] & EPR_STAT_RX_MASK) != EPR_STAT_RX_NAK)
+ return 0;
+ return (size_t)(USB_GET_DESCRIPTOR(ep)->RXCOUNT & RXCOUNT_COUNT_MASK);
+}
+
+/**
+ * @brief Endpoint read.
+ * @details The buffered packet is copied into the user buffer and then
+ * the endpoint is brought to the valid state in order to allow
+ * reception of more data.
+ *
+ * @param[in] usbp pointer to the @p USBDriver object
+ * @param[in] ep endpoint number
+ * @param[out] buf buffer where to copy the endpoint data
+ * @param[in] n maximum number of bytes to copy
+ * @return The number of bytes that were effectively available.
+ * @retval 0 Data not yet available.
+ *
+ * @notapi
+ */
+size_t usb_lld_read(USBDriver *usbp, usbep_t ep, uint8_t *buf, size_t n) {
+ uint32_t *pmap;
+ stm32_usb_descriptor_t *udp;
+ size_t count;
+
+ if ((STM32_USB->EPR[ep] & EPR_STAT_RX_MASK) != EPR_STAT_RX_NAK)
+ return 0;
+
+ udp = USB_GET_DESCRIPTOR(ep);
+ pmap = USB_ADDR2PTR(udp->RXADDR);
+ count = udp->RXCOUNT & RXCOUNT_COUNT_MASK;
+ if (n > count)
+ n = count;
+ count = (n + 1) / 2;
+ while (count) {
+ *(uint16_t *)buf = (uint16_t)*pmap++;
+ buf += 2;
+ count--;
+ }
+ EPR_SET_STAT_RX(ep, EPR_STAT_RX_VALID);
+ return n;
+}
+/**
+ * @brief Returns the number of bytes writeable to the transmit packet
+ * buffer.
+ *
+ * @param[in] usbp pointer to the @p USBDriver object
+ * @param[in] ep endpoint number
+ * @return The number of bytes that can be written.
+ * @retval 0 Endpoint not ready for transmission.
+ *
+ * @iclass
+ */
+size_t usb_lld_get_writeable(USBDriver *usbp, usbep_t ep) {
+
+ if ((STM32_USB->EPR[ep] & EPR_STAT_TX_MASK) != EPR_STAT_TX_NAK)
+ return 0;
+ return (size_t)usbp->usb_epc[ep]->uepc_in_maxsize;
+}
+
+/**
+ * @brief Endpoint write.
+ * @details The user data is copied in the packer memory and then
+ * the endpoint is brought to the valid state in order to allow
+ * transmission.
+ *
+ * @param[in] usbp pointer to the @p USBDriver object
+ * @param[in] ep endpoint number
+ * @param[in] buf buffer where to copy the endpoint data
+ * @param[in] n maximum number of bytes to copy
+ * @return The number of bytes that were effectively written.
+ * @retval 0 Endpoint not ready for transmission.
+ *
+ * @notapi
+ */
+size_t usb_lld_write(USBDriver *usbp, usbep_t ep,
+ const uint8_t *buf,
+ size_t n) {
+ uint32_t *pmap;
+ stm32_usb_descriptor_t *udp;
+ size_t count;
+
+ if ((STM32_USB->EPR[ep] & EPR_STAT_TX_MASK) != EPR_STAT_TX_NAK)
+ return 0;
+
+ udp = USB_GET_DESCRIPTOR(ep);
+ pmap = USB_ADDR2PTR(udp->TXADDR);
+ udp->TXCOUNT = n;
+ count = (n + 1) / 2;
+ while (count) {
+ *pmap++ = *(uint16_t *)buf;
+ buf += 2;
+ count--;
+ }
+ EPR_SET_STAT_TX(ep, EPR_STAT_TX_VALID);
+ return n;
+}
+
+/**
+ * @brief Returns the status of an IN endpoint.
+ *
+ * @param[in] usbp pointer to the @p USBDriver object
+ * @param[in] ep endpoint number
+ *
+ * @notapi
+ */
+usbepstatus_t usb_lld_get_status_in(USBDriver *usbp, usbep_t ep) {
+
+ switch (STM32_USB->EPR[ep] & EPR_STAT_TX_MASK) {
+ case EPR_STAT_TX_DIS:
+ return EP_STATUS_DISABLED;
+ case EPR_STAT_TX_STALL:
+ return EP_STATUS_STALLED;
+ default:
+ return EP_STATUS_ACTIVE;
+ }
+}
+
+/**
+ * @brief Returns the status of an OUT endpoint.
+ *
+ * @param[in] usbp pointer to the @p USBDriver object
+ * @param[in] ep endpoint number
+ *
+ * @notapi
+ */
+usbepstatus_t usb_lld_get_status_out(USBDriver *usbp, usbep_t ep) {
+
+ switch (STM32_USB->EPR[ep] & EPR_STAT_RX_MASK) {
+ case EPR_STAT_RX_DIS:
+ return EP_STATUS_DISABLED;
+ case EPR_STAT_RX_STALL:
+ return EP_STATUS_STALLED;
+ default:
+ return EP_STATUS_ACTIVE;
+ }
+}
+
+/**
+ * @brief Brings an IN endpoint in the stalled state.
+ *
+ * @param[in] usbp pointer to the @p USBDriver object
+ * @param[in] ep endpoint number
+ *
+ * @notapi
+ */
+void usb_lld_stall_in(USBDriver *usbp, usbep_t ep) {
+
+ EPR_SET_STAT_TX(ep, EPR_STAT_TX_STALL);
+}
+
+/**
+ * @brief Brings an OUT endpoint in the stalled state.
+ *
+ * @param[in] usbp pointer to the @p USBDriver object
+ * @param[in] ep endpoint number
+ *
+ * @notapi
+ */
+void usb_lld_stall_out(USBDriver *usbp, usbep_t ep) {
+
+ EPR_SET_STAT_RX(ep, EPR_STAT_RX_STALL);
+}
+
+/**
+ * @brief Brings an IN endpoint in the active state.
+ *
+ * @param[in] usbp pointer to the @p USBDriver object
+ * @param[in] ep endpoint number
+ *
+ * @notapi
+ */
+void usb_lld_clear_in(USBDriver *usbp, usbep_t ep) {
+
+ /* Makes sure to not put to NAK an endpoint that is already
+ transferring.*/
+ if ((STM32_USB->EPR[ep] & EPR_STAT_TX_MASK) != EPR_STAT_TX_VALID)
+ EPR_SET_STAT_TX(ep, EPR_STAT_TX_NAK);
+}
+
+/**
+ * @brief Brings an OUT endpoint in the active state.
+ *
+ * @param[in] usbp pointer to the @p USBDriver object
+ * @param[in] ep endpoint number
+ *
+ * @notapi
+ */
+void usb_lld_clear_out(USBDriver *usbp, usbep_t ep) {
+
+ /* Makes sure to not put to NAK an endpoint that is already
+ transferring.*/
+ if ((STM32_USB->EPR[ep] & EPR_STAT_RX_MASK) != EPR_STAT_RX_VALID)
+ EPR_SET_STAT_TX(ep, EPR_STAT_RX_NAK);
+}
+
+#endif /* HAL_USE_USB */
+
+/** @} */
diff --git a/os/hal/platforms/STM32/usb_lld.h b/os/hal/platforms/STM32/usb_lld.h new file mode 100644 index 000000000..af306d8a5 --- /dev/null +++ b/os/hal/platforms/STM32/usb_lld.h @@ -0,0 +1,284 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file STM32/usb_lld.h
+ * @brief STM32 USB subsystem low level driver header.
+ *
+ * @addtogroup USB
+ * @{
+ */
+
+#ifndef _USB_LLD_H_
+#define _USB_LLD_H_
+
+#if HAL_USE_USB || defined(__DOXYGEN__)
+
+#include "stm32_usb.h"
+
+/*===========================================================================*/
+/* Driver constants. */
+/*===========================================================================*/
+
+/**
+ * @brief Maximum endpoint address.
+ */
+#define USB_MAX_ENDPOINTS USB_ENDOPOINTS_NUMBER
+
+/*===========================================================================*/
+/* Driver pre-compile time settings. */
+/*===========================================================================*/
+
+/**
+ * @brief USB1 driver enable switch.
+ * @details If set to @p TRUE the support for USB1 is included.
+ * @note The default is @p TRUE.
+ */
+#if !defined(STM32_USB_USE_USB1) || defined(__DOXYGEN__)
+#define STM32_USB_USE_USB1 TRUE
+#endif
+
+/**
+ * @brief USB1 interrupt priority level setting.
+ */
+#if !defined(STM32_USB_USB1_HP_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_USB_USB1_HP_IRQ_PRIORITY 6
+#endif
+
+/**
+ * @brief USB1 interrupt priority level setting.
+ */
+#if !defined(STM32_USB_USB1_LP_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
+#endif
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
+
+#if STM32_USB_USE_USB1 && !STM32_HAS_USB
+#error "USB not present in the selected device"
+#endif
+
+#if !STM32_USB_USE_USB1
+#error "USB driver activated but no USB peripheral assigned"
+#endif
+
+#if STM32_USBCLK != 48000000
+#error "the USB driver requires a 48MHz clock"
+#endif
+
+/*===========================================================================*/
+/* Driver data structures and types. */
+/*===========================================================================*/
+
+/**
+ * @brief Type of an USB Endpoint configuration structure.
+ * @note Platform specific restrictions may apply to endpoints.
+ */
+typedef struct {
+ /**
+ * @brief IN endpoint notification callback.
+ */
+ usbepcallback_t uepc_in_cb;
+ /**
+ * @brief OUT endpoint notification callback.
+ */
+ usbepcallback_t uepc_out_cb;
+ /**
+ * @brief IN endpoint maximum packet size.
+ */
+ uint16_t uepc_in_maxsize;
+ /**
+ * @brief OUT endpoint maximum packet size.
+ */
+ uint16_t uepc_out_maxsize;
+ /* End of the mandatory fields.*/
+ /**
+ * @brief EPxR register initialization value.
+ * @note Do not specify the EA field, leave it to zero.
+ */
+ uint16_t uepc_epr;
+ /**
+ * @brief Endpoint IN buffer address as offset in the PMA.
+ */
+ uint16_t uepc_inaddr;
+ /**
+ * @brief Endpoint OUT buffer address as offset in the PMA.
+ */
+ uint16_t uepc_outaddr;
+} USBEndpointConfig;
+
+/**
+ * @brief Type of an USB driver configuration structure.
+ */
+typedef struct {
+ /**
+ * @brief USB events callback.
+ * @details This callback is invoked when an USB driver event is registered.
+ */
+ usbeventcb_t uc_event_cb;
+ /**
+ * @brief Device GET_DESCRIPTOR request callback.
+ * @note This callback is mandatory and cannot be set to @p NULL.
+ */
+ usbgetdescriptor_t uc_get_descriptor_cb;
+ /**
+ * @brief Requests hook callback.
+ * @details This hook allows to be notified of standard requests or to
+ * handle non standard requests.
+ */
+ usbreqhandler_t uc_requests_hook_cb;
+ /**
+ * @brief Start Of Frame callback.
+ */
+ usbcallback_t uc_sof_cb;
+ /* End of the mandatory fields.*/
+} USBConfig;
+
+/**
+ * @brief Structure representing an USB driver.
+ */
+struct USBDriver {
+ /**
+ * @brief Driver state.
+ */
+ usbstate_t usb_state;
+ /**
+ * @brief Current configuration data.
+ */
+ const USBConfig *usb_config;
+ /**
+ * @brief Field available to user, it can be used to associate an
+ * application-defined handler to the USB driver.
+ */
+ void *usb_param;
+ /**
+ * @brief Active endpoints configurations.
+ */
+ const USBEndpointConfig *usb_epc[USB_MAX_ENDPOINTS + 1];
+ /**
+ * @brief Endpoint 0 state.
+ */
+ usbep0state_t usb_ep0state;
+ /**
+ * @brief Next position in the buffer to be transferred through endpoint 0.
+ */
+ uint8_t *usb_ep0next;
+ /**
+ * @brief Maximum number of bytes to be tranferred through endpoint 0.
+ */
+ size_t usb_ep0max;
+ /**
+ * @brief Number of bytes yet to be tranferred through endpoint 0.
+ */
+ size_t usb_ep0n;
+ /**
+ * @brief Size of the last packet transferred through endpoint 0.
+ */
+ size_t usb_ep0lastsize;
+ /**
+ * @brief Endpoint 0 end transaction callback.
+ */
+ usbcallback_t usb_ep0endcb;
+ /**
+ * @brief Setup packet buffer.
+ */
+ uint8_t usb_setup[8];
+ /**
+ * @brief Current USB device status.
+ */
+ uint16_t usb_status;
+ /**
+ * @brief Assigned USB address.
+ */
+ uint8_t usb_address;
+ /**
+ * @brief Current USB device configuration.
+ */
+ uint8_t usb_configuration;
+ /* End of the mandatory fields.*/
+};
+
+/*===========================================================================*/
+/* Driver macros. */
+/*===========================================================================*/
+
+/**
+ * @brief Fetches a 16 bits word value from an USB message.
+ *
+ * @param[in] p pointer to the 16 bits word
+ *
+ * @notapi
+ */
+#define usb_lld_fetch_word(p) (*(uint16_t *)p)
+
+/**
+ * @brief Returns the current frame number.
+ *
+ * @param[in] usbp pointer to the @p USBDriver object
+ * @return The current frame number.
+ *
+ * @notapi
+ */
+#define usb_lld_get_frame_number(usbp) (STM32_USB->FNR & FNR_FN_MASK)
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+#if STM32_USB_USE_USB1 && !defined(__DOXYGEN__)
+extern USBDriver USBD1;
+#endif
+
+#if !defined(__DOXYGEN__)
+extern const USBEndpointConfig usb_lld_ep0config;
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void usb_lld_init(void);
+ void usb_lld_start(USBDriver *usbp);
+ void usb_lld_stop(USBDriver *usbp);
+ void usb_lld_reset(USBDriver *usbp);
+ void usb_lld_set_address(USBDriver *usbp, uint8_t addr);
+ void usb_lld_enable_endpoint(USBDriver *usbp, usbep_t ep,
+ const USBEndpointConfig *epcp);
+ void usb_lld_disable_endpoints(USBDriver *usbp);
+ size_t usb_lld_get_readable(USBDriver *usbp, usbep_t ep);
+ size_t usb_lld_read(USBDriver *usbp, usbep_t ep,
+ uint8_t *buf, size_t n);
+ size_t usb_lld_write(USBDriver *usbp, usbep_t ep,
+ const uint8_t *buf, size_t n);
+ usbepstatus_t usb_lld_get_status_in(USBDriver *usbp, usbep_t ep);
+ usbepstatus_t usb_lld_get_status_out(USBDriver *usbp, usbep_t ep);
+ void usb_lld_stall_in(USBDriver *usbp, usbep_t ep);
+ void usb_lld_stall_out(USBDriver *usbp, usbep_t ep);
+ void usb_lld_clear_in(USBDriver *usbp, usbep_t ep);
+ void usb_lld_clear_out(USBDriver *usbp, usbep_t ep);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* HAL_USE_USB */
+
+#endif /* _USB_LLD_H_ */
+
+/** @} */
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