git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4339 35acf78f-673a-0410-8e92-d51de3d6d3f4

11 files changed, 110 insertions, 27 deletions

diff --git a/os/hal/platforms/STM32/USARTv1/uart_lld.c b/os/hal/platforms/STM32/USARTv1/uart_lld.c
index 4bc2be265..03648585a 100644
--- a/os/hal/platforms/STM32/USARTv1/uart_lld.c
+++ b/os/hal/platforms/STM32/USARTv1/uart_lld.c
@@ -19,7 +19,7 @@
 */

 

 /**

- * @file    STM32/uart_lld.c

+ * @file    STM32/USARTv1/uart_lld.c

  * @brief   STM32 low level UART driver code.

  *

  * @addtogroup UART

@@ -288,12 +288,15 @@ static void serve_usart_irq(UARTDriver *uartp) {
 /*===========================================================================*/

 

 #if STM32_UART_USE_USART1 || defined(__DOXYGEN__)

+#if !defined(STM32_USART1_HANDLER)

+#error "STM32_USART1_HANDLER not defined"

+#endif

 /**

  * @brief   USART1 IRQ handler.

  *

  * @isr

  */

-CH_IRQ_HANDLER(USART1_IRQHandler) {

+CH_IRQ_HANDLER(STM32_USART1_HANDLER) {

 

   CH_IRQ_PROLOGUE();

 

@@ -304,12 +307,15 @@ CH_IRQ_HANDLER(USART1_IRQHandler) {
 #endif /* STM32_UART_USE_USART1 */

 

 #if STM32_UART_USE_USART2 || defined(__DOXYGEN__)

+#if !defined(STM32_USART2_HANDLER)

+#error "STM32_USART2_HANDLER not defined"

+#endif

 /**

  * @brief   USART2 IRQ handler.

  *

  * @isr

  */

-CH_IRQ_HANDLER(USART2_IRQHandler) {

+CH_IRQ_HANDLER(STM32_USART2_HANDLER) {

 

   CH_IRQ_PROLOGUE();

 

@@ -320,12 +326,15 @@ CH_IRQ_HANDLER(USART2_IRQHandler) {
 #endif /* STM32_UART_USE_USART2 */

 

 #if STM32_UART_USE_USART3 || defined(__DOXYGEN__)

+#if !defined(STM32_USART3_HANDLER)

+#error "STM32_USART3_HANDLER not defined"

+#endif

 /**

  * @brief   USART3 IRQ handler.

  *

  * @isr

  */

-CH_IRQ_HANDLER(USART3_IRQHandler) {

+CH_IRQ_HANDLER(STM32_USART3_HANDLER) {

 

   CH_IRQ_PROLOGUE();

 

@@ -394,7 +403,7 @@ void uart_lld_start(UARTDriver *uartp) {
                             (void *)uartp);

       chDbgAssert(!b, "uart_lld_start(), #2", "stream already allocated");

       rccEnableUSART1(FALSE);

-      nvicEnableVector(USART1_IRQn,

+      nvicEnableVector(STM32_USART1_NUMBER,

                        CORTEX_PRIORITY_MASK(STM32_UART_USART1_IRQ_PRIORITY));

       uartp->dmamode |= STM32_DMA_CR_CHSEL(USART1_RX_DMA_CHANNEL) |

                         STM32_DMA_CR_PL(STM32_UART_USART1_DMA_PRIORITY);

@@ -415,7 +424,7 @@ void uart_lld_start(UARTDriver *uartp) {
                             (void *)uartp);

       chDbgAssert(!b, "uart_lld_start(), #4", "stream already allocated");

       rccEnableUSART2(FALSE);

-      nvicEnableVector(USART2_IRQn,

+      nvicEnableVector(STM32_USART2_NUMBER,

                        CORTEX_PRIORITY_MASK(STM32_UART_USART2_IRQ_PRIORITY));

       uartp->dmamode |= STM32_DMA_CR_CHSEL(USART2_RX_DMA_CHANNEL) |

                         STM32_DMA_CR_PL(STM32_UART_USART2_DMA_PRIORITY);

@@ -436,7 +445,7 @@ void uart_lld_start(UARTDriver *uartp) {
                             (void *)uartp);

       chDbgAssert(!b, "uart_lld_start(), #6", "stream already allocated");

       rccEnableUSART3(FALSE);

-      nvicEnableVector(USART3_IRQn,

+      nvicEnableVector(STM32_USART3_NUMBER,

                        CORTEX_PRIORITY_MASK(STM32_UART_USART3_IRQ_PRIORITY));

       uartp->dmamode |= STM32_DMA_CR_CHSEL(USART3_RX_DMA_CHANNEL) |

                         STM32_DMA_CR_PL(STM32_UART_USART3_DMA_PRIORITY);

@@ -473,7 +482,7 @@ void uart_lld_stop(UARTDriver *uartp) {
 

 #if STM32_UART_USE_USART1

     if (&UARTD1 == uartp) {

-      nvicDisableVector(USART1_IRQn);

+      nvicDisableVector(STM32_USART1_NUMBER);

       rccDisableUSART1(FALSE);

       return;

     }

@@ -481,7 +490,7 @@ void uart_lld_stop(UARTDriver *uartp) {
 

 #if STM32_UART_USE_USART2

     if (&UARTD2 == uartp) {

-      nvicDisableVector(USART2_IRQn);

+      nvicDisableVector(STM32_USART2_NUMBER);

       rccDisableUSART2(FALSE);

       return;

     }

@@ -489,7 +498,7 @@ void uart_lld_stop(UARTDriver *uartp) {
 

 #if STM32_UART_USE_USART3

     if (&UARTD3 == uartp) {

-      nvicDisableVector(USART3_IRQn);

+      nvicDisableVector(STM32_USART3_NUMBER);

       rccDisableUSART3(FALSE);

       return;

     }

diff --git a/os/hal/platforms/STM32/USARTv1/uart_lld.h b/os/hal/platforms/STM32/USARTv1/uart_lld.h
index f08550099..0e3576987 100644
--- a/os/hal/platforms/STM32/USARTv1/uart_lld.h
+++ b/os/hal/platforms/STM32/USARTv1/uart_lld.h
@@ -49,7 +49,7 @@
  * @note    The default is @p FALSE.

  */

 #if !defined(STM32_UART_USE_USART1) || defined(__DOXYGEN__)

-#define STM32_UART_USE_USART1               TRUE

+#define STM32_UART_USE_USART1               FALSE

 #endif

 

 /**

@@ -58,7 +58,7 @@
  * @note    The default is @p FALSE.

  */

 #if !defined(STM32_UART_USE_USART2) || defined(__DOXYGEN__)

-#define STM32_UART_USE_USART2               TRUE

+#define STM32_UART_USE_USART2               FALSE

 #endif

 

 /**

@@ -67,7 +67,7 @@
  * @note    The default is @p FALSE.

  */

 #if !defined(STM32_UART_USE_USART3) || defined(__DOXYGEN__)

-#define STM32_UART_USE_USART3               TRUE

+#define STM32_UART_USE_USART3               FALSE

 #endif

 

 /**

diff --git a/os/hal/platforms/STM32/USARTv2/uart_lld.c b/os/hal/platforms/STM32/USARTv2/uart_lld.c
index b2c5fb080..276aa7e8d 100644
--- a/os/hal/platforms/STM32/USARTv2/uart_lld.c
+++ b/os/hal/platforms/STM32/USARTv2/uart_lld.c
@@ -19,7 +19,7 @@
 */

 

 /**

- * @file    STM32/uart_lld.c

+ * @file    STM32/USARTv2/uart_lld.c

  * @brief   STM32 low level UART driver code.

  *

  * @addtogroup UART

@@ -292,12 +292,15 @@ static void serve_usart_irq(UARTDriver *uartp) {
 /*===========================================================================*/

 

 #if STM32_UART_USE_USART1 || defined(__DOXYGEN__)

+#if !defined(STM32_USART1_HANDLER)

+#error "STM32_USART1_HANDLER not defined"

+#endif

 /**

  * @brief   USART1 IRQ handler.

  *

  * @isr

  */

-CH_IRQ_HANDLER(USART1_IRQHandler) {

+CH_IRQ_HANDLER(STM32_USART1_HANDLER) {

 

   CH_IRQ_PROLOGUE();

 

@@ -308,12 +311,15 @@ CH_IRQ_HANDLER(USART1_IRQHandler) {
 #endif /* STM32_UART_USE_USART1 */

 

 #if STM32_UART_USE_USART2 || defined(__DOXYGEN__)

+#if !defined(STM32_USART2_HANDLER)

+#error "STM32_USART2_HANDLER not defined"

+#endif

 /**

  * @brief   USART2 IRQ handler.

  *

  * @isr

  */

-CH_IRQ_HANDLER(USART2_IRQHandler) {

+CH_IRQ_HANDLER(STM32_USART2_HANDLER) {

 

   CH_IRQ_PROLOGUE();

 

@@ -324,12 +330,15 @@ CH_IRQ_HANDLER(USART2_IRQHandler) {
 #endif /* STM32_UART_USE_USART2 */

 

 #if STM32_UART_USE_USART3 || defined(__DOXYGEN__)

+#if !defined(STM32_USART3_HANDLER)

+#error "STM32_USART3_HANDLER not defined"

+#endif

 /**

  * @brief   USART3 IRQ handler.

  *

  * @isr

  */

-CH_IRQ_HANDLER(USART3_IRQHandler) {

+CH_IRQ_HANDLER(STM32_USART3_HANDLER) {

 

   CH_IRQ_PROLOGUE();

 

@@ -398,7 +407,7 @@ void uart_lld_start(UARTDriver *uartp) {
                             (void *)uartp);

       chDbgAssert(!b, "uart_lld_start(), #2", "stream already allocated");

       rccEnableUSART1(FALSE);

-      nvicEnableVector(USART1_IRQn,

+      nvicEnableVector(STM32_USART1_NUMBER,

                        CORTEX_PRIORITY_MASK(STM32_UART_USART1_IRQ_PRIORITY));

       uartp->dmamode |= STM32_DMA_CR_CHSEL(USART1_RX_DMA_CHANNEL) |

                         STM32_DMA_CR_PL(STM32_UART_USART1_DMA_PRIORITY);

@@ -419,7 +428,7 @@ void uart_lld_start(UARTDriver *uartp) {
                             (void *)uartp);

       chDbgAssert(!b, "uart_lld_start(), #4", "stream already allocated");

       rccEnableUSART2(FALSE);

-      nvicEnableVector(USART2_IRQn,

+      nvicEnableVector(STM32_USART2_NUMBER,

                        CORTEX_PRIORITY_MASK(STM32_UART_USART2_IRQ_PRIORITY));

       uartp->dmamode |= STM32_DMA_CR_CHSEL(USART2_RX_DMA_CHANNEL) |

                         STM32_DMA_CR_PL(STM32_UART_USART2_DMA_PRIORITY);

@@ -440,7 +449,7 @@ void uart_lld_start(UARTDriver *uartp) {
                             (void *)uartp);

       chDbgAssert(!b, "uart_lld_start(), #6", "stream already allocated");

       rccEnableUSART3(FALSE);

-      nvicEnableVector(USART3_IRQn,

+      nvicEnableVector(STM32_USART3_NUMBER,

                        CORTEX_PRIORITY_MASK(STM32_UART_USART3_IRQ_PRIORITY));

       uartp->dmamode |= STM32_DMA_CR_CHSEL(USART3_RX_DMA_CHANNEL) |

                         STM32_DMA_CR_PL(STM32_UART_USART3_DMA_PRIORITY);

@@ -477,7 +486,7 @@ void uart_lld_stop(UARTDriver *uartp) {
 

 #if STM32_UART_USE_USART1

     if (&UARTD1 == uartp) {

-      nvicDisableVector(USART1_IRQn);

+      nvicDisableVector(STM32_USART1_NUMBER);

       rccDisableUSART1(FALSE);

       return;

     }

@@ -485,7 +494,7 @@ void uart_lld_stop(UARTDriver *uartp) {
 

 #if STM32_UART_USE_USART2

     if (&UARTD2 == uartp) {

-      nvicDisableVector(USART2_IRQn);

+      nvicDisableVector(STM32_USART2_NUMBER);

       rccDisableUSART2(FALSE);

       return;

     }

@@ -493,7 +502,7 @@ void uart_lld_stop(UARTDriver *uartp) {
 

 #if STM32_UART_USE_USART3

     if (&UARTD3 == uartp) {

-      nvicDisableVector(USART3_IRQn);

+      nvicDisableVector(STM32_USART3_NUMBER);

       rccDisableUSART3(FALSE);

       return;

     }

diff --git a/os/hal/platforms/STM32F0xx/stm32_isr.h b/os/hal/platforms/STM32F0xx/stm32_isr.h
index a62fbc3cc..643092844 100644
--- a/os/hal/platforms/STM32F0xx/stm32_isr.h
+++ b/os/hal/platforms/STM32F0xx/stm32_isr.h
@@ -49,6 +49,15 @@
 #define STM32_TIM1_CC_NUMBER        TIM1_CC_IRQn

 #define STM32_TIM2_NUMBER           TIM2_IRQn

 #define STM32_TIM3_NUMBER           TIM3_IRQn

+

+/*

+ * USART units.

+ */

+#define STM32_USART1_HANDLER        USART1_IRQHandler

+#define STM32_USART2_HANDLER        USART2_IRQHandler

+

+#define STM32_USART1_NUMBER         USART1_IRQn

+#define STM32_USART2_NUMBER         USART2_IRQn

 /** @} */

 

 /*===========================================================================*/

diff --git a/os/hal/platforms/STM32F1xx/stm32_isr.h b/os/hal/platforms/STM32F1xx/stm32_isr.h
index 660a061b9..5f34f07d9 100644
--- a/os/hal/platforms/STM32F1xx/stm32_isr.h
+++ b/os/hal/platforms/STM32F1xx/stm32_isr.h
@@ -100,6 +100,21 @@
 #define STM32_TIM8_UP_NUMBER        TIM8_UP_IRQn

 #endif

 #define STM32_TIM8_CC_NUMBER        TIM8_CC_IRQn

+

+/*

+ * USART units.

+ */

+#define STM32_USART1_HANDLER        USART1_IRQHandler

+#define STM32_USART2_HANDLER        USART2_IRQHandler

+#define STM32_USART3_HANDLER        USART3_IRQHandler

+#define STM32_UART4_HANDLER         UART4_IRQHandler

+#define STM32_UART5_HANDLER         UART5_IRQHandler

+

+#define STM32_USART1_NUMBER         USART1_IRQn

+#define STM32_USART2_NUMBER         USART2_IRQn

+#define STM32_USART3_NUMBER         USART3_IRQn

+#define STM32_UART4_NUMBER          UART4_IRQn

+#define STM32_UART5_NUMBER          UART5_IRQn

 /** @} */

 

 /*===========================================================================*/

diff --git a/os/hal/platforms/STM32F2xx/platform.mk b/os/hal/platforms/STM32F2xx/platform.mk
index 7a140499d..f7800105d 100644
--- a/os/hal/platforms/STM32F2xx/platform.mk
+++ b/os/hal/platforms/STM32F2xx/platform.mk
@@ -12,7 +12,6 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/STM32F2xx/stm32_dma.c \
               ${CHIBIOS}/os/hal/platforms/STM32/sdc_lld.c \

               ${CHIBIOS}/os/hal/platforms/STM32/serial_lld.c \

               ${CHIBIOS}/os/hal/platforms/STM32/spi_lld.c \

-              ${CHIBIOS}/os/hal/platforms/STM32/uart_lld.c \

               ${CHIBIOS}/os/hal/platforms/STM32/GPIOv2/pal_lld.c \

  			  ${CHIBIOS}/os/hal/platforms/STM32/I2Cv1/i2c_lld.c \

               ${CHIBIOS}/os/hal/platforms/STM32/OTGv1/usb_lld.c \

diff --git a/os/hal/platforms/STM32F2xx/stm32_isr.h b/os/hal/platforms/STM32F2xx/stm32_isr.h
index 99ef3b01c..02c08f207 100644
--- a/os/hal/platforms/STM32F2xx/stm32_isr.h
+++ b/os/hal/platforms/STM32F2xx/stm32_isr.h
@@ -78,6 +78,23 @@
 #define STM32_TIM5_NUMBER           TIM5_IRQn

 #define STM32_TIM8_UP_NUMBER        TIM8_UP_TIM13_IRQn

 #define STM32_TIM8_CC_NUMBER        TIM8_CC_IRQn

+

+/*

+ * USART units.

+ */

+#define STM32_USART1_HANDLER        USART1_IRQHandler

+#define STM32_USART2_HANDLER        USART2_IRQHandler

+#define STM32_USART3_HANDLER        USART3_IRQHandler

+#define STM32_UART4_HANDLER         UART4_IRQHandler

+#define STM32_UART5_HANDLER         UART5_IRQHandler

+#define STM32_USART6_HANDLER        USART6_IRQHandler

+

+#define STM32_USART1_NUMBER         USART1_IRQn

+#define STM32_USART2_NUMBER         USART2_IRQn

+#define STM32_USART3_NUMBER         USART3_IRQn

+#define STM32_UART4_NUMBER          UART4_IRQn

+#define STM32_UART5_NUMBER          UART5_IRQn

+#define STM32_USART6_NUMBER         USART6_IRQn

 /** @} */

 

 /*===========================================================================*/

diff --git a/os/hal/platforms/STM32F4xx/platform.mk b/os/hal/platforms/STM32F4xx/platform.mk
index 76944c45f..60a487f82 100644
--- a/os/hal/platforms/STM32F4xx/platform.mk
+++ b/os/hal/platforms/STM32F4xx/platform.mk
@@ -12,7 +12,6 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/STM32F4xx/stm32_dma.c \
               ${CHIBIOS}/os/hal/platforms/STM32/sdc_lld.c \

               ${CHIBIOS}/os/hal/platforms/STM32/serial_lld.c \

               ${CHIBIOS}/os/hal/platforms/STM32/spi_lld.c \

-              ${CHIBIOS}/os/hal/platforms/STM32/uart_lld.c \

               ${CHIBIOS}/os/hal/platforms/STM32/GPIOv2/pal_lld.c \

  			  ${CHIBIOS}/os/hal/platforms/STM32/I2Cv1/i2c_lld.c \

               ${CHIBIOS}/os/hal/platforms/STM32/OTGv1/usb_lld.c \

diff --git a/os/hal/platforms/STM32F4xx/stm32_isr.h b/os/hal/platforms/STM32F4xx/stm32_isr.h
index 2dd6a0eab..1ef23a5eb 100644
--- a/os/hal/platforms/STM32F4xx/stm32_isr.h
+++ b/os/hal/platforms/STM32F4xx/stm32_isr.h
@@ -78,6 +78,23 @@
 #define STM32_TIM5_NUMBER           TIM5_IRQn

 #define STM32_TIM8_UP_NUMBER        TIM8_UP_TIM13_IRQn

 #define STM32_TIM8_CC_NUMBER        TIM8_CC_IRQn

+

+/*

+ * USART units.

+ */

+#define STM32_USART1_HANDLER        USART1_IRQHandler

+#define STM32_USART2_HANDLER        USART2_IRQHandler

+#define STM32_USART3_HANDLER        USART3_IRQHandler

+#define STM32_UART4_HANDLER         UART4_IRQHandler

+#define STM32_UART5_HANDLER         UART5_IRQHandler

+#define STM32_USART6_HANDLER        USART6_IRQHandler

+

+#define STM32_USART1_NUMBER         USART1_IRQn

+#define STM32_USART2_NUMBER         USART2_IRQn

+#define STM32_USART3_NUMBER         USART3_IRQn

+#define STM32_UART4_NUMBER          UART4_IRQn

+#define STM32_UART5_NUMBER          UART5_IRQn

+#define STM32_USART6_NUMBER         USART6_IRQn

 /** @} */

 

 /*===========================================================================*/

diff --git a/os/hal/platforms/STM32L1xx/platform.mk b/os/hal/platforms/STM32L1xx/platform.mk
index e4f764083..f54f5fec3 100644
--- a/os/hal/platforms/STM32L1xx/platform.mk
+++ b/os/hal/platforms/STM32L1xx/platform.mk
@@ -5,12 +5,10 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/STM32L1xx/stm32_dma.c \
               ${CHIBIOS}/os/hal/platforms/STM32L1xx/ext_lld_isr.c \

               ${CHIBIOS}/os/hal/platforms/STM32/ext_lld.c \

               ${CHIBIOS}/os/hal/platforms/STM32/gpt_lld.c \

-              ${CHIBIOS}/os/hal/platforms/STM32/i2c_lld.c \

               ${CHIBIOS}/os/hal/platforms/STM32/icu_lld.c \

               ${CHIBIOS}/os/hal/platforms/STM32/pwm_lld.c \

               ${CHIBIOS}/os/hal/platforms/STM32/serial_lld.c \

               ${CHIBIOS}/os/hal/platforms/STM32/spi_lld.c \

-              ${CHIBIOS}/os/hal/platforms/STM32/uart_lld.c \

               ${CHIBIOS}/os/hal/platforms/STM32/GPIOv2/pal_lld.c \

  			  ${CHIBIOS}/os/hal/platforms/STM32/I2Cv1/i2c_lld.c \

               ${CHIBIOS}/os/hal/platforms/STM32/USARTv1/uart_lld.c \

diff --git a/os/hal/platforms/STM32L1xx/stm32_isr.h b/os/hal/platforms/STM32L1xx/stm32_isr.h
index 14bd457d9..c753f6d24 100644
--- a/os/hal/platforms/STM32L1xx/stm32_isr.h
+++ b/os/hal/platforms/STM32L1xx/stm32_isr.h
@@ -47,6 +47,17 @@
 #define STM32_TIM2_NUMBER           TIM2_IRQn

 #define STM32_TIM3_NUMBER           TIM3_IRQn

 #define STM32_TIM4_NUMBER           TIM4_IRQn

+

+/*

+ * USART units.

+ */

+#define STM32_USART1_HANDLER        USART1_IRQHandler

+#define STM32_USART2_HANDLER        USART2_IRQHandler

+#define STM32_USART3_HANDLER        USART3_IRQHandler

+

+#define STM32_USART1_NUMBER         USART1_IRQn

+#define STM32_USART2_NUMBER         USART2_IRQn

+#define STM32_USART3_NUMBER         USART3_IRQn

 /** @} */

 

 /*===========================================================================*/