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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-11-10 17:54:41 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-11-10 17:54:41 +0000
commited26815f85668f5eedc6c28581e8900f037cbba1 (patch)
tree994c72b0900174001db8a5ce1d76883e67c60298 /os/hal/platforms/STM32L1xx
parentb81fe69f7174006176e505ac66aff44eb8e246f2 (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3481 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32L1xx')
-rw-r--r--os/hal/platforms/STM32L1xx/adc_lld.h5
-rw-r--r--os/hal/platforms/STM32L1xx/hal_lld.h5
-rw-r--r--os/hal/platforms/STM32L1xx/stm32_dma.h51
-rw-r--r--os/hal/platforms/STM32L1xx/stm32l1xx.h1
4 files changed, 54 insertions, 8 deletions
diff --git a/os/hal/platforms/STM32L1xx/adc_lld.h b/os/hal/platforms/STM32L1xx/adc_lld.h
index 0ca41c269..58fb7bda1 100644
--- a/os/hal/platforms/STM32L1xx/adc_lld.h
+++ b/os/hal/platforms/STM32L1xx/adc_lld.h
@@ -102,6 +102,10 @@
/*===========================================================================*/
/**
+ * @name Configuration options
+ * @{
+ */
+/**
* @brief ADC1 driver enable switch.
* @details If set to @p TRUE the support for ADC1 is included.
* @note The default is @p TRUE.
@@ -134,6 +138,7 @@
#if !defined(STM32_ADC_ADC1_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_ADC_ADC1_IRQ_PRIORITY 5
#endif
+/** @} */
/*===========================================================================*/
/* Derived constants and error checks. */
diff --git a/os/hal/platforms/STM32L1xx/hal_lld.h b/os/hal/platforms/STM32L1xx/hal_lld.h
index 9ca34fb7c..f61550170 100644
--- a/os/hal/platforms/STM32L1xx/hal_lld.h
+++ b/os/hal/platforms/STM32L1xx/hal_lld.h
@@ -299,6 +299,10 @@
/*===========================================================================*/
/**
+ * @name Configuration options
+ * @{
+ */
+/**
* @brief Disables the PWR/RCC initialization in the HAL.
*/
#if !defined(STM32_NO_INIT) || defined(__DOXYGEN__)
@@ -456,6 +460,7 @@
#if !defined(STM32_RTCSEL) || defined(__DOXYGEN__)
#define STM32_RTCPRE STM32_RTCPRE_DIV2
#endif
+/** @} */
/*===========================================================================*/
/* Derived constants and error checks. */
diff --git a/os/hal/platforms/STM32L1xx/stm32_dma.h b/os/hal/platforms/STM32L1xx/stm32_dma.h
index e23980f9f..43ffdb668 100644
--- a/os/hal/platforms/STM32L1xx/stm32_dma.h
+++ b/os/hal/platforms/STM32L1xx/stm32_dma.h
@@ -48,20 +48,50 @@
#define STM32_DMA_ISR_MASK 0x0F
/**
+ * @brief Returns the channel associated to the specified stream.
+ *
+ * @param[in] n the stream number (0...STM32_DMA_STREAMS-1)
+ * @param[in] c a stream/channel association word, one channel per
+ * nibble, not associated channels must be set to 0xF
+ * @return Always zero, in this platform there is no dynamic
+ * association between streams and channels.
+ */
+#define STM32_DMA_GETCHANNEL(n, c) 0
+
+/**
* @name DMA streams identifiers
* @{
*/
-#define STM32_DMA1_STREAM1 (&_stm32_dma_streams[0])
-#define STM32_DMA1_STREAM2 (&_stm32_dma_streams[1])
-#define STM32_DMA1_STREAM3 (&_stm32_dma_streams[2])
-#define STM32_DMA1_STREAM4 (&_stm32_dma_streams[3])
-#define STM32_DMA1_STREAM5 (&_stm32_dma_streams[4])
-#define STM32_DMA1_STREAM6 (&_stm32_dma_streams[5])
-#define STM32_DMA1_STREAM7 (&_stm32_dma_streams[6])
+/**
+ * @brief Returns an unique numeric identifier for a DMA stream.
+ *
+ * @param[in] dma the DMA unit number
+ * @param[in] stream the stream number
+ * @return An unique numeric stream identifier.
+ */
+#define STM32_DMA_STREAM_ID(dma, stream) ((stream) - 1)
+
+/**
+ * @brief Returns a pointer to a stm32_dma_stream_t structure.
+ *
+ * @param[in] n the stream numeric identifier
+ * @return A pointer to the stm32_dma_stream_t constant structure
+ * associated to the DMA stream.
+ */
+#define STM32_DMA_STREAM(n) (&_stm32_dma_streams[n))
+
+#define STM32_DMA1_STREAM1 STM32_DMA_STREAM(0)
+#define STM32_DMA1_STREAM2 STM32_DMA_STREAM(1)
+#define STM32_DMA1_STREAM3 STM32_DMA_STREAM(2)
+#define STM32_DMA1_STREAM4 STM32_DMA_STREAM(3)
+#define STM32_DMA1_STREAM5 STM32_DMA_STREAM(4)
+#define STM32_DMA1_STREAM6 STM32_DMA_STREAM(5)
+#define STM32_DMA1_STREAM7 STM32_DMA_STREAM(6)
/** @} */
/**
* @name CR register constants common to all DMA types
+ * @{
*/
#define STM32_DMA_CR_EN DMA_CCR1_EN
#define STM32_DMA_CR_TEIE DMA_CCR1_TEIE
@@ -88,6 +118,7 @@
/**
* @name CR register constants only found in enhanced DMA
+ * @{
*/
#define STM32_DMA_CR_CHSEL_MASK 0 /**< @brief Ignored by normal DMA. */
#define STM32_DMA_CR_CHSEL(n) 0 /**< @brief Ignored by normal DMA. */
@@ -95,6 +126,7 @@
/**
* @name Status flags passed to the ISR callbacks
+ * @{
*/
#define STM32_DMA_ISR_FEIF 0
#define STM32_DMA_ISR_DMEIF 0
@@ -141,6 +173,10 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
/*===========================================================================*/
/**
+ * @name Macro Functions
+ * @{
+ */
+/**
* @brief Associates a peripheral data register to a DMA stream.
* @note This function can be invoked in both ISR or thread context.
* @pre The stream must have been allocated using @p dmaStreamAllocate().
@@ -293,6 +329,7 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags);
#define dmaWaitCompletion(dmastp) \
while (((dmastp)->channel->CNDTR > 0) && \
((dmastp)->channel->CCR & STM32_DMA_CR_EN))
+/** @} */
/*===========================================================================*/
/* External declarations. */
diff --git a/os/hal/platforms/STM32L1xx/stm32l1xx.h b/os/hal/platforms/STM32L1xx/stm32l1xx.h
index 9723158c8..32ddcb79d 100644
--- a/os/hal/platforms/STM32L1xx/stm32l1xx.h
+++ b/os/hal/platforms/STM32L1xx/stm32l1xx.h
@@ -430,7 +430,6 @@ typedef struct
__IO uint32_t AFR[2];
} GPIO_TypeDef;
#endif
-#endif
/**
* @brief SysTem Configuration