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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-03-28 14:19:40 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-03-28 14:19:40 +0000 |
commit | f083a30ce8d6b93c9fa23c94874e4488e79d053f (patch) | |
tree | 0fd417167dad14293d761e31835433d56f527fbe /os/hal/platforms/STM32F2xx | |
parent | f5c1c5fdc471c5236ed51eeaf184b28bcbcaccfa (diff) | |
download | ChibiOS-f083a30ce8d6b93c9fa23c94874e4488e79d053f.tar.gz ChibiOS-f083a30ce8d6b93c9fa23c94874e4488e79d053f.tar.bz2 ChibiOS-f083a30ce8d6b93c9fa23c94874e4488e79d053f.zip |
More work on the STM32 OTG driver.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4059 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32F2xx')
-rw-r--r-- | os/hal/platforms/STM32F2xx/platform.mk | 6 | ||||
-rw-r--r-- | os/hal/platforms/STM32F2xx/stm32_rcc.h | 30 |
2 files changed, 33 insertions, 3 deletions
diff --git a/os/hal/platforms/STM32F2xx/platform.mk b/os/hal/platforms/STM32F2xx/platform.mk index 37b37bc93..e9aee9817 100644 --- a/os/hal/platforms/STM32F2xx/platform.mk +++ b/os/hal/platforms/STM32F2xx/platform.mk @@ -11,12 +11,12 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/STM32F2xx/stm32_dma.c \ ${CHIBIOS}/os/hal/platforms/STM32/spi_lld.c \
${CHIBIOS}/os/hal/platforms/STM32/uart_lld.c \
${CHIBIOS}/os/hal/platforms/STM32/GPIOv2/pal_lld.c \
+ ${CHIBIOS}/os/hal/platforms/STM32/OTGv1/usb_lld.c \
${CHIBIOS}/os/hal/platforms/STM32/RTCv2/rtc_lld.c
# Required include directories
PLATFORMINC = ${CHIBIOS}/os/hal/platforms/STM32F2xx \
${CHIBIOS}/os/hal/platforms/STM32 \
${CHIBIOS}/os/hal/platforms/STM32/GPIOv2 \
- ${CHIBIOS}/os/hal/platforms/STM32/RTCv2 \
-
-
+ ${CHIBIOS}/os/hal/platforms/STM32/OTGv1 \
+ ${CHIBIOS}/os/hal/platforms/STM32/RTCv2
diff --git a/os/hal/platforms/STM32F2xx/stm32_rcc.h b/os/hal/platforms/STM32F2xx/stm32_rcc.h index fefbf656b..af070d814 100644 --- a/os/hal/platforms/STM32F2xx/stm32_rcc.h +++ b/os/hal/platforms/STM32F2xx/stm32_rcc.h @@ -539,6 +539,36 @@ /** @} */
/**
+ * @name OTG peripherals specific RCC operations
+ * @{
+ */
+/**
+ * @brief Enables the OTG_FS peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableOTG_FS(lp) rccEnableAHB2(RCC_AHB2LPENR_OTGFSLPEN, lp)
+
+/**
+ * @brief Disables the OTG_FS peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccDisableOTG_FS(lp) rccEnableAHB2(RCC_AHB2LPENR_OTGFSLPEN, lp)
+
+/**
+ * @brief Resets the OTG_FS peripheral.
+ *
+ * @api
+ */
+#define rccResetOTG_FS() rccResetAHB2(RCC_AHB2RSTR_OTGFSRST)
+/** @} */
+
+/**
* @name SPI peripherals specific RCC operations
* @{
*/
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