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| author | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-12-08 07:11:08 +0000 |
|---|---|---|
| committer | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-12-08 07:11:08 +0000 |
| commit | 87ea7c6eec87483742002466631e6b6e6aba1c51 (patch) | |
| tree | 3b2169dd0b2d6405202e5158d658d19399627c3f /os/hal/platforms/STM32F2xx | |
| parent | c7bb99a1e5b0a630df0f9a42190172bfe3472596 (diff) | |
| parent | f1d3f298955eec396bcc1e791f3e6fbbb6c4c3e0 (diff) | |
| download | ChibiOS-87ea7c6eec87483742002466631e6b6e6aba1c51.tar.gz ChibiOS-87ea7c6eec87483742002466631e6b6e6aba1c51.tar.bz2 ChibiOS-87ea7c6eec87483742002466631e6b6e6aba1c51.zip | |
I2C. Merge code to trunk.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3576 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32F2xx')
| -rw-r--r-- | os/hal/platforms/STM32F2xx/hal_lld.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/os/hal/platforms/STM32F2xx/hal_lld.h b/os/hal/platforms/STM32F2xx/hal_lld.h index 91135950f..cad926330 100644 --- a/os/hal/platforms/STM32F2xx/hal_lld.h +++ b/os/hal/platforms/STM32F2xx/hal_lld.h @@ -157,8 +157,27 @@ #define STM32_HAS_GPIOH TRUE
#define STM32_HAS_GPIOI TRUE
+/* I2C attributes.*/
#define STM32_HAS_I2C1 TRUE
+#define STM32_I2C1_RX_DMA_MSK ((STM32_DMA_STREAM_ID_MSK(1, 0) | \
+ STM32_DMA_STREAM_ID_MSK(1, 5)))
+#define STM32_I2C1_RX_DMA_CHN 0x00100001
+#define STM32_I2C1_TX_DMA_MSK ((STM32_DMA_STREAM_ID_MSK(1, 7)) | \
+ (STM32_DMA_STREAM_ID_MSK(1, 6)))
+#define STM32_I2C1_TX_DMA_CHN 0x10000000
+
#define STM32_HAS_I2C2 TRUE
+#define STM32_I2C2_RX_DMA_MSK ((STM32_DMA_STREAM_ID_MSK(1, 2) | \
+ STM32_DMA_STREAM_ID_MSK(1, 3)))
+#define STM32_I2C2_RX_DMA_CHN 0x00007700
+#define STM32_I2C2_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 7))
+#define STM32_I2C2_TX_DMA_CHN 0x70000000
+
+#define STM32_HAS_I2C3 TRUE
+#define STM32_I2C3_RX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2))
+#define STM32_I2C3_RX_DMA_CHN 0x00000300
+#define STM32_I2C3_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 4))
+#define STM32_I2C3_TX_DMA_CHN 0x00030000
#define STM32_HAS_RTC TRUE
|