git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3462 35acf78f-673a-0410-8e92-d51de3d6d3f4

4 files changed, 637 insertions, 498 deletions

diff --git a/os/hal/platforms/STM32F1xx/hal_lld.h b/os/hal/platforms/STM32F1xx/hal_lld.h
index da9e610fd..9b87b0a85 100644
--- a/os/hal/platforms/STM32F1xx/hal_lld.h
+++ b/os/hal/platforms/STM32F1xx/hal_lld.h
@@ -55,509 +55,26 @@
 /* Derived constants and error checks.                                       */

 /*===========================================================================*/

 

+#if defined(__DOXYGEN__)

 /**

- * @brief   Platform name.

+ * @name    Platform identification

+ * @{

  */

-#if defined(__DOXYGEN__)

 #define PLATFORM_NAME           "STM32"

+/** @} */

 

-#elif defined(STM32F10X_LD_VL)

-/*

- * Capability flags for Value Line Low Density devices.

- */

-#define PLATFORM_NAME           "STM32 Value Line Low Density"

-#include "hal_lld_f100.h"

-

-#define STM32_HAS_ADC1          TRUE

-#define STM32_HAS_ADC2          FALSE

-#define STM32_HAS_ADC3          FALSE

-

-#define STM32_HAS_CAN1          FALSE

-#define STM32_HAS_CAN2          FALSE

-

-#define STM32_HAS_DAC           TRUE

-

-#define STM32_HAS_DMA1          TRUE

-#define STM32_HAS_DMA2          FALSE

-

-#define STM32_HAS_ETH           FALSE

-

-#define STM32_EXTI_NUM_CHANNELS 19

-

-#define STM32_HAS_GPIOA         TRUE

-#define STM32_HAS_GPIOB         TRUE

-#define STM32_HAS_GPIOC         TRUE

-#define STM32_HAS_GPIOD         TRUE

-#define STM32_HAS_GPIOE         TRUE

-#define STM32_HAS_GPIOF         FALSE

-#define STM32_HAS_GPIOG         FALSE

-#define STM32_HAS_GPIOH         FALSE

-

-#define STM32_HAS_I2C1          TRUE

-#define STM32_HAS_I2C2          FALSE

-

-#define STM32_HAS_RTC           TRUE

-

-#define STM32_HAS_SDIO          FALSE

-

-#define STM32_HAS_SPI1          TRUE

-#define STM32_HAS_SPI2          FALSE

-#define STM32_HAS_SPI3          FALSE

-

-#define STM32_HAS_TIM1          TRUE

-#define STM32_HAS_TIM2          TRUE

-#define STM32_HAS_TIM3          TRUE

-#define STM32_HAS_TIM4          FALSE

-#define STM32_HAS_TIM5          FALSE

-#define STM32_HAS_TIM6          TRUE

-#define STM32_HAS_TIM7          TRUE

-#define STM32_HAS_TIM8          FALSE

-#define STM32_HAS_TIM9          FALSE

-#define STM32_HAS_TIM10         FALSE

-#define STM32_HAS_TIM11         FALSE

-#define STM32_HAS_TIM12         FALSE

-#define STM32_HAS_TIM13         FALSE

-#define STM32_HAS_TIM14         FALSE

-#define STM32_HAS_TIM15         TRUE

-#define STM32_HAS_TIM16         TRUE

-#define STM32_HAS_TIM17         TRUE

-

-#define STM32_HAS_USART1        TRUE

-#define STM32_HAS_USART2        TRUE

-#define STM32_HAS_USART3        FALSE

-#define STM32_HAS_UART4         FALSE

-#define STM32_HAS_UART5         FALSE

-#define STM32_HAS_USART6        FALSE

-

-#define STM32_HAS_USB           FALSE

-#define STM32_HAS_OTG1          FALSE

-

-#elif defined(STM32F10X_MD_VL)

-/*

- * Capability flags for Value Line Medium Density devices.

- */

-#define PLATFORM_NAME           "STM32 Value Line Medium Density"

+#elif defined(STM32F10X_LD_VL) || defined(STM32F10X_MD_VL) ||               \

+      defined(STM32F10X_HD_VL) || defined(__DOXYGEN__)

 #include "hal_lld_f100.h"

 

-#define STM32_HAS_ADC1          TRUE

-#define STM32_HAS_ADC2          FALSE

-#define STM32_HAS_ADC3          FALSE

-

-#define STM32_HAS_CAN1          FALSE

-#define STM32_HAS_CAN2          FALSE

-

-#define STM32_HAS_DAC           TRUE

-

-#define STM32_HAS_DMA1          TRUE

-#define STM32_HAS_DMA2          FALSE

-

-#define STM32_HAS_ETH           FALSE

-

-#define STM32_EXTI_NUM_CHANNELS 19

-

-#define STM32_HAS_GPIOA         TRUE

-#define STM32_HAS_GPIOB         TRUE

-#define STM32_HAS_GPIOC         TRUE

-#define STM32_HAS_GPIOD         TRUE

-#define STM32_HAS_GPIOE         TRUE

-#define STM32_HAS_GPIOF         FALSE

-#define STM32_HAS_GPIOG         FALSE

-#define STM32_HAS_GPIOH         FALSE

-

-#define STM32_HAS_I2C1          TRUE

-#define STM32_HAS_I2C2          TRUE

-

-#define STM32_HAS_RTC           TRUE

-

-#define STM32_HAS_SDIO          FALSE

-

-#define STM32_HAS_SPI1          TRUE

-#define STM32_HAS_SPI2          TRUE

-#define STM32_HAS_SPI3          FALSE

-

-#define STM32_HAS_TIM1          TRUE

-#define STM32_HAS_TIM2          TRUE

-#define STM32_HAS_TIM3          TRUE

-#define STM32_HAS_TIM4          TRUE

-#define STM32_HAS_TIM5          FALSE

-#define STM32_HAS_TIM6          TRUE

-#define STM32_HAS_TIM7          TRUE

-#define STM32_HAS_TIM8          FALSE

-#define STM32_HAS_TIM9          FALSE

-#define STM32_HAS_TIM10         FALSE

-#define STM32_HAS_TIM11         FALSE

-#define STM32_HAS_TIM12         FALSE

-#define STM32_HAS_TIM13         FALSE

-#define STM32_HAS_TIM14         FALSE

-#define STM32_HAS_TIM15         TRUE

-#define STM32_HAS_TIM16         TRUE

-#define STM32_HAS_TIM17         TRUE

-

-#define STM32_HAS_USART1        TRUE

-#define STM32_HAS_USART2        TRUE

-#define STM32_HAS_USART3        TRUE

-#define STM32_HAS_UART4         FALSE

-#define STM32_HAS_UART5         FALSE

-#define STM32_HAS_USART6        FALSE

-

-#define STM32_HAS_USB           FALSE

-#define STM32_HAS_OTG1          FALSE

-

-#elif defined(STM32F10X_LD)

-/*

- * Capability flags for Performance Line Low Density devices.

- */

-#define PLATFORM_NAME           "STM32 Performance Line Low Density"

-#include "hal_lld_f103.h"

-

-#define STM32_HAS_ADC1          TRUE

-#define STM32_HAS_ADC2          TRUE

-#define STM32_HAS_ADC3          FALSE

-

-#define STM32_HAS_CAN1          TRUE

-#define STM32_HAS_CAN2          FALSE

-

-#define STM32_HAS_DAC           FALSE

-

-#define STM32_HAS_DMA1          TRUE

-#define STM32_HAS_DMA2          FALSE

-

-#define STM32_HAS_ETH           FALSE

-

-#define STM32_EXTI_NUM_CHANNELS 19

-

-#define STM32_HAS_GPIOA         TRUE

-#define STM32_HAS_GPIOB         TRUE

-#define STM32_HAS_GPIOC         TRUE

-#define STM32_HAS_GPIOD         TRUE

-#define STM32_HAS_GPIOE         FALSE

-#define STM32_HAS_GPIOF         FALSE

-#define STM32_HAS_GPIOG         FALSE

-#define STM32_HAS_GPIOH         FALSE

-

-#define STM32_HAS_I2C1          TRUE

-#define STM32_HAS_I2C2          FALSE

-

-#define STM32_HAS_RTC           TRUE

-

-#define STM32_HAS_SDIO          FALSE

-

-#define STM32_HAS_SPI1          TRUE

-#define STM32_HAS_SPI2          FALSE

-#define STM32_HAS_SPI3          FALSE

-

-#define STM32_HAS_TIM1          TRUE

-#define STM32_HAS_TIM2          TRUE

-#define STM32_HAS_TIM3          TRUE

-#define STM32_HAS_TIM4          FALSE

-#define STM32_HAS_TIM5          FALSE

-#define STM32_HAS_TIM6          FALSE

-#define STM32_HAS_TIM7          FALSE

-#define STM32_HAS_TIM8          FALSE

-#define STM32_HAS_TIM9          FALSE

-#define STM32_HAS_TIM10         FALSE

-#define STM32_HAS_TIM11         FALSE

-#define STM32_HAS_TIM12         FALSE

-#define STM32_HAS_TIM13         FALSE

-#define STM32_HAS_TIM14         FALSE

-#define STM32_HAS_TIM15         FALSE

-#define STM32_HAS_TIM16         FALSE

-#define STM32_HAS_TIM17         FALSE

-

-#define STM32_HAS_USART1        TRUE

-#define STM32_HAS_USART2        TRUE

-#define STM32_HAS_USART3        FALSE

-#define STM32_HAS_UART4         FALSE

-#define STM32_HAS_UART5         FALSE

-#define STM32_HAS_USART6        FALSE

-

-#define STM32_HAS_USB           FALSE

-#define STM32_HAS_OTG1          FALSE

-

-#elif defined(STM32F10X_MD)

-/*

- * Capability flags for Performance Line Medium Density devices.

- */

-#define PLATFORM_NAME           "STM32 Performance Line Medium Density"

-#include "hal_lld_f103.h"

-

-#define STM32_HAS_ADC1          TRUE

-#define STM32_HAS_ADC2          TRUE

-#define STM32_HAS_ADC3          FALSE

-

-#define STM32_HAS_CAN1          TRUE

-#define STM32_HAS_CAN2          FALSE

-

-#define STM32_HAS_DAC           FALSE

-

-#define STM32_HAS_DMA1          TRUE

-#define STM32_HAS_DMA2          FALSE

-

-#define STM32_HAS_ETH           FALSE

-

-#define STM32_EXTI_NUM_CHANNELS 19

-

-#define STM32_HAS_GPIOA         TRUE

-#define STM32_HAS_GPIOB         TRUE

-#define STM32_HAS_GPIOC         TRUE

-#define STM32_HAS_GPIOD         TRUE

-#define STM32_HAS_GPIOE         TRUE

-#define STM32_HAS_GPIOF         FALSE

-#define STM32_HAS_GPIOG         FALSE

-#define STM32_HAS_GPIOH         FALSE

-

-#define STM32_HAS_I2C1          TRUE

-#define STM32_HAS_I2C2          TRUE

-

-#define STM32_HAS_RTC           TRUE

-

-#define STM32_HAS_SDIO          FALSE

-

-#define STM32_HAS_SPI1          TRUE

-#define STM32_HAS_SPI2          TRUE

-#define STM32_HAS_SPI3          FALSE

-

-#define STM32_HAS_TIM1          TRUE

-#define STM32_HAS_TIM2          TRUE

-#define STM32_HAS_TIM3          TRUE

-#define STM32_HAS_TIM4          TRUE

-#define STM32_HAS_TIM5          FALSE

-#define STM32_HAS_TIM6          FALSE

-#define STM32_HAS_TIM7          FALSE

-#define STM32_HAS_TIM8          FALSE

-#define STM32_HAS_TIM9          FALSE

-#define STM32_HAS_TIM10         FALSE

-#define STM32_HAS_TIM11         FALSE

-#define STM32_HAS_TIM12         FALSE

-#define STM32_HAS_TIM13         FALSE

-#define STM32_HAS_TIM14         FALSE

-#define STM32_HAS_TIM15         FALSE

-#define STM32_HAS_TIM16         FALSE

-#define STM32_HAS_TIM17         FALSE

-

-#define STM32_HAS_USART1        TRUE

-#define STM32_HAS_USART2        TRUE

-#define STM32_HAS_USART3        TRUE

-#define STM32_HAS_UART4         FALSE

-#define STM32_HAS_UART5         FALSE

-#define STM32_HAS_USART6        FALSE

-

-#define STM32_HAS_USB           TRUE

-#define STM32_HAS_OTG1          FALSE

-

-#elif defined(STM32F10X_HD)

-/*

- * Capability flags for Performance Line High Density devices.

- */

-#define PLATFORM_NAME           "STM32 Performance Line High Density"

-#include "hal_lld_f103.h"

-

-#define STM32_HAS_ADC1          TRUE

-#define STM32_HAS_ADC2          TRUE

-#define STM32_HAS_ADC3          TRUE

-

-#define STM32_HAS_CAN1          TRUE

-#define STM32_HAS_CAN2          FALSE

-

-#define STM32_HAS_DAC           TRUE

-

-#define STM32_HAS_DMA1          TRUE

-#define STM32_HAS_DMA2          TRUE

-

-#define STM32_HAS_ETH           FALSE

-

-#define STM32_EXTI_NUM_CHANNELS 19

-

-#define STM32_HAS_GPIOA         TRUE

-#define STM32_HAS_GPIOB         TRUE

-#define STM32_HAS_GPIOC         TRUE

-#define STM32_HAS_GPIOD         TRUE

-#define STM32_HAS_GPIOE         TRUE

-#define STM32_HAS_GPIOF         TRUE

-#define STM32_HAS_GPIOG         TRUE

-#define STM32_HAS_GPIOH         FALSE

-

-#define STM32_HAS_I2C1          TRUE

-#define STM32_HAS_I2C2          TRUE

-

-#define STM32_HAS_RTC           TRUE

-

-#define STM32_HAS_SDIO          TRUE

-

-#define STM32_HAS_SPI1          TRUE

-#define STM32_HAS_SPI2          TRUE

-#define STM32_HAS_SPI3          TRUE

-

-#define STM32_HAS_TIM1          TRUE

-#define STM32_HAS_TIM2          TRUE

-#define STM32_HAS_TIM3          TRUE

-#define STM32_HAS_TIM4          TRUE

-#define STM32_HAS_TIM5          TRUE

-#define STM32_HAS_TIM6          TRUE

-#define STM32_HAS_TIM7          TRUE

-#define STM32_HAS_TIM8          TRUE

-#define STM32_HAS_TIM9          TRUE

-#define STM32_HAS_TIM10         TRUE

-#define STM32_HAS_TIM11         TRUE

-#define STM32_HAS_TIM12         TRUE

-#define STM32_HAS_TIM13         TRUE

-#define STM32_HAS_TIM14         TRUE

-#define STM32_HAS_TIM15         FALSE

-#define STM32_HAS_TIM16         FALSE

-#define STM32_HAS_TIM17         FALSE

-

-#define STM32_HAS_USART1        TRUE

-#define STM32_HAS_USART2        TRUE

-#define STM32_HAS_USART3        TRUE

-#define STM32_HAS_UART4         TRUE

-#define STM32_HAS_UART5         TRUE

-#define STM32_HAS_USART6        FALSE

-

-#define STM32_HAS_USB           TRUE

-#define STM32_HAS_OTG1          FALSE

-

-#elif defined(STM32F10X_XL)

-/*

- * Capability flags for Performance Line eXtra Density devices.

- */

-#define PLATFORM_NAME           "STM32 Performance Line eXtra Density"

+#elif defined(STM32F10X_LD) || defined(STM32F10X_MD) ||                     \

+      defined(STM32F10X_HD) || defined(STM32F10X_XL) ||                     \

+      defined(__DOXYGEN__)

 #include "hal_lld_f103.h"

 

-#define STM32_HAS_ADC1          TRUE

-#define STM32_HAS_ADC2          TRUE

-#define STM32_HAS_ADC3          TRUE

-

-#define STM32_HAS_CAN1          TRUE

-#define STM32_HAS_CAN2          FALSE

-

-#define STM32_HAS_DAC           TRUE

-

-#define STM32_HAS_DMA1          TRUE

-#define STM32_HAS_DMA2          TRUE

-

-#define STM32_HAS_ETH           FALSE

-

-#define STM32_EXTI_NUM_CHANNELS 19

-

-#define STM32_HAS_GPIOA         TRUE

-#define STM32_HAS_GPIOB         TRUE

-#define STM32_HAS_GPIOC         TRUE

-#define STM32_HAS_GPIOD         TRUE

-#define STM32_HAS_GPIOE         TRUE

-#define STM32_HAS_GPIOF         TRUE

-#define STM32_HAS_GPIOG         TRUE

-#define STM32_HAS_GPIOH         FALSE

-

-#define STM32_HAS_I2C1          TRUE

-#define STM32_HAS_I2C2          TRUE

-

-#define STM32_HAS_RTC           TRUE

-

-#define STM32_HAS_SDIO          TRUE

-

-#define STM32_HAS_SPI1          TRUE

-#define STM32_HAS_SPI2          TRUE

-#define STM32_HAS_SPI3          TRUE

-

-#define STM32_HAS_TIM1          TRUE

-#define STM32_HAS_TIM2          TRUE

-#define STM32_HAS_TIM3          TRUE

-#define STM32_HAS_TIM4          TRUE

-#define STM32_HAS_TIM5          TRUE

-#define STM32_HAS_TIM6          TRUE

-#define STM32_HAS_TIM7          TRUE

-#define STM32_HAS_TIM8          TRUE

-#define STM32_HAS_TIM9          FALSE

-#define STM32_HAS_TIM10         FALSE

-#define STM32_HAS_TIM11         FALSE

-#define STM32_HAS_TIM12         FALSE

-#define STM32_HAS_TIM13         FALSE

-#define STM32_HAS_TIM14         FALSE

-#define STM32_HAS_TIM15         FALSE

-#define STM32_HAS_TIM16         FALSE

-#define STM32_HAS_TIM17         FALSE

-

-#define STM32_HAS_USART1        TRUE

-#define STM32_HAS_USART2        TRUE

-#define STM32_HAS_USART3        TRUE

-#define STM32_HAS_UART4         TRUE

-#define STM32_HAS_UART5         TRUE

-#define STM32_HAS_USART6        FALSE

-

-#define STM32_HAS_USB           TRUE

-#define STM32_HAS_OTG1          FALSE

-

-#elif defined(STM32F10X_CL)

-/*

- * Capability flags for Connectivity Line devices.

- */

-#define PLATFORM_NAME           "STM32 Connectivity Line"

+#elif defined(STM32F10X_CL) || defined(__DOXYGEN__)

 #include "hal_lld_f105_f107.h"

 

-#define STM32_HAS_ADC1          TRUE

-#define STM32_HAS_ADC2          TRUE

-#define STM32_HAS_ADC3          FALSE

-

-#define STM32_HAS_CAN1          TRUE

-#define STM32_HAS_CAN2          TRUE

-

-#define STM32_HAS_DAC           TRUE

-

-#define STM32_HAS_DMA1          TRUE

-#define STM32_HAS_DMA2          TRUE

-

-#define STM32_HAS_ETH           TRUE

-

-#define STM32_EXTI_NUM_CHANNELS 20

-

-#define STM32_HAS_GPIOA         TRUE

-#define STM32_HAS_GPIOB         TRUE

-#define STM32_HAS_GPIOC         TRUE

-#define STM32_HAS_GPIOD         TRUE

-#define STM32_HAS_GPIOE         TRUE

-#define STM32_HAS_GPIOF         FALSE

-#define STM32_HAS_GPIOG         FALSE

-#define STM32_HAS_GPIOH         FALSE

-

-#define STM32_HAS_I2C1          TRUE

-#define STM32_HAS_I2C2          TRUE

-

-#define STM32_HAS_RTC           TRUE

-

-#define STM32_HAS_SDIO          FALSE

-

-#define STM32_HAS_SPI1          TRUE

-#define STM32_HAS_SPI2          TRUE

-#define STM32_HAS_SPI3          TRUE

-

-#define STM32_HAS_TIM1          TRUE

-#define STM32_HAS_TIM2          TRUE

-#define STM32_HAS_TIM3          TRUE

-#define STM32_HAS_TIM4          TRUE

-#define STM32_HAS_TIM5          TRUE

-#define STM32_HAS_TIM6          TRUE

-#define STM32_HAS_TIM7          TRUE

-#define STM32_HAS_TIM8          FALSE

-#define STM32_HAS_TIM9          FALSE

-#define STM32_HAS_TIM10         FALSE

-#define STM32_HAS_TIM11         FALSE

-#define STM32_HAS_TIM12         FALSE

-#define STM32_HAS_TIM13         FALSE

-#define STM32_HAS_TIM14         FALSE

-#define STM32_HAS_TIM15         FALSE

-#define STM32_HAS_TIM16         FALSE

-#define STM32_HAS_TIM17         FALSE

-

-#define STM32_HAS_USART1        TRUE

-#define STM32_HAS_USART2        TRUE

-#define STM32_HAS_USART3        TRUE

-#define STM32_HAS_UART4         TRUE

-#define STM32_HAS_UART5         TRUE

-#define STM32_HAS_USART6        FALSE

-

-#define STM32_HAS_USB           FALSE

-#define STM32_HAS_OTG1          TRUE

-

 #else

 #error "unspecified, unsupported or invalid STM32 platform"

 #endif

diff --git a/os/hal/platforms/STM32F1xx/hal_lld_f100.h b/os/hal/platforms/STM32F1xx/hal_lld_f100.h
index 012cf0c11..864be581e 100644
--- a/os/hal/platforms/STM32F1xx/hal_lld_f100.h
+++ b/os/hal/platforms/STM32F1xx/hal_lld_f100.h
@@ -40,10 +40,35 @@
 /* Driver constants.                                                         */

 /*===========================================================================*/

 

+/**

+ * @name    Platform identification

+ * @{

+ */

+#if defined(__DOXYGEN__)

+#define PLATFORM_NAME           "STM32 Value Line"

+

+#elif defined(STM32F10X_LD_VL)

+#define PLATFORM_NAME           "STM32 Value Line Low Density"

+

+#elif defined(STM32F10X_MD_VL)

+#define PLATFORM_NAME           "STM32 Value Line Medium Density"

+#else

+#error "unsupported STM32 Value Line member"

+#endif

+/** @} */

+

+/**

+ * @name    Internal clock sources

+ * @{

+ */

 #define STM32_HSICLK            8000000     /**< High speed internal clock. */

 #define STM32_LSICLK            40000       /**< Low speed internal clock.  */

+/** @} */

 

-/* RCC_CFGR register bits definitions.*/

+/**

+ * @name    RCC_CFGR register bits definitions

+ * @{

+ */

 #define STM32_SW_HSI            (0 << 0)    /**< SYSCLK source is HSI.      */

 #define STM32_SW_HSE            (1 << 0)    /**< SYSCLK source is HSE.      */

 #define STM32_SW_PLL            (2 << 0)    /**< SYSCLK source is PLL.      */

@@ -92,11 +117,168 @@
 #define STM32_RTC_LSI           (2 << 8)    /**< LSI used as RTC clock.     */

 #define STM32_RTC_HSE           (3 << 8)    /**< HSE divided by 128 used as

                                                  RTC clock.                 */

+/** @} */

+

+/*===========================================================================*/

+/* Platform capabilities.                                                    */

+/*===========================================================================*/

+

+#if defined(STM32F10X_LD_VL) || defined(__DOXYGEN__)

+/**

+ * @name    STM32F100 LD capabilities

+ * @{

+ */

+#define STM32_HAS_ADC1          TRUE

+#define STM32_HAS_ADC2          FALSE

+#define STM32_HAS_ADC3          FALSE

+

+#define STM32_HAS_CAN1          FALSE

+#define STM32_HAS_CAN2          FALSE

+

+#define STM32_HAS_DAC           TRUE

+

+#define STM32_HAS_DMA1          TRUE

+#define STM32_HAS_DMA2          FALSE

+

+#define STM32_HAS_ETH           FALSE

+

+#define STM32_EXTI_NUM_CHANNELS 19

+

+#define STM32_HAS_GPIOA         TRUE

+#define STM32_HAS_GPIOB         TRUE

+#define STM32_HAS_GPIOC         TRUE

+#define STM32_HAS_GPIOD         TRUE

+#define STM32_HAS_GPIOE         TRUE

+#define STM32_HAS_GPIOF         FALSE

+#define STM32_HAS_GPIOG         FALSE

+#define STM32_HAS_GPIOH         FALSE

+#define STM32_HAS_GPIOI         FALSE

+

+#define STM32_HAS_I2C1          TRUE

+#define STM32_HAS_I2C2          FALSE

+#define STM32_HAS_I2C3          FALSE

+

+#define STM32_HAS_RTC           TRUE

+

+#define STM32_HAS_SDIO          FALSE

+

+#define STM32_HAS_SPI1          TRUE

+#define STM32_HAS_SPI2          FALSE

+#define STM32_HAS_SPI3          FALSE

+

+#define STM32_HAS_TIM1          TRUE

+#define STM32_HAS_TIM2          TRUE

+#define STM32_HAS_TIM3          TRUE

+#define STM32_HAS_TIM4          FALSE

+#define STM32_HAS_TIM5          FALSE

+#define STM32_HAS_TIM6          TRUE

+#define STM32_HAS_TIM7          TRUE

+#define STM32_HAS_TIM8          FALSE

+#define STM32_HAS_TIM9          FALSE

+#define STM32_HAS_TIM10         FALSE

+#define STM32_HAS_TIM11         FALSE

+#define STM32_HAS_TIM12         FALSE

+#define STM32_HAS_TIM13         FALSE

+#define STM32_HAS_TIM14         FALSE

+#define STM32_HAS_TIM15         TRUE

+#define STM32_HAS_TIM16         TRUE

+#define STM32_HAS_TIM17         TRUE

+

+#define STM32_HAS_USART1        TRUE

+#define STM32_HAS_USART2        TRUE

+#define STM32_HAS_USART3        FALSE

+#define STM32_HAS_UART4         FALSE

+#define STM32_HAS_UART5         FALSE

+#define STM32_HAS_USART6        FALSE

+

+#define STM32_HAS_USB           FALSE

+#define STM32_HAS_OTG1          FALSE

+#define STM32_HAS_OTG2          FALSE

+/** @} */

+#endif /* defined(STM32F10X_LD_VL) */

+

+#if defined(STM32F10X_MD_VL) || defined(__DOXYGEN__)

+/**

+ * @name    STM32F100 MD capabilities

+ * @{

+ */

+#define STM32_HAS_ADC1          TRUE

+#define STM32_HAS_ADC2          FALSE

+#define STM32_HAS_ADC3          FALSE

+

+#define STM32_HAS_CAN1          FALSE

+#define STM32_HAS_CAN2          FALSE

+

+#define STM32_HAS_DAC           TRUE

+

+#define STM32_HAS_DMA1          TRUE

+#define STM32_HAS_DMA2          FALSE

+

+#define STM32_HAS_ETH           FALSE

+

+#define STM32_EXTI_NUM_CHANNELS 19

+

+#define STM32_HAS_GPIOA         TRUE

+#define STM32_HAS_GPIOB         TRUE

+#define STM32_HAS_GPIOC         TRUE

+#define STM32_HAS_GPIOD         TRUE

+#define STM32_HAS_GPIOE         TRUE

+#define STM32_HAS_GPIOF         FALSE

+#define STM32_HAS_GPIOG         FALSE

+#define STM32_HAS_GPIOH         FALSE

+#define STM32_HAS_GPIOI         FALSE

+

+#define STM32_HAS_I2C1          TRUE

+#define STM32_HAS_I2C2          TRUE

+#define STM32_HAS_I2C3          FALSE

+

+#define STM32_HAS_RTC           TRUE

+

+#define STM32_HAS_SDIO          FALSE

+

+#define STM32_HAS_SPI1          TRUE

+#define STM32_HAS_SPI2          TRUE

+#define STM32_HAS_SPI3          FALSE

+

+#define STM32_HAS_TIM1          TRUE

+#define STM32_HAS_TIM2          TRUE

+#define STM32_HAS_TIM3          TRUE

+#define STM32_HAS_TIM4          TRUE

+#define STM32_HAS_TIM5          FALSE

+#define STM32_HAS_TIM6          TRUE

+#define STM32_HAS_TIM7          TRUE

+#define STM32_HAS_TIM8          FALSE

+#define STM32_HAS_TIM9          FALSE

+#define STM32_HAS_TIM10         FALSE

+#define STM32_HAS_TIM11         FALSE

+#define STM32_HAS_TIM12         FALSE

+#define STM32_HAS_TIM13         FALSE

+#define STM32_HAS_TIM14         FALSE

+#define STM32_HAS_TIM15         TRUE

+#define STM32_HAS_TIM16         TRUE

+#define STM32_HAS_TIM17         TRUE

+

+#define STM32_HAS_USART1        TRUE

+#define STM32_HAS_USART2        TRUE

+#define STM32_HAS_USART3        TRUE

+#define STM32_HAS_UART4         FALSE

+#define STM32_HAS_UART5         FALSE

+#define STM32_HAS_USART6        FALSE

+

+#define STM32_HAS_USB           FALSE

+#define STM32_HAS_OTG1          FALSE

+#define STM32_HAS_OTG2          FALSE

+/** @} */

+#endif /* defined(STM32F10X_MD_VL) */

 

 /*===========================================================================*/

 /* Platform specific friendly IRQ names.                                     */

 /*===========================================================================*/

 

+/**

+ * @name  IRQ VECTOR names

+ * @{

+ */

 #define WWDG_IRQHandler         Vector40    /**< Window Watchdog.           */

 #define PVD_IRQHandler          Vector44    /**< PVD through EXTI Line

                                                  detect.                    */

@@ -149,6 +331,7 @@
 #define TIM12_IRQHandler        VectorEC    /**< TIM12.                     */

 #define TIM13_IRQHandler        VectorF0    /**< TIM13.                     */

 #define TIM14_IRQHandler        VectorF4    /**< TIM14.                     */

+/** @} */

 

 /*===========================================================================*/

 /* Driver pre-compile time settings.                                         */

diff --git a/os/hal/platforms/STM32F1xx/hal_lld_f103.h b/os/hal/platforms/STM32F1xx/hal_lld_f103.h
index 7f493ee01..7c04b7d38 100644
--- a/os/hal/platforms/STM32F1xx/hal_lld_f103.h
+++ b/os/hal/platforms/STM32F1xx/hal_lld_f103.h
@@ -40,10 +40,42 @@
 /* Driver constants.                                                         */

 /*===========================================================================*/

 

+/**

+ * @name    Platform identification

+ * @{

+ */

+#if defined(__DOXYGEN__)

+#define PLATFORM_NAME           "STM32 Performance Line"

+

+#elif defined(STM32F10X_LD)

+#define PLATFORM_NAME           "STM32 Performance Line Low Density"

+

+#elif defined(STM32F10X_MD)

+#define PLATFORM_NAME           "STM32 Performance Line Medium Density"

+

+#elif defined(STM32F10X_HD)

+#define PLATFORM_NAME           "STM32 Performance Line High Density"

+

+#elif defined(STM32F10X_XL)

+#define PLATFORM_NAME           "STM32 Performance Line eXtra Density"

+

+#else

+#error "unsupported STM32 Performance Line member"

+#endif

+/** @} */

+

+/**

+ * @name    Internal clock sources

+ * @{

+ */

 #define STM32_HSICLK            8000000     /**< High speed internal clock. */

 #define STM32_LSICLK            40000       /**< Low speed internal clock.  */

+/** @} */

 

-/* RCC_CFGR register bits definitions.*/

+/**

+ * @name    RCC_CFGR register bits definitions

+ * @{

+ */

 #define STM32_SW_HSI            (0 << 0)    /**< SYSCLK source is HSI.      */

 #define STM32_SW_HSE            (1 << 0)    /**< SYSCLK source is HSE.      */

 #define STM32_SW_PLL            (2 << 0)    /**< SYSCLK source is PLL.      */

@@ -95,11 +127,316 @@
 #define STM32_RTC_LSI           (2 << 8)    /**< LSI used as RTC clock.     */

 #define STM32_RTC_HSE           (3 << 8)    /**< HSE divided by 128 used as

                                                  RTC clock.                 */

+/** @} */

+

+/*===========================================================================*/

+/* Platform capabilities.                                                    */

+/*===========================================================================*/

+

+#if defined(STM32F10X_LD) || defined(__DOXYGEN__)

+/**

+ * @name    STM32F103 LD capabilities

+ * @{

+ */

+#define STM32_HAS_ADC1          TRUE

+#define STM32_HAS_ADC2          TRUE

+#define STM32_HAS_ADC3          FALSE

+

+#define STM32_HAS_CAN1          TRUE

+#define STM32_HAS_CAN2          FALSE

+

+#define STM32_HAS_DAC           FALSE

+

+#define STM32_HAS_DMA1          TRUE

+#define STM32_HAS_DMA2          FALSE

+

+#define STM32_HAS_ETH           FALSE

+

+#define STM32_EXTI_NUM_CHANNELS 19

+

+#define STM32_HAS_GPIOA         TRUE

+#define STM32_HAS_GPIOB         TRUE

+#define STM32_HAS_GPIOC         TRUE

+#define STM32_HAS_GPIOD         TRUE

+#define STM32_HAS_GPIOE         FALSE

+#define STM32_HAS_GPIOF         FALSE

+#define STM32_HAS_GPIOG         FALSE

+#define STM32_HAS_GPIOH         FALSE

+#define STM32_HAS_GPIOI         FALSE

+

+#define STM32_HAS_I2C1          TRUE

+#define STM32_HAS_I2C2          FALSE

+#define STM32_HAS_I2C3          FALSE

+

+#define STM32_HAS_RTC           TRUE

+

+#define STM32_HAS_SDIO          FALSE

+

+#define STM32_HAS_SPI1          TRUE

+#define STM32_HAS_SPI2          FALSE

+#define STM32_HAS_SPI3          FALSE

+

+#define STM32_HAS_TIM1          TRUE

+#define STM32_HAS_TIM2          TRUE

+#define STM32_HAS_TIM3          TRUE

+#define STM32_HAS_TIM4          FALSE

+#define STM32_HAS_TIM5          FALSE

+#define STM32_HAS_TIM6          FALSE

+#define STM32_HAS_TIM7          FALSE

+#define STM32_HAS_TIM8          FALSE

+#define STM32_HAS_TIM9          FALSE

+#define STM32_HAS_TIM10         FALSE

+#define STM32_HAS_TIM11         FALSE

+#define STM32_HAS_TIM12         FALSE

+#define STM32_HAS_TIM13         FALSE

+#define STM32_HAS_TIM14         FALSE

+#define STM32_HAS_TIM15         FALSE

+#define STM32_HAS_TIM16         FALSE

+#define STM32_HAS_TIM17         FALSE

+

+#define STM32_HAS_USART1        TRUE

+#define STM32_HAS_USART2        TRUE

+#define STM32_HAS_USART3        FALSE

+#define STM32_HAS_UART4         FALSE

+#define STM32_HAS_UART5         FALSE

+#define STM32_HAS_USART6        FALSE

+

+#define STM32_HAS_USB           FALSE

+#define STM32_HAS_OTG1          FALSE

+#define STM32_HAS_OTG2          FALSE

+/** @} */

+#endif /* defined(STM32F10X_LD) */

+

+#if defined(STM32F10X_MD) || defined(__DOXYGEN__)

+/**

+ * @name    STM32F103 MD capabilities

+ * @{

+ */

+#define STM32_HAS_ADC1          TRUE

+#define STM32_HAS_ADC2          TRUE

+#define STM32_HAS_ADC3          FALSE

+

+#define STM32_HAS_CAN1          TRUE

+#define STM32_HAS_CAN2          FALSE

+

+#define STM32_HAS_DAC           FALSE

+

+#define STM32_HAS_DMA1          TRUE

+#define STM32_HAS_DMA2          FALSE

+

+#define STM32_HAS_ETH           FALSE

+

+#define STM32_EXTI_NUM_CHANNELS 19

+

+#define STM32_HAS_GPIOA         TRUE

+#define STM32_HAS_GPIOB         TRUE

+#define STM32_HAS_GPIOC         TRUE

+#define STM32_HAS_GPIOD         TRUE

+#define STM32_HAS_GPIOE         TRUE

+#define STM32_HAS_GPIOF         FALSE

+#define STM32_HAS_GPIOG         FALSE

+#define STM32_HAS_GPIOH         FALSE

+#define STM32_HAS_GPIOI         FALSE

+

+#define STM32_HAS_I2C1          TRUE

+#define STM32_HAS_I2C2          TRUE

+#define STM32_HAS_I2C3          FALSE

+

+#define STM32_HAS_RTC           TRUE

+

+#define STM32_HAS_SDIO          FALSE

+

+#define STM32_HAS_SPI1          TRUE

+#define STM32_HAS_SPI2          TRUE

+#define STM32_HAS_SPI3          FALSE

+

+#define STM32_HAS_TIM1          TRUE

+#define STM32_HAS_TIM2          TRUE

+#define STM32_HAS_TIM3          TRUE

+#define STM32_HAS_TIM4          TRUE

+#define STM32_HAS_TIM5          FALSE

+#define STM32_HAS_TIM6          FALSE

+#define STM32_HAS_TIM7          FALSE

+#define STM32_HAS_TIM8          FALSE

+#define STM32_HAS_TIM9          FALSE

+#define STM32_HAS_TIM10         FALSE

+#define STM32_HAS_TIM11         FALSE

+#define STM32_HAS_TIM12         FALSE

+#define STM32_HAS_TIM13         FALSE

+#define STM32_HAS_TIM14         FALSE

+#define STM32_HAS_TIM15         FALSE

+#define STM32_HAS_TIM16         FALSE

+#define STM32_HAS_TIM17         FALSE

+

+#define STM32_HAS_USART1        TRUE

+#define STM32_HAS_USART2        TRUE

+#define STM32_HAS_USART3        TRUE

+#define STM32_HAS_UART4         FALSE

+#define STM32_HAS_UART5         FALSE

+#define STM32_HAS_USART6        FALSE

+

+#define STM32_HAS_USB           TRUE

+#define STM32_HAS_OTG1          FALSE

+#define STM32_HAS_OTG2          FALSE

+/** @} */

+#endif /* defined(STM32F10X_MD) */

+

+#if defined(STM32F10X_HD) || defined(__DOXYGEN__)

+/**

+ * @name    STM32F103 HD capabilities

+ * @{

+ */

+#define STM32_HAS_ADC1          TRUE

+#define STM32_HAS_ADC2          TRUE

+#define STM32_HAS_ADC3          TRUE

+

+#define STM32_HAS_CAN1          TRUE

+#define STM32_HAS_CAN2          FALSE

+

+#define STM32_HAS_DAC           TRUE

+

+#define STM32_HAS_DMA1          TRUE

+#define STM32_HAS_DMA2          TRUE

+

+#define STM32_HAS_ETH           FALSE

+

+#define STM32_EXTI_NUM_CHANNELS 19

+

+#define STM32_HAS_GPIOA         TRUE

+#define STM32_HAS_GPIOB         TRUE

+#define STM32_HAS_GPIOC         TRUE

+#define STM32_HAS_GPIOD         TRUE

+#define STM32_HAS_GPIOE         TRUE

+#define STM32_HAS_GPIOF         TRUE

+#define STM32_HAS_GPIOG         TRUE

+#define STM32_HAS_GPIOH         FALSE

+#define STM32_HAS_GPIOI         FALSE

+

+#define STM32_HAS_I2C1          TRUE

+#define STM32_HAS_I2C2          TRUE

+#define STM32_HAS_I2C3          FALSE

+

+#define STM32_HAS_RTC           TRUE

+

+#define STM32_HAS_SDIO          TRUE

+

+#define STM32_HAS_SPI1          TRUE

+#define STM32_HAS_SPI2          TRUE

+#define STM32_HAS_SPI3          TRUE

+

+#define STM32_HAS_TIM1          TRUE

+#define STM32_HAS_TIM2          TRUE

+#define STM32_HAS_TIM3          TRUE

+#define STM32_HAS_TIM4          TRUE

+#define STM32_HAS_TIM5          TRUE

+#define STM32_HAS_TIM6          TRUE

+#define STM32_HAS_TIM7          TRUE

+#define STM32_HAS_TIM8          TRUE

+#define STM32_HAS_TIM9          TRUE

+#define STM32_HAS_TIM10         TRUE

+#define STM32_HAS_TIM11         TRUE

+#define STM32_HAS_TIM12         TRUE

+#define STM32_HAS_TIM13         TRUE

+#define STM32_HAS_TIM14         TRUE

+#define STM32_HAS_TIM15         FALSE

+#define STM32_HAS_TIM16         FALSE

+#define STM32_HAS_TIM17         FALSE

+

+#define STM32_HAS_USART1        TRUE

+#define STM32_HAS_USART2        TRUE

+#define STM32_HAS_USART3        TRUE

+#define STM32_HAS_UART4         TRUE

+#define STM32_HAS_UART5         TRUE

+#define STM32_HAS_USART6        FALSE

+

+#define STM32_HAS_USB           TRUE

+#define STM32_HAS_OTG1          FALSE

+#define STM32_HAS_OTG2          FALSE

+/** @} */

+#endif /* defined(STM32F10X_HD) */

+

+#if defined(STM32F10X_XL) || defined(__DOXYGEN__)

+/**

+ * @name    STM32F103 XL capabilities

+ * @{

+ */

+#define STM32_HAS_ADC1          TRUE

+#define STM32_HAS_ADC2          TRUE

+#define STM32_HAS_ADC3          TRUE

+

+#define STM32_HAS_CAN1          TRUE

+#define STM32_HAS_CAN2          FALSE

+

+#define STM32_HAS_DAC           TRUE

+

+#define STM32_HAS_DMA1          TRUE

+#define STM32_HAS_DMA2          TRUE

+

+#define STM32_HAS_ETH           FALSE

+

+#define STM32_EXTI_NUM_CHANNELS 19

+

+#define STM32_HAS_GPIOA         TRUE

+#define STM32_HAS_GPIOB         TRUE

+#define STM32_HAS_GPIOC         TRUE

+#define STM32_HAS_GPIOD         TRUE

+#define STM32_HAS_GPIOE         TRUE

+#define STM32_HAS_GPIOF         TRUE

+#define STM32_HAS_GPIOG         TRUE

+#define STM32_HAS_GPIOH         FALSE

+#define STM32_HAS_GPIOI         FALSE

+

+#define STM32_HAS_I2C1          TRUE

+#define STM32_HAS_I2C2          TRUE

+#define STM32_HAS_I2C3          FALSE

+

+#define STM32_HAS_RTC           TRUE

+

+#define STM32_HAS_SDIO          TRUE

+

+#define STM32_HAS_SPI1          TRUE

+#define STM32_HAS_SPI2          TRUE

+#define STM32_HAS_SPI3          TRUE

+

+#define STM32_HAS_TIM1          TRUE

+#define STM32_HAS_TIM2          TRUE

+#define STM32_HAS_TIM3          TRUE

+#define STM32_HAS_TIM4          TRUE

+#define STM32_HAS_TIM5          TRUE

+#define STM32_HAS_TIM6          TRUE

+#define STM32_HAS_TIM7          TRUE

+#define STM32_HAS_TIM8          TRUE

+#define STM32_HAS_TIM9          FALSE

+#define STM32_HAS_TIM10         FALSE

+#define STM32_HAS_TIM11         FALSE

+#define STM32_HAS_TIM12         FALSE

+#define STM32_HAS_TIM13         FALSE

+#define STM32_HAS_TIM14         FALSE

+#define STM32_HAS_TIM15         FALSE

+#define STM32_HAS_TIM16         FALSE

+#define STM32_HAS_TIM17         FALSE

+

+#define STM32_HAS_USART1        TRUE

+#define STM32_HAS_USART2        TRUE

+#define STM32_HAS_USART3        TRUE

+#define STM32_HAS_UART4         TRUE

+#define STM32_HAS_UART5         TRUE

+#define STM32_HAS_USART6        FALSE

+

+#define STM32_HAS_USB           TRUE

+#define STM32_HAS_OTG1          FALSE

+#define STM32_HAS_OTG2          FALSE

+/** @} */

+#endif /* defined(STM32F10X_XL) */

 

 /*===========================================================================*/

 /* Platform specific friendly IRQ names.                                     */

 /*===========================================================================*/

 

+/**

+ * @name  IRQ VECTOR names

+ * @{

+ */

 #define WWDG_IRQHandler         Vector40    /**< Window Watchdog.           */

 #define PVD_IRQHandler          Vector44    /**< PVD through EXTI Line

                                                  detect.                    */

@@ -165,6 +502,7 @@
 #define DMA2_Ch2_IRQHandler     Vector124   /**< DMA2 Channel2.             */

 #define DMA2_Ch3_IRQHandler     Vector128   /**< DMA2 Channel3.             */

 #define DMA2_Ch4_5_IRQHandler   Vector12C   /**< DMA2 Channel4 & Channel5.  */

+/** @} */

 

 /*===========================================================================*/

 /* Driver pre-compile time settings.                                         */

diff --git a/os/hal/platforms/STM32F1xx/hal_lld_f105_f107.h b/os/hal/platforms/STM32F1xx/hal_lld_f105_f107.h
index 25e28c62d..e4361c77f 100644
--- a/os/hal/platforms/STM32F1xx/hal_lld_f105_f107.h
+++ b/os/hal/platforms/STM32F1xx/hal_lld_f105_f107.h
@@ -40,10 +40,25 @@
 /* Driver constants.                                                         */

 /*===========================================================================*/

 

+/**

+ * @name    Platform identification

+ * @{

+ */

+#define PLATFORM_NAME           "STM32 Connectivity Line"

+/** @} */

+

+/**

+ * @name    Internal clock sources

+ * @{

+ */

 #define STM32_HSICLK            8000000     /**< High speed internal clock. */

 #define STM32_LSICLK            40000       /**< Low speed internal clock.  */

+/** @} */

 

-/* RCC_CFGR register bits definitions.*/

+/**

+ * @name    RCC_CFGR register bits definitions

+ * @{

+ */

 #define STM32_SW_HSI            (0 << 0)    /**< SYSCLK source is HSI.      */

 #define STM32_SW_HSE            (1 << 0)    /**< SYSCLK source is HSE.      */

 #define STM32_SW_PLL            (2 << 0)    /**< SYSCLK source is PLL.      */

@@ -97,15 +112,100 @@
 #define STM32_RTC_LSI           (2 << 8)    /**< LSI used as RTC clock.     */

 #define STM32_RTC_HSE           (3 << 8)    /**< HSE divided by 128 used as

                                                  RTC clock.                 */

+/** @} */

 

-/* RCC_CFGR2 register bits definitions.*/

+/**

+ * @name    RCC_CFGR2 register bits definitions

+ * @{

+ */

 #define STM32_PREDIV1SRC_HSE    (0 << 16)   /**< PREDIV1 source is HSE.     */

 #define STM32_PREDIV1SRC_PLL2   (1 << 16)   /**< PREDIV1 source is PLL2.    */

+/** @} */

+

+/*===========================================================================*/

+/* Platform capabilities.                                                    */

+/*===========================================================================*/

+

+/**

+ * @name    STM32F105/F107 CL capabilities

+ * @{

+ */

+#define STM32_HAS_ADC1          TRUE

+#define STM32_HAS_ADC2          TRUE

+#define STM32_HAS_ADC3          FALSE

+

+#define STM32_HAS_CAN1          TRUE

+#define STM32_HAS_CAN2          TRUE

+

+#define STM32_HAS_DAC           TRUE

+

+#define STM32_HAS_DMA1          TRUE

+#define STM32_HAS_DMA2          TRUE

+

+#define STM32_HAS_ETH           TRUE

+

+#define STM32_EXTI_NUM_CHANNELS 20

+

+#define STM32_HAS_GPIOA         TRUE

+#define STM32_HAS_GPIOB         TRUE

+#define STM32_HAS_GPIOC         TRUE

+#define STM32_HAS_GPIOD         TRUE

+#define STM32_HAS_GPIOE         TRUE

+#define STM32_HAS_GPIOF         FALSE

+#define STM32_HAS_GPIOG         FALSE

+#define STM32_HAS_GPIOH         FALSE

+#define STM32_HAS_GPIOI         FALSE

+

+#define STM32_HAS_I2C1          TRUE

+#define STM32_HAS_I2C2          TRUE

+#define STM32_HAS_I2C3          FALSE

+

+#define STM32_HAS_RTC           TRUE

+

+#define STM32_HAS_SDIO          FALSE

+

+#define STM32_HAS_SPI1          TRUE

+#define STM32_HAS_SPI2          TRUE

+#define STM32_HAS_SPI3          TRUE

+

+#define STM32_HAS_TIM1          TRUE

+#define STM32_HAS_TIM2          TRUE

+#define STM32_HAS_TIM3          TRUE

+#define STM32_HAS_TIM4          TRUE

+#define STM32_HAS_TIM5          TRUE

+#define STM32_HAS_TIM6          TRUE

+#define STM32_HAS_TIM7          TRUE

+#define STM32_HAS_TIM8          FALSE

+#define STM32_HAS_TIM9          FALSE

+#define STM32_HAS_TIM10         FALSE

+#define STM32_HAS_TIM11         FALSE

+#define STM32_HAS_TIM12         FALSE

+#define STM32_HAS_TIM13         FALSE

+#define STM32_HAS_TIM14         FALSE

+#define STM32_HAS_TIM15         FALSE

+#define STM32_HAS_TIM16         FALSE

+#define STM32_HAS_TIM17         FALSE

+

+#define STM32_HAS_USART1        TRUE

+#define STM32_HAS_USART2        TRUE

+#define STM32_HAS_USART3        TRUE

+#define STM32_HAS_UART4         TRUE

+#define STM32_HAS_UART5         TRUE

+#define STM32_HAS_USART6        FALSE

+

+#define STM32_HAS_USB           FALSE

+#define STM32_HAS_OTG1          TRUE

+#define STM32_HAS_OTG2          FALSE

+/** @} */

 

 /*===========================================================================*/

 /* Platform specific friendly IRQ names.                                     */

 /*===========================================================================*/

 

+/**

+ * @name  IRQ VECTOR names

+ * @{

+ */

 #define WWDG_IRQHandler         Vector40    /**< Window Watchdog.           */

 #define PVD_IRQHandler          Vector44    /**< PVD through EXTI Line

                                                  detect.                    */

@@ -172,7 +272,8 @@
 #define CAN2_RX1_IRQHandler     Vector144   /**< CAN2 RX1.                  */

 #define CAN2_SCE_IRQHandler     Vector148   /**< CAN2 SCE.                  */

 #define OTG_FS_IRQHandler       Vector14C   /**< USB OTG FS.                */

-                                   

+/** @} */

+

 /*===========================================================================*/

 /* Driver pre-compile time settings.                                         */

 /*===========================================================================*/