STM32 support enhancements, some other fixes.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4313 35acf78f-673a-0410-8e92-d51de3d6d3f4

5 files changed, 601 insertions, 1 deletions

diff --git a/os/hal/platforms/STM32F1xx/ext_lld_isr.c b/os/hal/platforms/STM32F1xx/ext_lld_isr.c
new file mode 100644
index 000000000..dc9d0f434
--- /dev/null
+++ b/os/hal/platforms/STM32F1xx/ext_lld_isr.c
@@ -0,0 +1,342 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

+                 2011,2012 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file    STM32F1xx/ext_lld_isr.c

+ * @brief   STM32F1xx EXT subsystem low level driver ISR code.

+ *

+ * @addtogroup EXT

+ * @{

+ */

+

+#include "ch.h"

+#include "hal.h"

+

+#if HAL_USE_EXT || defined(__DOXYGEN__)

+

+#include "ext_lld_isr.h"

+

+/*===========================================================================*/

+/* Driver local definitions.                                                 */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver exported variables.                                                */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver local variables.                                                   */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver local functions.                                                   */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver interrupt handlers.                                                */

+/*===========================================================================*/

+

+/**

+ * @brief   EXTI[0] interrupt handler.

+ *

+ * @isr

+ */

+CH_IRQ_HANDLER(EXTI0_IRQHandler) {

+

+  CH_IRQ_PROLOGUE();

+

+  EXTI->PR = (1 << 0);

+  EXTD1.config->channels[0].cb(&EXTD1, 0);

+

+  CH_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[1] interrupt handler.

+ *

+ * @isr

+ */

+CH_IRQ_HANDLER(EXTI1_IRQHandler) {

+

+  CH_IRQ_PROLOGUE();

+

+  EXTI->PR = (1 << 1);

+  EXTD1.config->channels[1].cb(&EXTD1, 1);

+

+  CH_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[2] interrupt handler.

+ *

+ * @isr

+ */

+CH_IRQ_HANDLER(EXTI2_IRQHandler) {

+

+  CH_IRQ_PROLOGUE();

+

+  EXTI->PR = (1 << 2);

+  EXTD1.config->channels[2].cb(&EXTD1, 2);

+

+  CH_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[3] interrupt handler.

+ *

+ * @isr

+ */

+CH_IRQ_HANDLER(EXTI3_IRQHandler) {

+

+  CH_IRQ_PROLOGUE();

+

+  EXTI->PR = (1 << 3);

+  EXTD1.config->channels[3].cb(&EXTD1, 3);

+

+  CH_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[4] interrupt handler.

+ *

+ * @isr

+ */

+CH_IRQ_HANDLER(EXTI4_IRQHandler) {

+

+  CH_IRQ_PROLOGUE();

+

+  EXTI->PR = (1 << 4);

+  EXTD1.config->channels[4].cb(&EXTD1, 4);

+

+  CH_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[5]...EXTI[9] interrupt handler.

+ *

+ * @isr

+ */

+CH_IRQ_HANDLER(EXTI9_5_IRQHandler) {

+  uint32_t pr;

+

+  CH_IRQ_PROLOGUE();

+

+  pr = EXTI->PR & ((1 << 5) | (1 << 6) | (1 << 7) | (1 << 8) | (1 << 9));

+  EXTI->PR = pr;

+  if (pr & (1 << 5))

+    EXTD1.config->channels[5].cb(&EXTD1, 5);

+  if (pr & (1 << 6))

+    EXTD1.config->channels[6].cb(&EXTD1, 6);

+  if (pr & (1 << 7))

+    EXTD1.config->channels[7].cb(&EXTD1, 7);

+  if (pr & (1 << 8))

+    EXTD1.config->channels[8].cb(&EXTD1, 8);

+  if (pr & (1 << 9))

+    EXTD1.config->channels[9].cb(&EXTD1, 9);

+

+  CH_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[10]...EXTI[15] interrupt handler.

+ *

+ * @isr

+ */

+CH_IRQ_HANDLER(EXTI15_10_IRQHandler) {

+  uint32_t pr;

+

+  CH_IRQ_PROLOGUE();

+

+  pr = EXTI->PR & ((1 << 10) | (1 << 11) | (1 << 12) | (1 << 13) | (1 << 14) |

+                   (1 << 15));

+  EXTI->PR = pr;

+  if (pr & (1 << 10))

+    EXTD1.config->channels[10].cb(&EXTD1, 10);

+  if (pr & (1 << 11))

+    EXTD1.config->channels[11].cb(&EXTD1, 11);

+  if (pr & (1 << 12))

+    EXTD1.config->channels[12].cb(&EXTD1, 12);

+  if (pr & (1 << 13))

+    EXTD1.config->channels[13].cb(&EXTD1, 13);

+  if (pr & (1 << 14))

+    EXTD1.config->channels[14].cb(&EXTD1, 14);

+  if (pr & (1 << 15))

+    EXTD1.config->channels[15].cb(&EXTD1, 15);

+

+  CH_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[16] interrupt handler (PVD).

+ *

+ * @isr

+ */

+CH_IRQ_HANDLER(PVD_IRQHandler) {

+

+  CH_IRQ_PROLOGUE();

+

+  EXTI->PR = (1 << 16);

+  EXTD1.config->channels[16].cb(&EXTD1, 16);

+

+  CH_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[17] interrupt handler (RTC).

+ *

+ * @isr

+ */

+CH_IRQ_HANDLER(RTCAlarm_IRQHandler) {

+

+  CH_IRQ_PROLOGUE();

+

+  EXTI->PR = (1 << 17);

+  EXTD1.config->channels[17].cb(&EXTD1, 17);

+

+  CH_IRQ_EPILOGUE();

+}

+

+#if defined(STM32F10X_CL)

+/**

+ * @brief   EXTI[18] interrupt handler (OTG_FS_WKUP).

+ *

+ * @isr

+ */

+CH_IRQ_HANDLER(OTG_FS_WKUP_IRQHandler) {

+

+  CH_IRQ_PROLOGUE();

+

+  EXTI->PR = (1 << 18);

+  EXTD1.config->channels[18].cb(&EXTD1, 18);

+

+  CH_IRQ_EPILOGUE();

+}

+

+/**

+ * @brief   EXTI[19] interrupt handler (ETH_WKUP).

+ *

+ * @isr

+ */

+CH_IRQ_HANDLER(ETH_WKUP_IRQHandler) {

+

+  CH_IRQ_PROLOGUE();

+

+  EXTI->PR = (1 << 19);

+  EXTD1.config->channels[19].cb(&EXTD1, 19);

+

+  CH_IRQ_EPILOGUE();

+}

+#elif defined(STM32F10X_LD_VL) || defined(STM32F10X_MD_VL) ||               \

+      defined(STM32F10X_HD_VL)

+

+#else /* Other STM32F1xx devices.*/

+/**

+ * @brief   EXTI[18] interrupt handler (USB_FS_WKUP).

+ *

+ * @isr

+ */

+CH_IRQ_HANDLER(USB_FS_WKUP_IRQHandler) {

+

+  CH_IRQ_PROLOGUE();

+

+  EXTI->PR = (1 << 18);

+  EXTD1.config->channels[18].cb(&EXTD1, 18);

+

+  CH_IRQ_EPILOGUE();

+}

+#endif

+

+/*===========================================================================*/

+/* Driver exported functions.                                                */

+/*===========================================================================*/

+

+/**

+ * @brief   Enables EXTI IRQ sources.

+ *

+ * @notapi

+ */

+void ext_lld_exti_irq_enable(void) {

+

+  nvicEnableVector(EXTI0_IRQn,

+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI0_IRQ_PRIORITY));

+  nvicEnableVector(EXTI1_IRQn,

+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI1_IRQ_PRIORITY));

+  nvicEnableVector(EXTI2_IRQn,

+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI2_IRQ_PRIORITY));

+  nvicEnableVector(EXTI3_IRQn,

+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI3_IRQ_PRIORITY));

+  nvicEnableVector(EXTI4_IRQn,

+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI4_IRQ_PRIORITY));

+  nvicEnableVector(EXTI9_5_IRQn,

+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI5_9_IRQ_PRIORITY));

+  nvicEnableVector(EXTI15_10_IRQn,

+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI10_15_IRQ_PRIORITY));

+  nvicEnableVector(PVD_IRQn,

+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI16_IRQ_PRIORITY));

+  nvicEnableVector(RTC_Alarm_IRQn,

+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI17_IRQ_PRIORITY));

+#if defined(STM32F10X_CL)

+  /* EXTI vectors specific to STM32F1xx Connectivity Line.*/

+  nvicEnableVector(OTG_FS_WKUP_IRQn,

+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI18_IRQ_PRIORITY));

+  nvicEnableVector(ETH_WKUP_IRQn,

+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI19_IRQ_PRIORITY));

+#elif defined(STM32F10X_LD_VL) || defined(STM32F10X_MD_VL) ||               \

+      defined(STM32F10X_HD_VL)

+  /* EXTI vectors specific to STM32F1xx Value Line.*/

+#else

+  /* EXTI vectors specific to STM32F1xx except Connectivity Line.*/

+  nvicEnableVector(USB_FS_WKUP_IRQn,

+                   CORTEX_PRIORITY_MASK(STM32_EXT_EXTI18_IRQ_PRIORITY));

+#endif

+}

+

+/**

+ * @brief   Disables EXTI IRQ sources.

+ *

+ * @notapi

+ */

+void ext_lld_exti_irq_disable(void) {

+

+  nvicDisableVector(EXTI0_IRQn);

+  nvicDisableVector(EXTI1_IRQn);

+  nvicDisableVector(EXTI2_IRQn);

+  nvicDisableVector(EXTI3_IRQn);

+  nvicDisableVector(EXTI4_IRQn);

+  nvicDisableVector(EXTI9_5_IRQn);

+  nvicDisableVector(EXTI15_10_IRQn);

+  nvicDisableVector(PVD_IRQn);

+  nvicDisableVector(RTC_Alarm_IRQn);

+#if defined(STM32F10X_CL)

+  /* EXTI vectors specific to STM32F1xx Connectivity Line.*/

+  nvicDisableVector(OTG_FS_WKUP_IRQn);

+  nvicDisableVector(ETH_WKUP_IRQn);

+#elif defined(STM32F10X_LD_VL) || defined(STM32F10X_MD_VL) ||               \

+    defined(STM32F10X_HD_VL)

+  /* EXTI vectors specific to STM32F1xx Value Line.*/

+#else

+  /* EXTI vectors specific to STM32F1xx except Connectivity Line.*/

+  nvicDisableVector(USB_FS_WKUP_IRQn);

+#endif

+}

+

+#endif /* HAL_USE_EXT */

+

+/** @} */

diff --git a/os/hal/platforms/STM32F1xx/ext_lld_isr.h b/os/hal/platforms/STM32F1xx/ext_lld_isr.h
new file mode 100644
index 000000000..74ea5e0ba
--- /dev/null
+++ b/os/hal/platforms/STM32F1xx/ext_lld_isr.h
@@ -0,0 +1,153 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

+                 2011,2012 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file    STM32F1xx/ext_lld_isr.h

+ * @brief   STM32F1xx EXT subsystem low level driver ISR header.

+ *

+ * @addtogroup EXT

+ * @{

+ */

+

+#ifndef _EXT_LLD_ISR_H_

+#define _EXT_LLD_ISR_H_

+

+#if HAL_USE_EXT || defined(__DOXYGEN__)

+

+/*===========================================================================*/

+/* Driver constants.                                                         */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver pre-compile time settings.                                         */

+/*===========================================================================*/

+

+/**

+ * @name    Configuration options

+ * @{

+ */

+/**

+ * @brief   EXTI0 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI0_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI0_IRQ_PRIORITY        6

+#endif

+

+/**

+ * @brief   EXTI1 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI1_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI1_IRQ_PRIORITY        6

+#endif

+

+/**

+ * @brief   EXTI2 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI2_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI2_IRQ_PRIORITY        6

+#endif

+

+/**

+ * @brief   EXTI3 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI3_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI3_IRQ_PRIORITY        6

+#endif

+

+/**

+ * @brief   EXTI4 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI4_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI4_IRQ_PRIORITY        6

+#endif

+

+/**

+ * @brief   EXTI9..5 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI5_9_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6

+#endif

+

+/**

+ * @brief   EXTI15..10 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI10_15_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6

+#endif

+

+/**

+ * @brief   EXTI16 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI16_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI16_IRQ_PRIORITY       6

+#endif

+

+/**

+ * @brief   EXTI17 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI17_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI17_IRQ_PRIORITY       6

+#endif

+

+/**

+ * @brief   EXTI18 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI18_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI18_IRQ_PRIORITY       6

+#endif

+

+/**

+ * @brief   EXTI19 interrupt priority level setting.

+ */

+#if !defined(STM32_EXT_EXTI19_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_EXT_EXTI19_IRQ_PRIORITY       6

+#endif

+/** @} */

+

+/*===========================================================================*/

+/* Derived constants and error checks.                                       */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver data structures and types.                                         */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver macros.                                                            */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* External declarations.                                                    */

+/*===========================================================================*/

+

+#ifdef __cplusplus

+extern "C" {

+#endif

+  void ext_lld_exti_irq_enable(void);

+  void ext_lld_exti_irq_disable(void);

+#ifdef __cplusplus

+}

+#endif

+

+#endif /* HAL_USE_EXT */

+

+#endif /* _EXT_LLD_ISR_H_ */

+

+/** @} */

diff --git a/os/hal/platforms/STM32F1xx/hal_lld.h b/os/hal/platforms/STM32F1xx/hal_lld.h
index 466d389b8..4475c0655 100644
--- a/os/hal/platforms/STM32F1xx/hal_lld.h
+++ b/os/hal/platforms/STM32F1xx/hal_lld.h
@@ -240,7 +240,8 @@ typedef uint32_t halrtcnt_t;
 /* External declarations.                                                    */

 /*===========================================================================*/

 

-/* STM32 DMA and RCC helpers.*/

+/* STM32 ISR, DMA and RCC helpers.*/

+#include "stm32_isr.h"

 #include "stm32_dma.h"

 #include "stm32_rcc.h"

 

diff --git a/os/hal/platforms/STM32F1xx/platform.mk b/os/hal/platforms/STM32F1xx/platform.mk
index 668c50a32..bc2711236 100644
--- a/os/hal/platforms/STM32F1xx/platform.mk
+++ b/os/hal/platforms/STM32F1xx/platform.mk
@@ -2,6 +2,7 @@
 PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/STM32F1xx/stm32_dma.c \

               ${CHIBIOS}/os/hal/platforms/STM32F1xx/hal_lld.c \

               ${CHIBIOS}/os/hal/platforms/STM32F1xx/adc_lld.c \

+              ${CHIBIOS}/os/hal/platforms/STM32F1xx/ext_lld_isr.c \

               ${CHIBIOS}/os/hal/platforms/STM32/can_lld.c \

               ${CHIBIOS}/os/hal/platforms/STM32/ext_lld.c \

               ${CHIBIOS}/os/hal/platforms/STM32/gpt_lld.c \

diff --git a/os/hal/platforms/STM32F1xx/stm32_isr.h b/os/hal/platforms/STM32F1xx/stm32_isr.h
new file mode 100644
index 000000000..18de3210e
--- /dev/null
+++ b/os/hal/platforms/STM32F1xx/stm32_isr.h
@@ -0,0 +1,103 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

+                 2011,2012 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file    STM3F1xx/stm32_isr.h

+ * @brief   ISR remapper driver header.

+ *

+ * @addtogroup STM32F1xx_ISR

+ * @{

+ */

+

+#ifndef _STM32_ISR_H_

+#define _STM32_ISR_H_

+

+/*===========================================================================*/

+/* Driver constants.                                                         */

+/*===========================================================================*/

+

+/**

+ * @name    ISR names and numbers remapping

+ * @{

+ */

+#if defined(STM32F10X_XL)

+#define STM32_TIM1_UP_HANDLER       TIM1_UP_IRQHandler

+#elif defined(STM32F10X_LD_VL) || defined(STM32F10X_MD_VL) ||               \

+      defined(STM32F10X_HD_VL)

+#define STM32_TIM1_UP_HANDLER       TIM1_UP_IRQHandler

+#else

+#define STM32_TIM1_UP_HANDLER       TIM1_UP_IRQHandler

+#endif

+#define STM32_TIM1_CC_HANDLER       TIM1_CC_IRQHandler

+#define STM32_TIM2_HANDLER          TIM2_IRQHandler

+#define STM32_TIM3_HANDLER          TIM3_IRQHandler

+#define STM32_TIM4_HANDLER          TIM4_IRQHandler

+#define STM32_TIM5_HANDLER          TIM5_IRQHandler

+#ifdef STM32F10X_XL

+#define STM32_TIM8_UP_HANDLER       TIM8_UP_IRQHandler

+#else

+#define STM32_TIM8_UP_HANDLER       TIM8_UP_IRQHandler

+#endif

+#define STM32_TIM8_CC_HANDLER       TIM8_CC_IRQHandler

+

+#if defined(STM32F10X_XL)

+#define STM32_TIM1_UP_NUMBER        TIM1_UP_TIM10_IRQn

+#elif defined(STM32F10X_LD_VL) || defined(STM32F10X_MD_VL) ||               \

+      defined(STM32F10X_HD_VL)

+#define STM32_TIM1_UP_NUMBER        TIM1_UP_TIM16_IRQn

+#else

+#define STM32_TIM1_UP_NUMBER        TIM1_UP_IRQn

+#endif

+#define STM32_TIM1_CC_NUMBER        TIM1_CC_IRQn

+#define STM32_TIM2_NUMBER           TIM2_IRQn

+#define STM32_TIM3_NUMBER           TIM3_IRQn

+#define STM32_TIM4_NUMBER           TIM4_IRQn

+#define STM32_TIM5_NUMBER           TIM5_IRQn

+#ifdef STM32F10X_XL

+#define STM32_TIM8_UP_NUMBER        TIM8_UP_TIM13_IRQn

+#else

+#define STM32_TIM8_UP_NUMBER        TIM8_UP_IRQn

+#endif

+#define STM32_TIM8_CC_NUMBER        TIM8_CC_IRQn

+/** @} */

+

+/*===========================================================================*/

+/* Driver pre-compile time settings.                                         */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Derived constants and error checks.                                       */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver data structures and types.                                         */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* Driver macros.                                                            */

+/*===========================================================================*/

+

+/*===========================================================================*/

+/* External declarations.                                                    */

+/*===========================================================================*/

+

+#endif /* _STM32_ISR_H_ */

+

+/** @} */