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authorbarthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-06-21 20:17:14 +0000
committerbarthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-06-21 20:17:14 +0000
commit70179f12dd387a82493d13fd51d5aab7e4e55674 (patch)
treeead37a5e698acfac0a69cb3247351561bc38efe0 /os/hal/platforms/STM32
parentb54133ab1beba9d2923450d1d5f1b2c73dc2afa3 (diff)
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I2C. Slave config structure now have const qualifier. Moset of fields moved to the driver structure. May be broken events subsystem in driver.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3067 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32')
-rw-r--r--os/hal/platforms/STM32/i2c_lld.c36
-rw-r--r--os/hal/platforms/STM32/i2c_lld.h17
2 files changed, 34 insertions, 19 deletions
diff --git a/os/hal/platforms/STM32/i2c_lld.c b/os/hal/platforms/STM32/i2c_lld.c
index be7707796..729e14eb3 100644
--- a/os/hal/platforms/STM32/i2c_lld.c
+++ b/os/hal/platforms/STM32/i2c_lld.c
@@ -106,7 +106,7 @@ static void i2c_serve_event_interrupt(I2CDriver *i2cp) {
/* Disable ITEVT In order to not have again a BTF IT */
dp->CR2 &= (uint16_t)~I2C_CR2_ITEVTEN;
/* send restart and begin reading operations */
- i2c_lld_master_receive(i2cp, i2cp->rxbytes);
+ i2c_lld_master_receive(i2cp, i2cp->slave_addr, i2cp->rxbytes);
}
break;
@@ -514,9 +514,16 @@ void i2c_lld_stop(I2CDriver *i2cp) {
* @brief Transmits data ever the I2C bus as master.
*
* @param[in] i2cp pointer to the @p I2CDriver object
+ * @param[in] slave_addr Slave device address. Bits 0-9 contain slave
+ * device address. Bit 15 must be set to 1 if 10-bit
+ * addressing modes used. Otherwise keep it cleared.
+ * Bits 10-14 unused.
+ * @param[in] txbytes number of bytes to be transmited
+ * @param[in] rxbytes number of bytes to be received
*
*/
-void i2c_lld_master_transmit(I2CDriver *i2cp, size_t txbytes, size_t rxbytes) {
+void i2c_lld_master_transmit(I2CDriver *i2cp, uint16_t slave_addr, size_t txbytes, size_t rxbytes) {
+ i2cp->slave_addr = slave_addr;
i2cp->txbytes = txbytes;
i2cp->rxbytes = rxbytes;
@@ -524,17 +531,17 @@ void i2c_lld_master_transmit(I2CDriver *i2cp, size_t txbytes, size_t rxbytes) {
i2cp->id_i2c->CR2 |= (I2C_CR2_ITERREN|I2C_CR2_ITEVTEN|I2C_CR2_ITBUFEN);
i2cp->id_i2c->CR1 &= ~I2C_CR1_POS;
- if(i2cp->id_slave_config->slave_addr & 0x8000){// 10-bit mode used
+ if(slave_addr & 0x8000){// 10-bit mode used
// add the two msb of 10-bit address to the header
- i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr >>7) & 0x0006);
+ i2cp->slave_addr1 = ((slave_addr >>7) & 0x0006);
// add the header bits with LSB = 0 -> write
i2cp->slave_addr1 |= 0xF0;
// the remaining 8 bit of 10-bit address
- i2cp->slave_addr2 = i2cp->id_slave_config->slave_addr & 0x00FF;
+ i2cp->slave_addr2 = slave_addr & 0x00FF;
}
else{
// LSB = 0 -> write
- i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr <<1) & 0x00FE);
+ i2cp->slave_addr1 = ((slave_addr <<1) & 0x00FE);
}
i2cp->flags = 0;
@@ -556,9 +563,16 @@ void i2c_lld_master_transmit(I2CDriver *i2cp, size_t txbytes, size_t rxbytes) {
* @brief Receives data from the I2C bus.
*
* @param[in] i2cp pointer to the @p I2CDriver object
+ * @param[in] slave_addr Slave device address. Bits 0-9 contain slave
+ * device address. Bit 15 must be set to 1 if 10-bit
+ * addressing modes used. Otherwise keep it cleared.
+ * Bits 10-14 unused.
+ * @param[in] txbytes number of bytes to be transmited
+ * @param[in] rxbytes number of bytes to be received
*
*/
-void i2c_lld_master_receive(I2CDriver *i2cp, size_t rxbytes){
+void i2c_lld_master_receive(I2CDriver *i2cp, uint16_t slave_addr, size_t rxbytes){
+ i2cp->slave_addr = slave_addr;
i2cp->rxbytes = rxbytes;
// enable ERR, EVT & BUF ITs
@@ -566,17 +580,17 @@ void i2c_lld_master_receive(I2CDriver *i2cp, size_t rxbytes){
i2cp->id_i2c->CR1 |= I2C_CR1_ACK; // acknowledge returned
i2cp->id_i2c->CR1 &= ~I2C_CR1_POS;
- if(i2cp->id_slave_config->slave_addr & 0x8000){// 10-bit mode used
+ if(slave_addr & 0x8000){// 10-bit mode used
// add the two msb of 10-bit address to the header
- i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr >>7) & 0x0006);
+ i2cp->slave_addr1 = ((slave_addr >>7) & 0x0006);
// add the header bits (the LSB -> 1 will be add to second
i2cp->slave_addr1 |= 0xF0;
// the remaining 8 bit of 10-bit address
- i2cp->slave_addr2 = i2cp->id_slave_config->slave_addr & 0x00FF;
+ i2cp->slave_addr2 = slave_addr & 0x00FF;
}
else{
// LSB = 1 -> receive
- i2cp->slave_addr1 = ((i2cp->id_slave_config->slave_addr <<1) | 0x01);
+ i2cp->slave_addr1 = ((slave_addr <<1) | 0x01);
}
i2cp->flags = I2C_FLG_MASTER_RECEIVER;
diff --git a/os/hal/platforms/STM32/i2c_lld.h b/os/hal/platforms/STM32/i2c_lld.h
index 83b4f7812..c3df51b07 100644
--- a/os/hal/platforms/STM32/i2c_lld.h
+++ b/os/hal/platforms/STM32/i2c_lld.h
@@ -161,17 +161,18 @@ struct I2CDriver{
/**
* @brief Current slave configuration data.
*/
- I2CSlaveConfig *id_slave_config;
+ const I2CSlaveConfig *id_slave_config;
- uint8_t slave_addr1; /*!< 7-bit address of the slave with r\w bit.*/
- uint8_t slave_addr2; /*!< used in 10-bit address mode. */
-
- size_t rxbytes;
- size_t txbytes;
+ size_t txbytes; /*!< Number of bytes to transmitted. */
+ size_t rxbytes; /*!< Number of bytes to received. */
i2cflags_t errors; /*!< Error flags.*/
i2cflags_t flags; /*!< State flags.*/
+ uint16_t slave_addr; /*!< Current slave address. */
+ uint8_t slave_addr1; /*!< 7-bit address of the slave with r\w bit.*/
+ uint8_t slave_addr2; /*!< Used in 10-bit address mode. */
+
/*********** End of the mandatory fields. **********************************/
/**
@@ -222,8 +223,8 @@ void i2c_lld_set_opmode(I2CDriver *i2cp);
void i2c_lld_set_own_address(I2CDriver *i2cp);
void i2c_lld_start(I2CDriver *i2cp);
void i2c_lld_stop(I2CDriver *i2cp);
-void i2c_lld_master_transmit(I2CDriver *i2cp, size_t txbytes, size_t rxbytes);
-void i2c_lld_master_receive(I2CDriver *i2cp, size_t rxbytes);
+void i2c_lld_master_transmit(I2CDriver *i2cp, uint16_t slave_addr, size_t txbytes, size_t rxbytes);
+void i2c_lld_master_receive(I2CDriver *i2cp, uint16_t slave_addr, size_t rxbytes);
#ifdef __cplusplus
}