Documentation improvements, fixed a small error in the STM32 serial driver.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2234 35acf78f-673a-0410-8e92-d51de3d6d3f4

11 files changed, 223 insertions, 22 deletions

diff --git a/os/hal/platforms/STM32/adc_lld.c b/os/hal/platforms/STM32/adc_lld.c
index fa748aa84..7c7657a5c 100644
--- a/os/hal/platforms/STM32/adc_lld.c
+++ b/os/hal/platforms/STM32/adc_lld.c
@@ -54,6 +54,8 @@ ADCDriver ADCD1;
 #if STM32_ADC_USE_ADC1 || defined(__DOXYGEN__)

 /**

  * @brief   ADC1 DMA interrupt handler (channel 1).

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(DMA1_Ch1_IRQHandler) {

   uint32_t isr;

@@ -110,6 +112,8 @@ CH_IRQ_HANDLER(DMA1_Ch1_IRQHandler) {
 

 /**

  * @brief   Low level ADC driver initialization.

+ *

+ * @notapi

  */

 void adc_lld_init(void) {

 

@@ -151,6 +155,8 @@ void adc_lld_init(void) {
  * @brief   Configures and activates the ADC peripheral.

  *

  * @param[in] adcp      pointer to the @p ADCDriver object

+ *

+ * @notapi

  */

 void adc_lld_start(ADCDriver *adcp) {

 

@@ -177,6 +183,8 @@ void adc_lld_start(ADCDriver *adcp) {
  * @brief   Deactivates the ADC peripheral.

  *

  * @param[in] adcp      pointer to the @p ADCDriver object

+ *

+ * @notapi

  */

 void adc_lld_stop(ADCDriver *adcp) {

 

@@ -198,6 +206,8 @@ void adc_lld_stop(ADCDriver *adcp) {
  * @brief   Starts an ADC conversion.

  *

  * @param[in] adcp      pointer to the @p ADCDriver object

+ *

+ * @notapi

  */

 void adc_lld_start_conversion(ADCDriver *adcp) {

   uint32_t ccr, n;

@@ -234,6 +244,8 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
  * @brief   Stops an ongoing conversion.

  *

  * @param[in] adcp      pointer to the @p ADCDriver object

+ *

+ * @notapi

  */

 void adc_lld_stop_conversion(ADCDriver *adcp) {

 

diff --git a/os/hal/platforms/STM32/can_lld.c b/os/hal/platforms/STM32/can_lld.c
index 7b390bb7e..526ecb98e 100644
--- a/os/hal/platforms/STM32/can_lld.c
+++ b/os/hal/platforms/STM32/can_lld.c
@@ -51,8 +51,10 @@ CANDriver CAND1;
 /* Driver interrupt handlers.                                                */

 /*===========================================================================*/

 

-/*

- * CAN1 TX interrupt handler.

+/**

+ * @brief   CAN1 TX interrupt handler.

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(CAN1_TX_IRQHandler) {

 

@@ -70,7 +72,9 @@ CH_IRQ_HANDLER(CAN1_TX_IRQHandler) {
 }

 

 /*

- * CAN1 RX0 interrupt handler.

+ * @brief   CAN1 RX0 interrupt handler.

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(CAN1_RX0_IRQHandler) {

   uint32_t rf0r;

@@ -99,8 +103,10 @@ CH_IRQ_HANDLER(CAN1_RX0_IRQHandler) {
   CH_IRQ_EPILOGUE();

 }

 

-/*

- * CAN1 RX1 interrupt handler.

+/**

+ * @brief   CAN1 RX1 interrupt handler.

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(CAN1_RX1_IRQHandler) {

 

@@ -111,8 +117,10 @@ CH_IRQ_HANDLER(CAN1_RX1_IRQHandler) {
   CH_IRQ_EPILOGUE();

 }

 

-/*

- * CAN1 SCE interrupt handler.

+/**

+ * @brief   CAN1 SCE interrupt handler.

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(CAN1_SCE_IRQHandler) {

   uint32_t msr;

@@ -151,6 +159,8 @@ CH_IRQ_HANDLER(CAN1_SCE_IRQHandler) {
 

 /**

  * @brief   Low level CAN driver initialization.

+ *

+ * @notapi

  */

 void can_lld_init(void) {

 

@@ -169,6 +179,8 @@ void can_lld_init(void) {
  * @brief   Configures and activates the CAN peripheral.

  *

  * @param[in] canp      pointer to the @p CANDriver object

+ *

+ * @notapi

  */

 void can_lld_start(CANDriver *canp) {

 

@@ -253,6 +265,8 @@ void can_lld_start(CANDriver *canp) {
  * @brief   Deactivates the CAN peripheral.

  *

  * @param[in] canp      pointer to the @p CANDriver object

+ *

+ * @notapi

  */

 void can_lld_stop(CANDriver *canp) {

 

@@ -280,6 +294,8 @@ void can_lld_stop(CANDriver *canp) {
  * @return The queue space availability.

  * @retval FALSE        no space in the transmit queue.

  * @retval TRUE         transmit slot available.

+ *

+ * @notapi

  */

 bool_t can_lld_can_transmit(CANDriver *canp) {

 

@@ -291,6 +307,8 @@ bool_t can_lld_can_transmit(CANDriver *canp) {
  *

  * @param[in] canp      pointer to the @p CANDriver object

  * @param[in] ctfp      pointer to the CAN frame to be transmitted

+ *

+ * @notapi

  */

 void can_lld_transmit(CANDriver *canp, const CANTxFrame *ctfp) {

   uint32_t tir;

@@ -319,6 +337,8 @@ void can_lld_transmit(CANDriver *canp, const CANTxFrame *ctfp) {
  * @return The queue space availability.

  * @retval FALSE        no space in the transmit queue.

  * @retval TRUE         transmit slot available.

+ *

+ * @notapi

  */

 bool_t can_lld_can_receive(CANDriver *canp) {

 

@@ -330,6 +350,8 @@ bool_t can_lld_can_receive(CANDriver *canp) {
  *

  * @param[in] canp      pointer to the @p CANDriver object

  * @param[out] crfp     pointer to the buffer where the CAN frame is copied

+ *

+ * @notapi

  */

 void can_lld_receive(CANDriver *canp, CANRxFrame *crfp) {

   uint32_t r;

@@ -363,6 +385,8 @@ void can_lld_receive(CANDriver *canp, CANRxFrame *crfp) {
  * @brief   Enters the sleep mode.

  *

  * @param[in] canp      pointer to the @p CANDriver object

+ *

+ * @notapi

  */

 void can_lld_sleep(CANDriver *canp) {

 

@@ -373,6 +397,8 @@ void can_lld_sleep(CANDriver *canp) {
  * @brief   Enforces leaving the sleep mode.

  *

  * @param[in] canp      pointer to the @p CANDriver object

+ *

+ * @notapi

  */

 void can_lld_wakeup(CANDriver *canp) {

 

diff --git a/os/hal/platforms/STM32/hal_lld.c b/os/hal/platforms/STM32/hal_lld.c
index c8d7b1335..1b8fc8009 100644
--- a/os/hal/platforms/STM32/hal_lld.c
+++ b/os/hal/platforms/STM32/hal_lld.c
@@ -39,7 +39,7 @@
 /*===========================================================================*/

 

 /**

- * @brief PAL setup.

+ * @brief   PAL setup.

  * @details Digital I/O ports static configuration as defined in @p board.h.

  */

 const PALConfig pal_default_config =

@@ -70,7 +70,9 @@ const PALConfig pal_default_config =
 /*===========================================================================*/

 

 /**

- * @brief Low level HAL driver initialization.

+ * @brief   Low level HAL driver initialization.

+ *

+ * @notapi

  */

 void hal_lld_init(void) {

 

@@ -87,8 +89,11 @@ void hal_lld_init(void) {
 }

 

 /**

- * @brief STM32 clocks and PLL initialization.

- * @note All the involved constants come from the file @p board.h.

+ * @brief   STM32 clocks and PLL initialization.

+ * @note    All the involved constants come from the file @p board.h.

+ * @note    This function must be invoked only after the system reset.

+ *

+ * @special

  */

 #if defined(STM32F10X_LD) || defined(STM32F10X_MD) ||                       \

     defined(STM32F10X_HD) || defined(__DOXYGEN__)

diff --git a/os/hal/platforms/STM32/pal_lld.c b/os/hal/platforms/STM32/pal_lld.c
index 4ddb13359..f16b3abd0 100644
--- a/os/hal/platforms/STM32/pal_lld.c
+++ b/os/hal/platforms/STM32/pal_lld.c
@@ -81,6 +81,8 @@
  * @details Ports A-D(E, F, G) clocks enabled, AFIO clock enabled.

  *

  * @param[in] config    the STM32 ports configuration

+ *

+ * @notapi

  */

 void _pal_lld_init(const PALConfig *config) {

 

@@ -136,6 +138,8 @@ void _pal_lld_init(const PALConfig *config) {
  * @param[in] port      the port identifier

  * @param[in] mask      the group mask

  * @param[in] mode      the mode

+ *

+ * @notapi

  */

 void _pal_lld_setgroupmode(ioportid_t port,

                            ioportmask_t mask,

diff --git a/os/hal/platforms/STM32/pal_lld.h b/os/hal/platforms/STM32/pal_lld.h
index a299bce70..82afc2b2f 100644
--- a/os/hal/platforms/STM32/pal_lld.h
+++ b/os/hal/platforms/STM32/pal_lld.h
@@ -95,7 +95,7 @@ typedef struct {
 

 /**

  * @brief   Whole port mask.

- * @brief   This macro specifies all the valid bits into a port.

+ * @details This macro specifies all the valid bits into a port.

  */

 #define PAL_WHOLE_PORT ((ioportmask_t)0xFFFF)

 

@@ -164,6 +164,8 @@ typedef GPIO_TypeDef * ioportid_t;
 

 /**

  * @brief   GPIO ports subsystem initialization.

+ *

+ * @notapi

  */

 #define pal_lld_init(config) _pal_lld_init(config)

 

@@ -176,6 +178,8 @@ typedef GPIO_TypeDef * ioportid_t;
  *

  * @param[in] port      the port identifier

  * @return              The port bits.

+ *

+ * @notapi

  */

 #define pal_lld_readport(port) ((port)->IDR)

 

@@ -188,6 +192,8 @@ typedef GPIO_TypeDef * ioportid_t;
  *

  * @param[in] port      the port identifier

  * @return              The latched logical states.

+ *

+ * @notapi

  */

 #define pal_lld_readlatch(port) ((port)->ODR)

 

@@ -203,6 +209,8 @@ typedef GPIO_TypeDef * ioportid_t;
  *

  * @param[in] port      the port identifier

  * @param[in] bits      the bits to be written on the specified port

+ *

+ * @notapi

  */

 #define pal_lld_writeport(port, bits) ((port)->ODR = (bits))

 

@@ -218,6 +226,8 @@ typedef GPIO_TypeDef * ioportid_t;
  *

  * @param[in] port      the port identifier

  * @param[in] bits      the bits to be ORed on the specified port

+ *

+ * @notapi

  */

 #define pal_lld_setport(port, bits) ((port)->BSRR = (bits))

 

@@ -233,6 +243,8 @@ typedef GPIO_TypeDef * ioportid_t;
  *

  * @param[in] port      the port identifier

  * @param[in] bits      the bits to be cleared on the specified port

+ *

+ * @notapi

  */

 #define pal_lld_clearport(port, bits) ((port)->BRR = (bits))

 

@@ -251,6 +263,8 @@ typedef GPIO_TypeDef * ioportid_t;
  * @param[in] offset    the group bit offset within the port

  * @param[in] bits      the bits to be written. Values exceeding the group

  *                      width are masked.

+ *

+ * @notapi

  */

 #define pal_lld_writegroup(port, mask, offset, bits) {                      \

   (port)->BSRR = ((~(bits) & (mask)) << (16 + (offset))) |                  \

@@ -270,6 +284,8 @@ typedef GPIO_TypeDef * ioportid_t;
  * @param[in] port      the port identifier

  * @param[in] mask      the group mask

  * @param[in] mode      the mode

+ *

+ * @notapi

  */

 #define pal_lld_setgroupmode(port, mask, mode)                              \

   _pal_lld_setgroupmode(port, mask, mode)

@@ -286,6 +302,8 @@ typedef GPIO_TypeDef * ioportid_t;
  * @param[in] pad       the pad number within the port

  * @param[in] bit       logical value, the value must be @p PAL_LOW or

  *                      @p PAL_HIGH

+ *

+ * @notapi

  */

 #define pal_lld_writepad(port, pad, bit) pal_lld_writegroup(port, 1, pad, bit)

 

diff --git a/os/hal/platforms/STM32/pwm_lld.c b/os/hal/platforms/STM32/pwm_lld.c
index 851cf07c2..eeb1282bd 100644
--- a/os/hal/platforms/STM32/pwm_lld.c
+++ b/os/hal/platforms/STM32/pwm_lld.c
@@ -62,7 +62,7 @@ PWMDriver PWMD3;
  * @brief   PWM4 driver identifier.

  * @note    The driver PWM4 allocates the timer TIM4 when enabled.

  */

-#if defined(USE_STM32_PWM4) || defined(__DOXYGEN__)

+#if defined(STM32_PWM_USE_TIM4) || defined(__DOXYGEN__)

 PWMDriver PWMD4;

 #endif

 

@@ -91,7 +91,8 @@ static void stop_channels(PWMDriver *pwmp) {
   pwmp->pd_tim->CCMR2 = 0;                  /* Channels 3 and 4 frozen.     */

 }

 

-#if STM32_PWM_USE_TIM2 || STM32_PWM_USE_TIM3 || USE_STM32_PWM4 || defined(__DOXYGEN__)

+#if STM32_PWM_USE_TIM2 || STM32_PWM_USE_TIM3 || STM32_PWM_USE_TIM4 ||       \

+    defined(__DOXYGEN__)

 /**

  * @brief   Common TIM2...TIM4 IRQ handler.

  * @note    It is assumed that the various sources are only activated if the

@@ -115,7 +116,7 @@ static void serve_interrupt(PWMDriver *pwmp) {
   if ((sr & TIM_SR_UIF) != 0)

     pwmp->pd_config->pc_callback();

 }

-#endif /* STM32_PWM_USE_TIM2 || STM32_PWM_USE_TIM3 || USE_STM32_PWM4 */

+#endif /* STM32_PWM_USE_TIM2 || STM32_PWM_USE_TIM3 || STM32_PWM_USE_TIM4 */

 

 /*===========================================================================*/

 /* Driver interrupt handlers.                                                */

@@ -127,6 +128,8 @@ static void serve_interrupt(PWMDriver *pwmp) {
  * @note    It is assumed that this interrupt is only activated if the callback

  *          pointer is not equal to @p NULL in order to not perform an extra

  *          check in a potentially critical interrupt handler.

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(TIM1_UP_IRQHandler) {

 

@@ -143,6 +146,8 @@ CH_IRQ_HANDLER(TIM1_UP_IRQHandler) {
  * @note    It is assumed that the various sources are only activated if the

  *          associated callback pointer is not equal to @p NULL in order to not

  *          perform an extra check in a potentially critical interrupt handler.

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(TIM1_CC_IRQHandler) {

   uint16_t sr;

@@ -166,7 +171,9 @@ CH_IRQ_HANDLER(TIM1_CC_IRQHandler) {
 

 #if STM32_PWM_USE_TIM2

 /**

- * @brief TIM2 interrupt handler.

+ * @brief   TIM2 interrupt handler.

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(TIM2_IRQHandler) {

 

@@ -180,7 +187,9 @@ CH_IRQ_HANDLER(TIM2_IRQHandler) {
 

 #if STM32_PWM_USE_TIM3

 /**

- * @brief TIM3 interrupt handler.

+ * @brief   TIM3 interrupt handler.

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(TIM3_IRQHandler) {

 

@@ -192,9 +201,11 @@ CH_IRQ_HANDLER(TIM3_IRQHandler) {
 }

 #endif /* STM32_PWM_USE_TIM3 */

 

-#if USE_STM32_PWM4

+#if STM32_PWM_USE_TIM4

 /**

- * @brief TIM4 interrupt handler.

+ * @brief   TIM4 interrupt handler.

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(TIM4_IRQHandler) {

 

@@ -204,7 +215,7 @@ CH_IRQ_HANDLER(TIM4_IRQHandler) {
 

   CH_IRQ_EPILOGUE();

 }

-#endif /* USE_STM32_PWM4 */

+#endif /* STM32_PWM_USE_TIM4 */

 

 /*===========================================================================*/

 /* Driver exported functions.                                                */

@@ -212,6 +223,8 @@ CH_IRQ_HANDLER(TIM4_IRQHandler) {
 

 /**

  * @brief   Low level PWM driver initialization.

+ *

+ * @notapi

  */

 void pwm_lld_init(void) {

 

@@ -248,7 +261,7 @@ void pwm_lld_init(void) {
   PWMD3.pd_tim = TIM3;

 #endif

 

-#if USE_STM32_PWM4

+#if STM32_PWM_USE_TIM4

   /* TIM2 reset, ensures reset state in order to avoid trouble with JTAGs.*/

   RCC->APB1RSTR = RCC_APB1RSTR_TIM4RST;

   RCC->APB1RSTR = 0;

@@ -264,6 +277,8 @@ void pwm_lld_init(void) {
  * @brief   Configures and activates the PWM peripheral.

  *

  * @param[in] pwmp      pointer to a @p PWMDriver object

+ *

+ * @notapi

  */

 void pwm_lld_start(PWMDriver *pwmp) {

   uint16_t ccer;

@@ -293,7 +308,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
       RCC->APB1ENR |= RCC_APB1ENR_TIM3EN;

     }

 #endif

-#if USE_STM32_PWM4

+#if STM32_PWM_USE_TIM4

     if (&PWMD4 == pwmp) {

       NVICEnableVector(TIM4_IRQn,

                        CORTEX_PRIORITY_MASK(STM32_PWM_PWM4_IRQ_PRIORITY));

@@ -358,6 +373,8 @@ void pwm_lld_start(PWMDriver *pwmp) {
  * @brief   Deactivates the PWM peripheral.

  *

  * @param[in] pwmp      pointer to a @p PWMDriver object

+ *

+ * @notapi

  */

 void pwm_lld_stop(PWMDriver *pwmp) {

   /* If in ready state then disables the PWM clock.*/

@@ -401,6 +418,8 @@ void pwm_lld_stop(PWMDriver *pwmp) {
  * @param[in] pwmp      pointer to a @p PWMDriver object

  * @param[in] channel   PWM channel identifier

  * @param[in] width     PWM pulse width as clock pulses number

+ *

+ * @notapi

  */

 void pwm_lld_enable_channel(PWMDriver *pwmp,

                             pwmchannel_t channel,

@@ -476,6 +495,8 @@ void pwm_lld_enable_channel(PWMDriver *pwmp,
  *

  * @param[in] pwmp      pointer to a @p PWMDriver object

  * @param[in] channel   PWM channel identifier

+ *

+ * @notapi

  */

 void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) {

 

diff --git a/os/hal/platforms/STM32/serial_lld.c b/os/hal/platforms/STM32/serial_lld.c
index f6df553e6..ebae98f97 100644
--- a/os/hal/platforms/STM32/serial_lld.c
+++ b/os/hal/platforms/STM32/serial_lld.c
@@ -222,6 +222,11 @@ static void notify5(void) {
 /*===========================================================================*/

 

 #if STM32_SERIAL_USE_USART1 || defined(__DOXYGEN__)

+/**

+ * @brief   USART1 interrupt handler.

+ *

+ * @isr
+ */

 CH_IRQ_HANDLER(USART1_IRQHandler) {

 

   CH_IRQ_PROLOGUE();

@@ -233,6 +238,11 @@ CH_IRQ_HANDLER(USART1_IRQHandler) {
 #endif

 

 #if STM32_SERIAL_USE_USART2 || defined(__DOXYGEN__)

+/**

+ * @brief   USART2 interrupt handler.

+ *

+ * @isr

+ */

 CH_IRQ_HANDLER(USART2_IRQHandler) {

 

   CH_IRQ_PROLOGUE();

@@ -244,6 +254,11 @@ CH_IRQ_HANDLER(USART2_IRQHandler) {
 #endif

 

 #if STM32_SERIAL_USE_USART3 || defined(__DOXYGEN__)

+/**

+ * @brief   USART3 interrupt handler.

+ *

+ * @isr

+ */

 CH_IRQ_HANDLER(USART3_IRQHandler) {

 

   CH_IRQ_PROLOGUE();

@@ -255,6 +270,11 @@ CH_IRQ_HANDLER(USART3_IRQHandler) {
 #endif

 

 #if STM32_SERIAL_USE_UART4 || defined(__DOXYGEN__)

+/**

+ * @brief   UART4 interrupt handler.

+ *

+ * @isr

+ */

 CH_IRQ_HANDLER(UART4_IRQHandler) {

 

   CH_IRQ_PROLOGUE();

@@ -266,6 +286,11 @@ CH_IRQ_HANDLER(UART4_IRQHandler) {
 #endif

 

 #if STM32_SERIAL_USE_UART5 || defined(__DOXYGEN__)

+/**

+ * @brief   UART5 interrupt handler.

+ *

+ * @isr

+ */

 CH_IRQ_HANDLER(UART5_IRQHandler) {

 

   CH_IRQ_PROLOGUE();

@@ -282,6 +307,8 @@ CH_IRQ_HANDLER(UART5_IRQHandler) {
 

 /**

  * @brief   Low level serial driver initialization.

+ *

+ * @notapi

  */

 void sd_lld_init(void) {

 

@@ -318,6 +345,8 @@ void sd_lld_init(void) {
  * @param[in] config    the architecture-dependent serial driver configuration.

  *                      If this parameter is set to @p NULL then a default

  *                      configuration is used.

+ *

+ * @notapi

  */

 void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {

 

@@ -370,6 +399,8 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
  *          interrupt vector.

  *

  * @param[in] sdp       pointer to a @p SerialDriver object

+ *

+ * @notapi

  */

 void sd_lld_stop(SerialDriver *sdp) {

 

diff --git a/os/hal/platforms/STM32/spi_lld.c b/os/hal/platforms/STM32/spi_lld.c
index 5f8d9526a..c12b410c8 100644
--- a/os/hal/platforms/STM32/spi_lld.c
+++ b/os/hal/platforms/STM32/spi_lld.c
@@ -90,6 +90,8 @@ static void spi_start_wait(SPIDriver *spip) {
 #if STM32_SPI_USE_SPI1 || defined(__DOXYGEN__)

 /**

  * @brief   SPI1 RX DMA interrupt handler (channel 2).

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(DMA1_Ch2_IRQHandler) {

 

@@ -106,6 +108,8 @@ CH_IRQ_HANDLER(DMA1_Ch2_IRQHandler) {
 

 /**

  * @brief   SPI1 TX DMA interrupt handler (channel 3).

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(DMA1_Ch3_IRQHandler) {

 

@@ -121,6 +125,8 @@ CH_IRQ_HANDLER(DMA1_Ch3_IRQHandler) {
 #if STM32_SPI_USE_SPI2 || defined(__DOXYGEN__)

 /**

  * @brief   SPI2 RX DMA interrupt handler (channel 4).

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(DMA1_Ch4_IRQHandler) {

 

@@ -137,6 +143,8 @@ CH_IRQ_HANDLER(DMA1_Ch4_IRQHandler) {
 

 /**

  * @brief   SPI2 TX DMA interrupt handler (channel 5).

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(DMA1_Ch5_IRQHandler) {

 

@@ -152,6 +160,8 @@ CH_IRQ_HANDLER(DMA1_Ch5_IRQHandler) {
 #if STM32_SPI_USE_SPI3 || defined(__DOXYGEN__)

 /**

  * @brief   SPI3 RX DMA interrupt handler (DMA2, channel 1).

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(DMA2_Ch1_IRQHandler) {

 

@@ -168,6 +178,8 @@ CH_IRQ_HANDLER(DMA2_Ch1_IRQHandler) {
 

 /**

  * @brief   SPI3 TX DMA2 interrupt handler (DMA2, channel 2).

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(DMA2_Ch2_IRQHandler) {

 

@@ -186,6 +198,8 @@ CH_IRQ_HANDLER(DMA2_Ch2_IRQHandler) {
 

 /**

  * @brief   Low level SPI driver initialization.

+ *

+ * @notapi

  */

 void spi_lld_init(void) {

 

@@ -224,6 +238,8 @@ void spi_lld_init(void) {
  * @brief   Configures and activates the SPI peripheral.

  *

  * @param[in] spip      pointer to the @p SPIDriver object

+ *

+ * @notapi

  */

 void spi_lld_start(SPIDriver *spip) {

 

@@ -284,6 +300,8 @@ void spi_lld_start(SPIDriver *spip) {
  * @brief   Deactivates the SPI peripheral.

  *

  * @param[in] spip      pointer to the @p SPIDriver object

+ *

+ * @notapi

  */

 void spi_lld_stop(SPIDriver *spip) {

 

@@ -324,6 +342,8 @@ void spi_lld_stop(SPIDriver *spip) {
  * @brief   Asserts the slave select signal and prepares for transfers.

  *

  * @param[in] spip      pointer to the @p SPIDriver object

+ *

+ * @notapi

  */

 void spi_lld_select(SPIDriver *spip) {

 

@@ -335,6 +355,8 @@ void spi_lld_select(SPIDriver *spip) {
  * @details The previously selected peripheral is unselected.

  *

  * @param[in] spip      pointer to the @p SPIDriver object

+ *

+ * @notapi

  */

 void spi_lld_unselect(SPIDriver *spip) {

 

@@ -349,6 +371,8 @@ void spi_lld_unselect(SPIDriver *spip) {
  *

  * @param[in] spip      pointer to the @p SPIDriver object

  * @param[in] n         number of words to be ignored

+ *

+ * @notapi

  */

 void spi_lld_ignore(SPIDriver *spip, size_t n) {

   uint16_t dummyrx;

@@ -371,6 +395,8 @@ void spi_lld_ignore(SPIDriver *spip, size_t n) {
  * @param[in] n         number of words to be exchanged

  * @param[in] txbuf     the pointer to the transmit buffer

  * @param[out] rxbuf    the pointer to the receive buffer

+ *

+ * @notapi

  */

 void spi_lld_exchange(SPIDriver *spip, size_t n,

                       const void *txbuf, void *rxbuf) {

@@ -390,6 +416,8 @@ void spi_lld_exchange(SPIDriver *spip, size_t n,
  * @param[in] spip      pointer to the @p SPIDriver object

  * @param[in] n         number of words to send

  * @param[in] txbuf     the pointer to the transmit buffer

+ *

+ * @notapi

  */

 void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {

   uint16_t dummyrx;

@@ -409,6 +437,8 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
  * @param[in] spip      pointer to the @p SPIDriver object

  * @param[in] n         number of words to receive

  * @param[out] rxbuf    the pointer to the receive buffer

+ *

+ * @notapi

  */

 void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {

   uint16_t dummytx = 0xFFFF;

diff --git a/os/hal/platforms/STM32/stm32_dma.c b/os/hal/platforms/STM32/stm32_dma.c
index 5a24f45b2..995e33a12 100644
--- a/os/hal/platforms/STM32/stm32_dma.c
+++ b/os/hal/platforms/STM32/stm32_dma.c
@@ -54,6 +54,8 @@ static cnt_t dmacnt2;
 

 /**

  * @brief STM32 DMA helper initialization.

+ *

+ * @init

  */

 void dmaInit(void) {

   int i;

@@ -74,6 +76,8 @@ void dmaInit(void) {
  * @brief Enables the specified DMA controller clock.

  *

  * @param[in] dma the DMA controller id

+ *

+ * @api

  */

 void dmaEnable(uint32_t dma) {

 

@@ -99,6 +103,8 @@ void dmaEnable(uint32_t dma) {
  * @brief Disables the specified DMA controller clock.

  *

  * @param[in] dma the DMA controller id

+ *

+ * @api

  */

 void dmaDisable(uint32_t dma) {

 

diff --git a/os/hal/platforms/STM32/stm32_dma.h b/os/hal/platforms/STM32/stm32_dma.h
index 226ec9b7f..20873116e 100644
--- a/os/hal/platforms/STM32/stm32_dma.h
+++ b/os/hal/platforms/STM32/stm32_dma.h
@@ -130,6 +130,8 @@ typedef struct {
  *

  * @param[in] dmachp    dmachp to a stm32_dma_channel_t structure

  * @param[in] cpar      value to be written in the CPAR register

+ *

+ * @api

  */

 #define dmaChannelSetPeripheral(dmachp, cpar) {                             \

   (dmachp)->CPAR  = (uint32_t)(cpar);                                       \

@@ -145,6 +147,8 @@ typedef struct {
  * @param[in] cndtr     value to be written in the CNDTR register

  * @param[in] cmar      value to be written in the CMAR register

  * @param[in] ccr       value to be written in the CCR register

+ *

+ * @api

  */

 #define dmaChannelSetup(dmachp, cndtr, cmar, ccr) {                         \

   (dmachp)->CNDTR = (uint32_t)(cndtr);                                      \

@@ -156,6 +160,8 @@ typedef struct {
  * @brief   DMA channel enable by channel pointer.

  *

  * @param[in] dmachp    dmachp to a stm32_dma_channel_t structure

+ *

+ * @api

  */

 #define dmaChannelEnable(dmachp) {                                          \

   (dmachp)->CCR |= DMA_CCR1_EN;                                             \

@@ -166,6 +172,8 @@ typedef struct {
  * @brief   DMA channel disable by channel pointer.

  *

  * @param[in] dmachp    dmachp to a stm32_dma_channel_t structure

+ *

+ * @api

  */

 #define dmaChannelDisable(dmachp) {                                         \

   (dmachp)->CCR = 0;                                                        \

@@ -184,6 +192,8 @@ typedef struct {
  * @param[in] cndtr     value to be written in the CNDTR register

  * @param[in] cmar      value to be written in the CMAR register

  * @param[in] ccr       value to be written in the CCR register

+ *

+ * @api

  */

 #define dmaSetupChannel(dmap, ch, cndtr, cmar, ccr) {                       \

   dmaChannelSetup(&(dmap)->channels[ch], (cndtr), (cmar), (ccr));           \

@@ -196,6 +206,8 @@ typedef struct {
  *

  * @param[in] dmap      pointer to a stm32_dma_t structure

  * @param[in] ch        channel number

+ *

+ * @api

  */

 #define dmaEnableChannel(dmap, ch) {                                        \

   dmaChannelEnable(&(dmap)->channels[ch]);                                  \

@@ -208,6 +220,8 @@ typedef struct {
  *

  * @param[in] dmap      pointer to a stm32_dma_t structure

  * @param[in] ch        channel number

+ *

+ * @api

  */

 #define dmaDisableChannel(dmap, ch) {                                       \

   dmaChannelDisable(&(dmap)->channels[ch]);                                 \

@@ -222,6 +236,8 @@ typedef struct {
  *

  * @param[in] dmap      pointer to a stm32_dma_t structure

  * @param[in] ch        channel number

+ *

+ * @api

  */

 #define dmaClearChannel(dmap, ch){                                          \

   (dmap)->IFCR = 1 << ((ch) * 4);                                           \

diff --git a/os/hal/platforms/STM32/uart_lld.c b/os/hal/platforms/STM32/uart_lld.c
index 99373a401..0d9c533f1 100644
--- a/os/hal/platforms/STM32/uart_lld.c
+++ b/os/hal/platforms/STM32/uart_lld.c
@@ -225,6 +225,8 @@ static void serve_usart_irq(UARTDriver *uartp) {
 #if STM32_UART_USE_USART1 || defined(__DOXYGEN__)

 /**

  * @brief   USART1 RX DMA interrupt handler (channel 5).

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(DMA1_Ch5_IRQHandler) {

   UARTDriver *uartp;

@@ -256,6 +258,8 @@ CH_IRQ_HANDLER(DMA1_Ch5_IRQHandler) {
 

 /**

  * @brief   USART1 TX DMA interrupt handler (channel 4).

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(DMA1_Ch4_IRQHandler) {

 

@@ -273,6 +277,8 @@ CH_IRQ_HANDLER(DMA1_Ch4_IRQHandler) {
 

 /**

  * @brief   USART1 IRQ handler.

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(USART1_IRQHandler) {

 

@@ -287,6 +293,8 @@ CH_IRQ_HANDLER(USART1_IRQHandler) {
 #if STM32_UART_USE_USART2 || defined(__DOXYGEN__)

 /**

  * @brief   USART2 RX DMA interrupt handler (channel 6).

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(DMA1_Ch6_IRQHandler) {

   UARTDriver *uartp;

@@ -318,6 +326,8 @@ CH_IRQ_HANDLER(DMA1_Ch6_IRQHandler) {
 

 /**

  * @brief   USART2 TX DMA interrupt handler (channel 7).

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(DMA1_Ch7_IRQHandler) {

 

@@ -335,6 +345,8 @@ CH_IRQ_HANDLER(DMA1_Ch7_IRQHandler) {
 

 /**

  * @brief   USART2 IRQ handler.

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(USART2_IRQHandler) {

 

@@ -349,6 +361,8 @@ CH_IRQ_HANDLER(USART2_IRQHandler) {
 #if STM32_UART_USE_USART3 || defined(__DOXYGEN__)

 /**

  * @brief   USART3 RX DMA interrupt handler (channel 3).

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(DMA1_Ch3_IRQHandler) {

   UARTDriver *uartp;

@@ -380,6 +394,8 @@ CH_IRQ_HANDLER(DMA1_Ch3_IRQHandler) {
 

 /**

  * @brief   USART3 TX DMA interrupt handler (channel 2).

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(DMA1_Ch2_IRQHandler) {

 

@@ -397,6 +413,8 @@ CH_IRQ_HANDLER(DMA1_Ch2_IRQHandler) {
 

 /**

  * @brief   USART3 IRQ handler.

+ *

+ * @isr

  */

 CH_IRQ_HANDLER(USART3_IRQHandler) {

 

@@ -414,6 +432,8 @@ CH_IRQ_HANDLER(USART3_IRQHandler) {
 

 /**

  * @brief   Low level UART driver initialization.

+ *

+ * @notapi

  */

 void uart_lld_init(void) {

 

@@ -455,6 +475,8 @@ void uart_lld_init(void) {
  * @brief   Configures and activates the UART peripheral.

  *

  * @param[in] uartp     pointer to the @p UARTDriver object

+ *

+ * @notapi

  */

 void uart_lld_start(UARTDriver *uartp) {

 

@@ -519,6 +541,8 @@ void uart_lld_start(UARTDriver *uartp) {
  * @brief   Deactivates the UART peripheral.

  *

  * @param[in] uartp     pointer to the @p UARTDriver object

+ *

+ * @notapi

  */

 void uart_lld_stop(UARTDriver *uartp) {

 

@@ -568,6 +592,8 @@ void uart_lld_stop(UARTDriver *uartp) {
  * @param[in] uartp     pointer to the @p UARTDriver object

  * @param[in] n         number of data frames to send

  * @param[in] txbuf     the pointer to the transmit buffer

+ *

+ * @notapi

  */

 void uart_lld_start_send(UARTDriver *uartp, size_t n, const void *txbuf) {

 

@@ -586,6 +612,8 @@ void uart_lld_start_send(UARTDriver *uartp, size_t n, const void *txbuf) {
  *

  * @return              The number of data frames not transmitted by the

  *                      stopped transmit operation.

+ *

+ * @notapi

  */

 size_t uart_lld_stop_send(UARTDriver *uartp) {

 

@@ -602,6 +630,8 @@ size_t uart_lld_stop_send(UARTDriver *uartp) {
  * @param[in] uartp     pointer to the @p UARTDriver object

  * @param[in] n         number of data frames to send

  * @param[in] rxbuf     the pointer to the receive buffer

+ *

+ * @notapi

  */

 void uart_lld_start_receive(UARTDriver *uartp, size_t n, void *rxbuf) {

 

@@ -624,6 +654,8 @@ void uart_lld_start_receive(UARTDriver *uartp, size_t n, void *rxbuf) {
  *

  * @return              The number of data frames not received by the

  *                      stopped receive operation.

+ *

+ * @notapi

  */

 size_t uart_lld_stop_receive(UARTDriver *uartp) {

   size_t n;