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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2010-03-30 17:04:51 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2010-03-30 17:04:51 +0000
commit1134fe2a87e70cad601394793f0f01cfef066b70 (patch)
treec9748d498a31a5cfc7bf6124319428d499da1cf1 /os/hal/platforms/STM32/spi_lld.c
parent5fa5b9ef5616c00ed5ae936a2efadfba47bcaa1f (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1814 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/spi_lld.c')
-rw-r--r--os/hal/platforms/STM32/spi_lld.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/os/hal/platforms/STM32/spi_lld.c b/os/hal/platforms/STM32/spi_lld.c
index 37961c2a7..af4fdfc3d 100644
--- a/os/hal/platforms/STM32/spi_lld.c
+++ b/os/hal/platforms/STM32/spi_lld.c
@@ -218,16 +218,20 @@ void spi_lld_start(SPIDriver *spip) {
#if USE_STM32_SPI1
if (&SPID1 == spip) {
dmaEnable(DMA1_ID); /* NOTE: Must be enabled before the IRQs.*/
- NVICEnableVector(DMA1_Channel2_IRQn, STM32_SPI1_IRQ_PRIORITY);
- NVICEnableVector(DMA1_Channel3_IRQn, STM32_SPI1_IRQ_PRIORITY);
+ NVICEnableVector(DMA1_Channel2_IRQn,
+ CORTEX_PRIORITY_MASK(STM32_SPI1_IRQ_PRIORITY));
+ NVICEnableVector(DMA1_Channel3_IRQn,
+ CORTEX_PRIORITY_MASK(STM32_SPI1_IRQ_PRIORITY));
RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
}
#endif
#if USE_STM32_SPI2
if (&SPID2 == spip) {
dmaEnable(DMA1_ID); /* NOTE: Must be enabled before the IRQs.*/
- NVICEnableVector(DMA1_Channel4_IRQn, STM32_SPI2_IRQ_PRIORITY);
- NVICEnableVector(DMA1_Channel5_IRQn, STM32_SPI2_IRQ_PRIORITY);
+ NVICEnableVector(DMA1_Channel4_IRQn,
+ CORTEX_PRIORITY_MASK(STM32_SPI2_IRQ_PRIORITY));
+ NVICEnableVector(DMA1_Channel5_IRQn,
+ CORTEX_PRIORITY_MASK(STM32_SPI2_IRQ_PRIORITY));
RCC->APB1ENR |= RCC_APB1ENR_SPI2EN;
}
#endif