diff options
| author | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-04-22 16:55:57 +0000 |
|---|---|---|
| committer | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-04-22 16:55:57 +0000 |
| commit | bb2388a241ff04696c9159e8c3b36588a5fd67a2 (patch) | |
| tree | 0243b11693109faa24c2679259e633ccaf298dda /os/hal/platforms/STM32/sdc_lld.c | |
| parent | df9fd22f536ba12906bf94820de969e4e19fdd24 (diff) | |
| download | ChibiOS-bb2388a241ff04696c9159e8c3b36588a5fd67a2.tar.gz ChibiOS-bb2388a241ff04696c9159e8c3b36588a5fd67a2.tar.bz2 ChibiOS-bb2388a241ff04696c9159e8c3b36588a5fd67a2.zip | |
SDC. Added F4x-specyfic DMA transaction end code.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4123 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/sdc_lld.c')
| -rw-r--r-- | os/hal/platforms/STM32/sdc_lld.c | 21 |
1 files changed, 17 insertions, 4 deletions
diff --git a/os/hal/platforms/STM32/sdc_lld.c b/os/hal/platforms/STM32/sdc_lld.c index 59f988eb0..1bc553baf 100644 --- a/os/hal/platforms/STM32/sdc_lld.c +++ b/os/hal/platforms/STM32/sdc_lld.c @@ -176,17 +176,30 @@ static bool_t sdc_lld_wait_transaction_end(SDCDriver *sdcp, uint32_t n, return CH_FAILED;
}
- /* Waits for transfer completion at DMA level, the the stream is
- disabled and cleared.*/
- dmaWaitCompletion(sdcp->dma);
+#if (defined(STM32F4XX) || defined(STM32F2XX))
+ /* Wait until DMA channel enabled to be sure that all data transferred.*/
+ while (sdcp->dma->stream->CR & STM32_DMA_CR_EN)
+ ;
+
+ /* DMA event flags must be manually cleared.*/
+ dmaStreamClearInterrupt(sdcp->dma);
SDIO->ICR = STM32_SDIO_ICR_ALL_FLAGS;
SDIO->DCTRL = 0;
chSysUnlock();
/* Wait until interrupt flags to be cleared.*/
-/* while (((DMA2->LISR) >> (sdcp->dma->ishift)) & STM32_DMA_ISR_TCIF)
+ /*while (((DMA2->LISR) >> (sdcp->dma->ishift)) & STM32_DMA_ISR_TCIF)
dmaStreamClearInterrupt(sdcp->dma);*/
+#else
+ /* Waits for transfer completion at DMA level, the the stream is
+ disabled and cleared.*/
+ dmaWaitCompletion(sdcp->dma);
+
+ SDIO->ICR = STM32_SDIO_ICR_ALL_FLAGS;
+ SDIO->DCTRL = 0;
+ chSysUnlock();
+#endif
/* Finalize transaction.*/
if (n > 1)
|