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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-05-10 18:33:49 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-05-10 18:33:49 +0000
commit0cb8d71e9da98423ea75f0c77b05d4a441d57af8 (patch)
tree960b09405ed881787c017b0bfbb55aa4c6758157 /os/hal/platforms/STM32/sdc_lld.c
parentf91dff51cc155f265a65417087f3402e99f6e5ae (diff)
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SDC improvements.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2946 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/sdc_lld.c')
-rw-r--r--os/hal/platforms/STM32/sdc_lld.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/os/hal/platforms/STM32/sdc_lld.c b/os/hal/platforms/STM32/sdc_lld.c
index a0d5965fc..6f2ea95ba 100644
--- a/os/hal/platforms/STM32/sdc_lld.c
+++ b/os/hal/platforms/STM32/sdc_lld.c
@@ -332,6 +332,10 @@ bool_t sdc_lld_read(SDCDriver *sdcp, uint32_t startblk,
uint8_t *buf, uint32_t n) {
uint32_t resp[1];
+ /* Checks for errors and waits for the card to be ready for reading.*/
+ if (sdc_wait_for_transfer_state(sdcp))
+ return TRUE;
+
/* Prepares the DMA channel for reading.*/
dmaChannelSetup(&STM32_DMA2->channels[STM32_DMA_CHANNEL_4],
(n * SDC_BLOCK_SIZE) / sizeof (uint32_t), buf,
@@ -355,7 +359,7 @@ bool_t sdc_lld_read(SDCDriver *sdcp, uint32_t startblk,
if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_READ_MULTIPLE_BLOCK,
startblk, resp) ||
- (resp[0] & SDC_R1_ERROR_MASK))
+ SDC_R1_ERROR(resp[0]))
goto error;
chSysLock();
@@ -399,8 +403,11 @@ error:
*/
bool_t sdc_lld_write(SDCDriver *sdcp, uint32_t startblk,
const uint8_t *buf, uint32_t n) {
- uint32_t sts, resp[1];
- bool_t err;
+ uint32_t resp[1];
+
+ /* Checks for errors and waits for the card to be ready for writing.*/
+ if (sdc_wait_for_transfer_state(sdcp))
+ return TRUE;
/* Prepares the DMA channel for writing.*/
dmaChannelSetup(&STM32_DMA2->channels[STM32_DMA_CHANNEL_4],
@@ -412,7 +419,7 @@ bool_t sdc_lld_write(SDCDriver *sdcp, uint32_t startblk,
/* Write multiple blocks command.*/
if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_WRITE_MULTIPLE_BLOCK,
startblk, resp) ||
- (resp[0] & SDC_R1_ERROR_MASK))
+ SDC_R1_ERROR(resp[0]))
return TRUE;
/* Setting up data transfer.
@@ -447,14 +454,7 @@ bool_t sdc_lld_write(SDCDriver *sdcp, uint32_t startblk,
SDIO->DCTRL = 0;
chSysUnlock();
- err = sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_STOP_TRANSMISSION, 0, resp);
- do {
- if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_SEND_STATUS,sdcp->rca, resp) ||
- (resp[0] & SDC_R1_ERROR_MASK))
- return TRUE;
- sts = SDC_STS(resp[0]);
- } while ((sts == SDC_STS_RCV) || (sts == SDC_STS_PRG));
- return err;
+ return sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_STOP_TRANSMISSION, 0, resp);
error:
dmaDisableChannel(STM32_DMA2, STM32_DMA_CHANNEL_4);
SDIO->ICR = 0xFFFFFFFF;