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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2009-12-19 09:05:40 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2009-12-19 09:05:40 +0000 |
| commit | 3dea38d9549dae5956b8753e824b3e855e91fdee (patch) | |
| tree | ff23a88123f1aaf9e51396268cde17b2953ca54e /os/hal/platforms/STM32/pwm_lld.h | |
| parent | ce5974e5de90403c272854a2be4e47d924575186 (diff) | |
| download | ChibiOS-3dea38d9549dae5956b8753e824b3e855e91fdee.tar.gz ChibiOS-3dea38d9549dae5956b8753e824b3e855e91fdee.tar.bz2 ChibiOS-3dea38d9549dae5956b8753e824b3e855e91fdee.zip | |
STM32 PWM driver done.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1440 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/pwm_lld.h')
| -rw-r--r-- | os/hal/platforms/STM32/pwm_lld.h | 71 |
1 files changed, 71 insertions, 0 deletions
diff --git a/os/hal/platforms/STM32/pwm_lld.h b/os/hal/platforms/STM32/pwm_lld.h index d44c1fdbf..e8eef9d8c 100644 --- a/os/hal/platforms/STM32/pwm_lld.h +++ b/os/hal/platforms/STM32/pwm_lld.h @@ -52,6 +52,33 @@ #endif
/**
+ * @brief PWM2 driver enable switch.
+ * @details If set to @p TRUE the support for PWM2 is included.
+ * @note The default is @p TRUE.
+ */
+#if !defined(USE_STM32_PWM2) || defined(__DOXYGEN__)
+#define USE_STM32_PWM2 TRUE
+#endif
+
+/**
+ * @brief PWM3 driver enable switch.
+ * @details If set to @p TRUE the support for PWM3 is included.
+ * @note The default is @p TRUE.
+ */
+#if !defined(USE_STM32_PWM3) || defined(__DOXYGEN__)
+#define USE_STM32_PWM3 TRUE
+#endif
+
+/**
+ * @brief PWM4 driver enable switch.
+ * @details If set to @p TRUE the support for PWM4 is included.
+ * @note The default is @p TRUE.
+ */
+#if !defined(USE_STM32_PWM4) || defined(__DOXYGEN__)
+#define USE_STM32_PWM4 TRUE
+#endif
+
+/**
* @brief PWM1 interrupt priority level setting.
* @note @p BASEPRI_KERNEL >= @p STM32_PWM1_IRQ_PRIORITY > @p PRIORITY_PENDSV.
*/
@@ -59,6 +86,38 @@ #define STM32_PWM1_IRQ_PRIORITY 0x80
#endif
+/**
+ * @brief PWM2 interrupt priority level setting.
+ * @note @p BASEPRI_KERNEL >= @p STM32_PWM2_IRQ_PRIORITY > @p PRIORITY_PENDSV.
+ */
+#if !defined(STM32_PWM2_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_PWM2_IRQ_PRIORITY 0x80
+#endif
+
+/**
+ * @brief PWM3 interrupt priority level setting.
+ * @note @p BASEPRI_KERNEL >= @p STM32_PWM3_IRQ_PRIORITY > @p PRIORITY_PENDSV.
+ */
+#if !defined(STM32_PWM3_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_PWM3_IRQ_PRIORITY 0x80
+#endif
+
+/**
+ * @brief PWM4 interrupt priority level setting.
+ * @note @p BASEPRI_KERNEL >= @p STM32_PWM4_IRQ_PRIORITY > @p PRIORITY_PENDSV.
+ */
+#if !defined(STM32_PWM4_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_PWM4_IRQ_PRIORITY 0x80
+#endif
+
+/*===========================================================================*/
+/* Configuration checks. */
+/*===========================================================================*/
+
+#if USE_STM32_PWM4 && defined(STM32F10X_LD)
+#error "TIM4 not present in low density STM32 devices"
+#endif
+
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
@@ -154,6 +213,18 @@ typedef struct { extern PWMDriver PWMD1;
#endif
+#if defined(USE_STM32_PWM2)
+extern PWMDriver PWMD2;
+#endif
+
+#if defined(USE_STM32_PWM3)
+extern PWMDriver PWMD3;
+#endif
+
+#if defined(USE_STM32_PWM4)
+extern PWMDriver PWMD4;
+#endif
+
#ifdef __cplusplus
extern "C" {
#endif
|