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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2010-03-30 17:04:51 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2010-03-30 17:04:51 +0000
commit1134fe2a87e70cad601394793f0f01cfef066b70 (patch)
treec9748d498a31a5cfc7bf6124319428d499da1cf1 /os/hal/platforms/STM32/pwm_lld.h
parent5fa5b9ef5616c00ed5ae936a2efadfba47bcaa1f (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1814 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/pwm_lld.h')
-rw-r--r--os/hal/platforms/STM32/pwm_lld.h16
1 files changed, 4 insertions, 12 deletions
diff --git a/os/hal/platforms/STM32/pwm_lld.h b/os/hal/platforms/STM32/pwm_lld.h
index a16b248b1..4249a8514 100644
--- a/os/hal/platforms/STM32/pwm_lld.h
+++ b/os/hal/platforms/STM32/pwm_lld.h
@@ -80,38 +80,30 @@
/**
* @brief PWM1 interrupt priority level setting.
- * @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_PWM1_IRQ_PRIORITY >
- * @p CORTEX_PRIORITY_PENDSV.
*/
#if !defined(STM32_PWM1_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_PWM1_IRQ_PRIORITY CORTEX_PRIORITY(7)
+#define STM32_PWM1_IRQ_PRIORITY 7
#endif
/**
* @brief PWM2 interrupt priority level setting.
- * @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_PWM2_IRQ_PRIORITY >
- * @p CORTEX_PRIORITY_PENDSV.
*/
#if !defined(STM32_PWM2_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_PWM2_IRQ_PRIORITY CORTEX_PRIORITY(7)
+#define STM32_PWM2_IRQ_PRIORITY 7
#endif
/**
* @brief PWM3 interrupt priority level setting.
- * @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_PWM3_IRQ_PRIORITY >
- * @p CORTEX_PRIORITY_PENDSV.
*/
#if !defined(STM32_PWM3_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_PWM3_IRQ_PRIORITY CORTEX_PRIORITY(7)
+#define STM32_PWM3_IRQ_PRIORITY 7
#endif
/**
* @brief PWM4 interrupt priority level setting.
- * @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_PWM4_IRQ_PRIORITY >
- * @p CORTEX_PRIORITY_PENDSV.
*/
#if !defined(STM32_PWM4_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_PWM4_IRQ_PRIORITY CORTEX_PRIORITY(7)
+#define STM32_PWM4_IRQ_PRIORITY 7
#endif
/*===========================================================================*/