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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2012-06-21 17:24:17 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2012-06-21 17:24:17 +0000
commita41017aac10f2255f13ce45044f567b021eeb474 (patch)
treea23316514beb0607bee75f7b819ab6d40d564e76 /os/hal/platforms/STM32/pwm_lld.c
parentdbe26c3e6e3c7015378da5d1d1cf5687477052c6 (diff)
downloadChibiOS-a41017aac10f2255f13ce45044f567b021eeb474.tar.gz
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ChibiOS-a41017aac10f2255f13ce45044f567b021eeb474.zip
STM32 ICU and PWM drivers adapted to the new ISR names.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4319 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/pwm_lld.c')
-rw-r--r--os/hal/platforms/STM32/pwm_lld.c51
1 files changed, 26 insertions, 25 deletions
diff --git a/os/hal/platforms/STM32/pwm_lld.c b/os/hal/platforms/STM32/pwm_lld.c
index 518f92928..324aa1553 100644
--- a/os/hal/platforms/STM32/pwm_lld.c
+++ b/os/hal/platforms/STM32/pwm_lld.c
@@ -134,7 +134,7 @@ static void serve_interrupt(PWMDriver *pwmp) {
*
* @isr
*/
-CH_IRQ_HANDLER(TIM1_UP_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM1_UP_HANDLER) {
CH_IRQ_PROLOGUE();
@@ -152,7 +152,7 @@ CH_IRQ_HANDLER(TIM1_UP_IRQHandler) {
*
* @isr
*/
-CH_IRQ_HANDLER(TIM1_CC_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM1_CC_HANDLER) {
uint16_t sr;
CH_IRQ_PROLOGUE();
@@ -179,7 +179,7 @@ CH_IRQ_HANDLER(TIM1_CC_IRQHandler) {
*
* @isr
*/
-CH_IRQ_HANDLER(TIM2_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM2_HANDLER) {
CH_IRQ_PROLOGUE();
@@ -195,7 +195,7 @@ CH_IRQ_HANDLER(TIM2_IRQHandler) {
*
* @isr
*/
-CH_IRQ_HANDLER(TIM3_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM3_HANDLER) {
CH_IRQ_PROLOGUE();
@@ -211,7 +211,7 @@ CH_IRQ_HANDLER(TIM3_IRQHandler) {
*
* @isr
*/
-CH_IRQ_HANDLER(TIM4_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM4_HANDLER) {
CH_IRQ_PROLOGUE();
@@ -227,7 +227,7 @@ CH_IRQ_HANDLER(TIM4_IRQHandler) {
*
* @isr
*/
-CH_IRQ_HANDLER(TIM5_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM5_HANDLER) {
CH_IRQ_PROLOGUE();
@@ -246,7 +246,7 @@ CH_IRQ_HANDLER(TIM5_IRQHandler) {
*
* @isr
*/
-CH_IRQ_HANDLER(TIM8_UP_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM8_UP_HANDLER) {
CH_IRQ_PROLOGUE();
@@ -264,13 +264,14 @@ CH_IRQ_HANDLER(TIM8_UP_IRQHandler) {
*
* @isr
*/
-CH_IRQ_HANDLER(TIM8_CC_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM8_CC_HANDLER) {
uint16_t sr;
CH_IRQ_PROLOGUE();
sr = STM32_TIM8->SR & STM32_TIM8->DIER;
- STM32_TIM8->SR = ~(TIM_SR_CC1IF | TIM_SR_CC2IF | TIM_SR_CC3IF | TIM_SR_CC4IF);
+ STM32_TIM8->SR = ~(TIM_SR_CC1IF | TIM_SR_CC2IF |
+ TIM_SR_CC3IF | TIM_SR_CC4IF);
if ((sr & TIM_SR_CC1IF) != 0)
PWMD8.config->channels[0].callback(&PWMD8);
if ((sr & TIM_SR_CC2IF) != 0)
@@ -351,9 +352,9 @@ void pwm_lld_start(PWMDriver *pwmp) {
if (&PWMD1 == pwmp) {
rccEnableTIM1(FALSE);
rccResetTIM1();
- nvicEnableVector(TIM1_UP_IRQn,
+ nvicEnableVector(STM32_TIM1_UP_NUMBER,
CORTEX_PRIORITY_MASK(STM32_PWM_TIM1_IRQ_PRIORITY));
- nvicEnableVector(TIM1_CC_IRQn,
+ nvicEnableVector(STM32_TIM1_CC_NUMBER,
CORTEX_PRIORITY_MASK(STM32_PWM_TIM1_IRQ_PRIORITY));
pwmp->clock = STM32_TIMCLK2;
}
@@ -362,7 +363,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
if (&PWMD2 == pwmp) {
rccEnableTIM2(FALSE);
rccResetTIM2();
- nvicEnableVector(TIM2_IRQn,
+ nvicEnableVector(STM32_TIM2_NUMBER,
CORTEX_PRIORITY_MASK(STM32_PWM_TIM2_IRQ_PRIORITY));
pwmp->clock = STM32_TIMCLK1;
}
@@ -371,7 +372,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
if (&PWMD3 == pwmp) {
rccEnableTIM3(FALSE);
rccResetTIM3();
- nvicEnableVector(TIM3_IRQn,
+ nvicEnableVector(STM32_TIM3_NUMBER,
CORTEX_PRIORITY_MASK(STM32_PWM_TIM3_IRQ_PRIORITY));
pwmp->clock = STM32_TIMCLK1;
}
@@ -380,7 +381,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
if (&PWMD4 == pwmp) {
rccEnableTIM4(FALSE);
rccResetTIM4();
- nvicEnableVector(TIM4_IRQn,
+ nvicEnableVector(STM32_TIM4_NUMBER,
CORTEX_PRIORITY_MASK(STM32_PWM_TIM4_IRQ_PRIORITY));
pwmp->clock = STM32_TIMCLK1;
}
@@ -390,7 +391,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
if (&PWMD5 == pwmp) {
rccEnableTIM5(FALSE);
rccResetTIM5();
- nvicEnableVector(TIM5_IRQn,
+ nvicEnableVector(STM32_TIM5_NUMBER,
CORTEX_PRIORITY_MASK(STM32_PWM_TIM5_IRQ_PRIORITY));
pwmp->clock = STM32_TIMCLK1;
}
@@ -399,9 +400,9 @@ void pwm_lld_start(PWMDriver *pwmp) {
if (&PWMD8 == pwmp) {
rccEnableTIM8(FALSE);
rccResetTIM8();
- nvicEnableVector(TIM8_UP_IRQn,
+ nvicEnableVector(STM32_TIM8_UP_NUMBER,
CORTEX_PRIORITY_MASK(STM32_PWM_TIM8_IRQ_PRIORITY));
- nvicEnableVector(TIM8_CC_IRQn,
+ nvicEnableVector(STM32_TIM8_CC_NUMBER,
CORTEX_PRIORITY_MASK(STM32_PWM_TIM8_IRQ_PRIORITY));
pwmp->clock = STM32_TIMCLK2;
}
@@ -545,39 +546,39 @@ void pwm_lld_stop(PWMDriver *pwmp) {
#if STM32_PWM_USE_TIM1
if (&PWMD1 == pwmp) {
- nvicDisableVector(TIM1_UP_IRQn);
- nvicDisableVector(TIM1_CC_IRQn);
+ nvicDisableVector(STM32_TIM1_UP_NUMBER);
+ nvicDisableVector(STM32_TIM1_CC_NUMBER);
rccDisableTIM1(FALSE);
}
#endif
#if STM32_PWM_USE_TIM2
if (&PWMD2 == pwmp) {
- nvicDisableVector(TIM2_IRQn);
+ nvicDisableVector(STM32_TIM2_NUMBER);
rccDisableTIM2(FALSE);
}
#endif
#if STM32_PWM_USE_TIM3
if (&PWMD3 == pwmp) {
- nvicDisableVector(TIM3_IRQn);
+ nvicDisableVector(STM32_TIM3_NUMBER);
rccDisableTIM3(FALSE);
}
#endif
#if STM32_PWM_USE_TIM4
if (&PWMD4 == pwmp) {
- nvicDisableVector(TIM4_IRQn);
+ nvicDisableVector(STM32_TIM4_NUMBER);
rccDisableTIM4(FALSE);
}
#endif
#if STM32_PWM_USE_TIM5
if (&PWMD5 == pwmp) {
- nvicDisableVector(TIM5_IRQn);
+ nvicDisableVector(STM32_TIM5_NUMBER);
rccDisableTIM5(FALSE);
}
#endif
#if STM32_PWM_USE_TIM8
if (&PWMD8 == pwmp) {
- nvicDisableVector(TIM8_UP_IRQn);
- nvicDisableVector(TIM8_CC_IRQn);
+ nvicDisableVector(STM32_TIM8_UP_NUMBER);
+ nvicDisableVector(STM32_TIM8_CC_NUMBER);
rccDisableTIM8(FALSE);
}
#endif