diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-03-30 17:04:51 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-03-30 17:04:51 +0000 |
| commit | 1134fe2a87e70cad601394793f0f01cfef066b70 (patch) | |
| tree | c9748d498a31a5cfc7bf6124319428d499da1cf1 /os/hal/platforms/STM32/pwm_lld.c | |
| parent | 5fa5b9ef5616c00ed5ae936a2efadfba47bcaa1f (diff) | |
| download | ChibiOS-1134fe2a87e70cad601394793f0f01cfef066b70.tar.gz ChibiOS-1134fe2a87e70cad601394793f0f01cfef066b70.tar.bz2 ChibiOS-1134fe2a87e70cad601394793f0f01cfef066b70.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1814 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/pwm_lld.c')
| -rw-r--r-- | os/hal/platforms/STM32/pwm_lld.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/os/hal/platforms/STM32/pwm_lld.c b/os/hal/platforms/STM32/pwm_lld.c index 7e39964c3..ab0649b70 100644 --- a/os/hal/platforms/STM32/pwm_lld.c +++ b/os/hal/platforms/STM32/pwm_lld.c @@ -271,26 +271,31 @@ void pwm_lld_start(PWMDriver *pwmp) { /* Clock activation.*/
#if USE_STM32_PWM1
if (&PWMD1 == pwmp) {
- NVICEnableVector(TIM1_UP_IRQn, STM32_PWM1_IRQ_PRIORITY);
- NVICEnableVector(TIM1_CC_IRQn, STM32_PWM1_IRQ_PRIORITY);
+ NVICEnableVector(TIM1_UP_IRQn,
+ CORTEX_PRIORITY_MASK(STM32_PWM1_IRQ_PRIORITY));
+ NVICEnableVector(TIM1_CC_IRQn,
+ CORTEX_PRIORITY_MASK(STM32_PWM1_IRQ_PRIORITY);
RCC->APB2ENR |= RCC_APB2ENR_TIM1EN;
}
#endif
#if USE_STM32_PWM2
if (&PWMD2 == pwmp) {
- NVICEnableVector(TIM2_IRQn, STM32_PWM2_IRQ_PRIORITY);
+ NVICEnableVector(TIM2_IRQn,
+ CORTEX_PRIORITY_MASK(STM32_PWM2_IRQ_PRIORITY));
RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;
}
#endif
#if USE_STM32_PWM3
if (&PWMD3 == pwmp) {
- NVICEnableVector(TIM3_IRQn, STM32_PWM3_IRQ_PRIORITY);
+ NVICEnableVector(TIM3_IRQn,
+ CORTEX_PRIORITY_MASK(STM32_PWM3_IRQ_PRIORITY));
RCC->APB1ENR |= RCC_APB1ENR_TIM3EN;
}
#endif
#if USE_STM32_PWM4
if (&PWMD4 == pwmp) {
- NVICEnableVector(TIM4_IRQn, STM32_PWM4_IRQ_PRIORITY);
+ NVICEnableVector(TIM4_IRQn,
+ CORTEX_PRIORITY_MASK(STM32_PWM4_IRQ_PRIORITY));
RCC->APB1ENR |= RCC_APB1ENR_TIM4EN;
}
#endif
|