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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-06-21 17:14:33 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-06-21 17:14:33 +0000 |
commit | dbe26c3e6e3c7015378da5d1d1cf5687477052c6 (patch) | |
tree | 1f32724287f4bbba7bce18a2e5e11d302cbbd109 /os/hal/platforms/STM32/icu_lld.c | |
parent | 472033935be482c382e9e4329af17b37d1d4e69e (diff) | |
download | ChibiOS-dbe26c3e6e3c7015378da5d1d1cf5687477052c6.tar.gz ChibiOS-dbe26c3e6e3c7015378da5d1d1cf5687477052c6.tar.bz2 ChibiOS-dbe26c3e6e3c7015378da5d1d1cf5687477052c6.zip |
Fixed bug 3536950.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4318 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/icu_lld.c')
-rw-r--r-- | os/hal/platforms/STM32/icu_lld.c | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/os/hal/platforms/STM32/icu_lld.c b/os/hal/platforms/STM32/icu_lld.c index 22ec30487..91ce099c8 100644 --- a/os/hal/platforms/STM32/icu_lld.c +++ b/os/hal/platforms/STM32/icu_lld.c @@ -133,7 +133,7 @@ static void icu_lld_serve_interrupt(ICUDriver *icup) { *
* @isr
*/
-CH_IRQ_HANDLER(TIM1_CC_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM1_UP_HANDLER) {
CH_IRQ_PROLOGUE();
@@ -150,7 +150,7 @@ CH_IRQ_HANDLER(TIM1_CC_IRQHandler) { *
* @isr
*/
-CH_IRQ_HANDLER(TIM1_UP_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM1_CC_HANDLER) {
CH_IRQ_PROLOGUE();
@@ -169,7 +169,7 @@ CH_IRQ_HANDLER(TIM1_UP_IRQHandler) { *
* @isr
*/
-CH_IRQ_HANDLER(TIM2_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM2_HANDLER) {
CH_IRQ_PROLOGUE();
@@ -188,7 +188,7 @@ CH_IRQ_HANDLER(TIM2_IRQHandler) { *
* @isr
*/
-CH_IRQ_HANDLER(TIM3_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM3_HANDLER) {
CH_IRQ_PROLOGUE();
@@ -207,7 +207,7 @@ CH_IRQ_HANDLER(TIM3_IRQHandler) { *
* @isr
*/
-CH_IRQ_HANDLER(TIM4_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM4_HANDLER) {
CH_IRQ_PROLOGUE();
@@ -226,7 +226,7 @@ CH_IRQ_HANDLER(TIM4_IRQHandler) { *
* @isr
*/
-CH_IRQ_HANDLER(TIM5_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM5_HANDLER) {
CH_IRQ_PROLOGUE();
@@ -245,7 +245,7 @@ CH_IRQ_HANDLER(TIM5_IRQHandler) { *
* @isr
*/
-CH_IRQ_HANDLER(TIM8_CC_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM8_UP_HANDLER) {
CH_IRQ_PROLOGUE();
@@ -262,7 +262,7 @@ CH_IRQ_HANDLER(TIM8_CC_IRQHandler) { *
* @isr
*/
-CH_IRQ_HANDLER(TIM8_UP_IRQHandler) {
+CH_IRQ_HANDLER(STM32_TIM8_CC_HANDLER) {
CH_IRQ_PROLOGUE();
@@ -340,9 +340,9 @@ void icu_lld_start(ICUDriver *icup) { if (&ICUD1 == icup) {
rccEnableTIM1(FALSE);
rccResetTIM1();
- nvicEnableVector(TIM1_CC_IRQn,
+ nvicEnableVector(STM32_TIM1_UP_NUMBER,
CORTEX_PRIORITY_MASK(STM32_ICU_TIM1_IRQ_PRIORITY));
- nvicEnableVector(TIM1_UP_IRQn,
+ nvicEnableVector(STM32_TIM1_CC_NUMBER,
CORTEX_PRIORITY_MASK(STM32_ICU_TIM1_IRQ_PRIORITY));
icup->clock = STM32_TIMCLK2;
}
@@ -351,7 +351,7 @@ void icu_lld_start(ICUDriver *icup) { if (&ICUD2 == icup) {
rccEnableTIM2(FALSE);
rccResetTIM2();
- nvicEnableVector(TIM2_IRQn,
+ nvicEnableVector(STM32_TIM2_NUMBER,
CORTEX_PRIORITY_MASK(STM32_ICU_TIM2_IRQ_PRIORITY));
icup->clock = STM32_TIMCLK1;
}
@@ -360,7 +360,7 @@ void icu_lld_start(ICUDriver *icup) { if (&ICUD3 == icup) {
rccEnableTIM3(FALSE);
rccResetTIM3();
- nvicEnableVector(TIM3_IRQn,
+ nvicEnableVector(STM32_TIM3_NUMBER,
CORTEX_PRIORITY_MASK(STM32_ICU_TIM3_IRQ_PRIORITY));
icup->clock = STM32_TIMCLK1;
}
@@ -369,7 +369,7 @@ void icu_lld_start(ICUDriver *icup) { if (&ICUD4 == icup) {
rccEnableTIM4(FALSE);
rccResetTIM4();
- nvicEnableVector(TIM4_IRQn,
+ nvicEnableVector(STM32_TIM4_NUMBER,
CORTEX_PRIORITY_MASK(STM32_ICU_TIM4_IRQ_PRIORITY));
icup->clock = STM32_TIMCLK1;
}
@@ -379,7 +379,7 @@ void icu_lld_start(ICUDriver *icup) { if (&ICUD5 == icup) {
rccEnableTIM5(FALSE);
rccResetTIM5();
- nvicEnableVector(TIM5_IRQn,
+ nvicEnableVector(STM32_TIM5_NUMBER,
CORTEX_PRIORITY_MASK(STM32_ICU_TIM5_IRQ_PRIORITY));
icup->clock = STM32_TIMCLK1;
}
@@ -388,10 +388,10 @@ void icu_lld_start(ICUDriver *icup) { if (&ICUD8 == icup) {
rccEnableTIM8(FALSE);
rccResetTIM8();
- nvicEnableVector(TIM8_CC_IRQn,
+ nvicEnableVector(STM32_TIM8_UP_NUMBER,
+ CORTEX_PRIORITY_MASK(STM32_ICU_TIM8_IRQ_PRIORITY));
+ nvicEnableVector(STM32_TIM8_CC_NUMBER,
CORTEX_PRIORITY_MASK(STM32_ICU_TIM8_IRQ_PRIORITY));
- nvicEnableVector(TIM8_UP_IRQn,
- CORTEX_PRIORITY_MASK(STM32_ICU_TIM1_IRQ_PRIORITY));
icup->clock = STM32_TIMCLK2;
}
#endif
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