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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-06-29 11:59:15 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-06-29 11:59:15 +0000 |
| commit | 30dd0fdc1605baf4b81fce2b6fd9898de07f2ea1 (patch) | |
| tree | 50a3be4a71e5dc4e0016065ac9d41755fe899f31 /os/hal/platforms/STM32/icu_lld.c | |
| parent | 00b07c78d15cfa2711eda49727503364f6ace4ab (diff) | |
| download | ChibiOS-30dd0fdc1605baf4b81fce2b6fd9898de07f2ea1.tar.gz ChibiOS-30dd0fdc1605baf4b81fce2b6fd9898de07f2ea1.tar.bz2 ChibiOS-30dd0fdc1605baf4b81fce2b6fd9898de07f2ea1.zip | |
TIM8 support for STM32.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3098 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/icu_lld.c')
| -rw-r--r-- | os/hal/platforms/STM32/icu_lld.c | 51 |
1 files changed, 50 insertions, 1 deletions
diff --git a/os/hal/platforms/STM32/icu_lld.c b/os/hal/platforms/STM32/icu_lld.c index ae3287ef9..054ce1e3d 100644 --- a/os/hal/platforms/STM32/icu_lld.c +++ b/os/hal/platforms/STM32/icu_lld.c @@ -75,6 +75,14 @@ ICUDriver ICUD4; ICUDriver ICUD5;
#endif
+/**
+ * @brief ICUD8 driver identifier.
+ * @note The driver ICUD8 allocates the timer TIM8 when enabled.
+ */
+#if STM32_ICU_USE_TIM8 || defined(__DOXYGEN__)
+ICUDriver ICUD8;
+#endif
+
/*===========================================================================*/
/* Driver local variables. */
/*===========================================================================*/
@@ -198,6 +206,25 @@ CH_IRQ_HANDLER(TIM5_IRQHandler) { }
#endif /* STM32_ICU_USE_TIM5 */
+#if STM32_ICU_USE_TIM8
+/**
+ * @brief TIM8 compare interrupt handler.
+ * @note It is assumed that the various sources are only activated if the
+ * associated callback pointer is not equal to @p NULL in order to not
+ * perform an extra check in a potentially critical interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(TIM8_CC_IRQHandler) {
+
+ CH_IRQ_PROLOGUE();
+
+ icu_lld_serve_interrupt(&ICUD8);
+
+ CH_IRQ_EPILOGUE();
+}
+#endif /* STM32_ICU_USE_TIM8 */
+
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
@@ -238,6 +265,12 @@ void icu_lld_init(void) { icuObjectInit(&ICUD5);
ICUD5.tim = TIM5;
#endif
+
+#if STM32_ICU_USE_TIM8
+ /* Driver initialization.*/
+ icuObjectInit(&ICUD8);
+ ICUD5.tim = TIM8;
+#endif
}
/**
@@ -303,6 +336,16 @@ void icu_lld_start(ICUDriver *icup) { clock = STM32_TIMCLK1;
}
#endif
+#if STM32_ICU_USE_TIM8
+ if (&ICUD8 == icup) {
+ RCC->APB2ENR |= RCC_APB2ENR_TIM8EN;
+ RCC->APB2RSTR = RCC_APB2RSTR_TIM8RST;
+ RCC->APB2RSTR = 0;
+ NVICEnableVector(TIM8_CC_IRQn,
+ CORTEX_PRIORITY_MASK(STM32_ICU_TIM8_IRQ_PRIORITY));
+ clock = STM32_TIMCLK2;
+ }
+#endif
}
else {
/* Driver re-configuration scenario, it must be stopped first.*/
@@ -362,7 +405,6 @@ void icu_lld_stop(ICUDriver *icup) { RCC->APB2ENR &= ~RCC_APB2ENR_TIM1EN;
}
#endif
- }
#if STM32_ICU_USE_TIM2
if (&ICUD2 == icup) {
NVICDisableVector(TIM2_IRQn);
@@ -387,6 +429,13 @@ void icu_lld_stop(ICUDriver *icup) { RCC->APB1ENR &= ~RCC_APB1ENR_TIM5EN;
}
#endif
+ }
+#if STM32_ICU_USE_TIM8
+ if (&ICUD8 == icup) {
+ NVICDisableVector(TIM8_CC_IRQn);
+ RCC->APB2ENR &= ~RCC_APB2ENR_TIM8EN;
+ }
+#endif
}
/**
|