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authorbarthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>2012-01-03 16:57:22 +0000
committerbarthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>2012-01-03 16:57:22 +0000
commit9a5d5cc7f7daf6bbd754b81f24201148c2442fa6 (patch)
treea9d942f34da88215a3142459e520c6f8aabbf84a /os/hal/platforms/STM32/i2c_lld.h
parentc9b31ce7375f688d51e9c6fa1cac050648c761b5 (diff)
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I2C. Merged changes from files posted in forum.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3718 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/i2c_lld.h')
-rw-r--r--os/hal/platforms/STM32/i2c_lld.h220
1 files changed, 115 insertions, 105 deletions
diff --git a/os/hal/platforms/STM32/i2c_lld.h b/os/hal/platforms/STM32/i2c_lld.h
index 75c877a3a..264fb0f80 100644
--- a/os/hal/platforms/STM32/i2c_lld.h
+++ b/os/hal/platforms/STM32/i2c_lld.h
@@ -19,8 +19,9 @@
*/
/**
- * @file STM32/i2c_lld.h
- * @brief STM32 I2C subsystem low level driver header.
+ * @file STM32/i2c_lld.h
+ * @brief STM32 I2C subsystem low level driver header.
+ *
* @addtogroup I2C
* @{
*/
@@ -34,6 +35,11 @@
/* Driver constants. */
/*===========================================================================*/
+/**
+ * @brief Peripheral clock frequency.
+ */
+#define I2C_CLK_FREQ ((STM32_PCLK1) / 1000000)
+
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
@@ -42,56 +48,52 @@
* @name Configuration options
* @{
*/
-
/**
- * @brief I2C1 driver enable switch.
+ * @brief I2C1 driver enable switch.
* @details If set to @p TRUE the support for I2C1 is included.
- * @note The default is @p FALSE.
+ * @note The default is @p FALSE.
*/
#if !defined(STM32_I2C_USE_I2C1) || defined(__DOXYGEN__)
#define STM32_I2C_USE_I2C1 FALSE
#endif
/**
- * @brief I2C2 driver enable switch.
+ * @brief I2C2 driver enable switch.
* @details If set to @p TRUE the support for I2C2 is included.
- * @note The default is @p FALSE.
+ * @note The default is @p FALSE.
*/
#if !defined(STM32_I2C_USE_I2C2) || defined(__DOXYGEN__)
#define STM32_I2C_USE_I2C2 FALSE
#endif
/**
- * @brief I2C3 driver enable switch.
+ * @brief I2C3 driver enable switch.
* @details If set to @p TRUE the support for I2C3 is included.
- * @note The default is @p FALSE.
+ * @note The default is @p FALSE.
*/
#if !defined(STM32_I2C_USE_I2C3) || defined(__DOXYGEN__)
#define STM32_I2C_USE_I2C3 FALSE
#endif
/**
- * @brief I2C1 interrupt priority level setting.
- * @note @p BASEPRI_KERNEL >= @p STM32_I2C_I2C1_IRQ_PRIORITY > @p PRIORITY_PENDSV.
+ * @brief I2C1 interrupt priority level setting.
*/
#if !defined(STM32_I2C_I2C1_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_I2C_I2C1_IRQ_PRIORITY 0xA0
+#define STM32_I2C_I2C1_IRQ_PRIORITY 10
#endif
/**
- * @brief I2C2 interrupt priority level setting.
- * @note @p BASEPRI_KERNEL >= @p STM32_I2C_I2C2_IRQ_PRIORITY > @p PRIORITY_PENDSV.
+ * @brief I2C2 interrupt priority level setting.
*/
#if !defined(STM32_I2C_I2C2_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_I2C_I2C2_IRQ_PRIORITY 0xA0
+#define STM32_I2C_I2C2_IRQ_PRIORITY 10
#endif
/**
- * @brief I2C2 interrupt priority level setting.
- * @note @p BASEPRI_KERNEL >= @p STM32_I2C_I2C2_IRQ_PRIORITY > @p PRIORITY_PENDSV.
+ * @brief I2C3 interrupt priority level setting.
*/
#if !defined(STM32_I2C_I2C3_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_I2C_I2C3_IRQ_PRIORITY 0xA0
+#define STM32_I2C_I2C3_IRQ_PRIORITY 10
#endif
/**
@@ -100,7 +102,7 @@
* error can only happen because programming errors.
*/
#if !defined(STM32_I2C_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
-#define STM32_I2C_DMA_ERROR_HOOK(uartp) chSysHalt()
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt()
#endif
#if STM32_ADVANCED_DMA || defined(__DOXYGEN__)
@@ -163,25 +165,12 @@
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#endif /* !STM32_ADVANCED_DMA*/
-
-/**
- * @brief Peripheral clock frequency.
- */
-#define I2C_CLK_FREQ ((STM32_PCLK1) / 1000000)
-
/** @} */
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
-/** @brief flags for interrupt handling */
-#define I2C_EV5_MASTER_MODE_SELECT ((uint32_t)(((I2C_SR2_MSL | I2C_SR2_BUSY) << 16) | I2C_SR1_SB)) /* BUSY, MSL and SB flag */
-#define I2C_EV6_MASTER_TRA_MODE_SELECTED ((uint32_t)(((I2C_SR2_MSL|I2C_SR2_BUSY|I2C_SR2_TRA)<< 16)|I2C_SR1_ADDR|I2C_SR1_TXE)) /* BUSY, MSL, ADDR, TXE and TRA flags */
-#define I2C_EV6_MASTER_REC_MODE_SELECTED ((uint32_t)(((I2C_SR2_MSL|I2C_SR2_BUSY)<< 16)|I2C_SR1_ADDR)) /* BUSY, MSL and ADDR flags */
-#define I2C_EV8_2_MASTER_BYTE_TRANSMITTED ((uint32_t)(((I2C_SR2_MSL | I2C_SR2_BUSY | I2C_SR2_TRA) << 16) | I2C_SR1_BTF | I2C_SR1_TXE)) /* TRA, BUSY, MSL, TXE and BTF flags */
-#define I2C_EV_MASK 0x00FFFFFF /* First byte zeroed because there is no need of PEC register part from SR2 */
-
/** @brief error checks */
#if STM32_I2C_USE_I2C1 && !STM32_HAS_I2C1
#error "I2C1 not present in the selected device"
@@ -195,43 +184,43 @@
#error "I2C3 not present in the selected device"
#endif
-#if !STM32_I2C_USE_I2C1 && !STM32_I2C_USE_I2C2 && \
+#if !STM32_I2C_USE_I2C1 && !STM32_I2C_USE_I2C2 && \
!STM32_I2C_USE_I2C3
#error "I2C driver activated but no I2C peripheral assigned"
#endif
-#if STM32_I2C_USE_I2C1 && \
- !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C1_RX_DMA_STREAM, \
+#if STM32_I2C_USE_I2C1 && \
+ !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C1_RX_DMA_STREAM, \
STM32_I2C1_RX_DMA_MSK)
#error "invalid DMA stream associated to I2C1 RX"
#endif
-#if STM32_I2C_USE_I2C1 && \
- !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C1_TX_DMA_STREAM, \
+#if STM32_I2C_USE_I2C1 && \
+ !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C1_TX_DMA_STREAM, \
STM32_I2C1_TX_DMA_MSK)
#error "invalid DMA stream associated to I2C1 TX"
#endif
-#if STM32_I2C_USE_I2C2 && \
- !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C2_RX_DMA_STREAM, \
+#if STM32_I2C_USE_I2C2 && \
+ !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C2_RX_DMA_STREAM, \
STM32_I2C2_RX_DMA_MSK)
#error "invalid DMA stream associated to I2C2 RX"
#endif
-#if STM32_I2C_USE_I2C2 && \
- !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C2_TX_DMA_STREAM, \
+#if STM32_I2C_USE_I2C2 && \
+ !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C2_TX_DMA_STREAM, \
STM32_I2C2_TX_DMA_MSK)
#error "invalid DMA stream associated to I2C2 TX"
#endif
-#if STM32_I2C_USE_I2C3 && \
- !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C3_RX_DMA_STREAM, \
+#if STM32_I2C_USE_I2C3 && \
+ !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C3_RX_DMA_STREAM, \
STM32_I2C3_RX_DMA_MSK)
#error "invalid DMA stream associated to I2C3 RX"
#endif
-#if STM32_I2C_USE_I2C3 && \
- !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C3_TX_DMA_STREAM, \
+#if STM32_I2C_USE_I2C3 && \
+ !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C3_TX_DMA_STREAM, \
STM32_I2C3_TX_DMA_MSK)
#error "invalid DMA stream associated to I2C3 TX"
#endif
@@ -241,29 +230,33 @@
#endif
/* Check clock range. */
-#if defined(STM32F4XX)
- #if (!(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 42))
- #error "Peripheral clock freq. out of range."
- #endif
+#if defined(STM32F4XX)
+#if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 42)
+#error "I2C peripheral clock frequency out of range."
+#endif
+
#elif defined(STM32L1XX_MD)
- #if (!(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 32))
- #error "Peripheral clock freq. out of range."
- #endif
+#if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 32)
+#error "I2C peripheral clock frequency out of range."
+#endif
+
#elif defined(STM32F2XX)
- #if (!(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 30))
- #error "Peripheral clock freq. out of range."
- #endif
-#elif defined(STM32F10X_LD_VL) || defined(STM32F10X_MD_VL) || \
+#if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 30)
+#error "I2C peripheral clock frequency out of range."
+#endif
+
+#elif defined(STM32F10X_LD_VL) || defined(STM32F10X_MD_VL) || \
defined(STM32F10X_HD_VL)
- #if (!(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 24))
- #error "Peripheral clock freq. out of range."
- #endif
-#elif defined(STM32F10X_LD) || defined(STM32F10X_MD) || \
- defined(STM32F10X_HD) || defined(STM32F10X_XL) || \
+#if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 24)
+#error "I2C peripheral clock frequency out of range."
+#endif
+
+#elif defined(STM32F10X_LD) || defined(STM32F10X_MD) || \
+ defined(STM32F10X_HD) || defined(STM32F10X_XL) || \
defined(STM32F10X_CL)
- #if (!(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 36))
- #error "Peripheral clock freq. out of range."
- #endif
+#if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 36)
+#error "I2C peripheral clock frequency out of range."
+#endif
#else
#error "unspecified, unsupported or invalid STM32 platform"
#endif
@@ -282,12 +275,18 @@ typedef uint16_t i2caddr_t;
*/
typedef uint32_t i2cflags_t;
+/**
+ * @brief Supported modes for the I2C bus.
+ */
typedef enum {
OPMODE_I2C = 1,
OPMODE_SMBUS_DEVICE = 2,
OPMODE_SMBUS_HOST = 3,
} i2copmode_t;
+/**
+ * @brief Supported duty cycle modes for the I2C bus.
+ */
typedef enum {
STD_DUTY_CYCLE = 1,
FAST_DUTY_CYCLE_2 = 2,
@@ -298,12 +297,14 @@ typedef enum {
* @brief Driver configuration structure.
*/
typedef struct {
- i2copmode_t op_mode; /**< @brief Specifies the I2C mode.*/
- uint32_t clock_speed; /**< @brief Specifies the clock frequency. Must be set to a value lower than 400kHz */
- i2cdutycycle_t duty_cycle; /**< @brief Specifies the I2C fast mode duty cycle */
+ i2copmode_t op_mode; /**< @brief Specifies the I2C mode. */
+ uint32_t clock_speed; /**< @brief Specifies the clock frequency.
+ @note Must be set to a value lower
+ than 400kHz. */
+ i2cdutycycle_t duty_cycle; /**< @brief Specifies the I2C fast mode
+ duty cycle. */
} I2CConfig;
-
/**
* @brief Type of a structure representing an I2C driver.
*/
@@ -314,49 +315,62 @@ typedef struct I2CDriver I2CDriver;
*/
struct I2CDriver{
/**
- * @brief Driver state.
+ * @brief Driver state.
*/
i2cstate_t state;
-
/**
- * @brief Thread waiting for I/O completion.
+ * @brief Current configuration data.
*/
- Thread *thread;
-
+ const I2CConfig *config;
+ /**
+ * @brief Error flags.
+ */
+ i2cflags_t errors;
#if I2C_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
#if CH_USE_MUTEXES || defined(__DOXYGEN__)
/**
- * @brief Mutex protecting the bus.
+ * @brief Mutex protecting the bus.
*/
Mutex mutex;
#elif CH_USE_SEMAPHORES
Semaphore semaphore;
#endif
#endif /* I2C_USE_MUTUAL_EXCLUSION */
-
+ /* End of the mandatory fields.*/
/**
- * @brief Current configuration data.
+ * @brief Thread waiting for I/O completion.
*/
- const I2CConfig *config;
-
- size_t txbytes; /*!< @brief Number of bytes to be transmitted. */
- size_t rxbytes; /*!< @brief Number of bytes to be received. */
- uint8_t *rxbuf; /*!< @brief Pointer to receive buffer. */
-
- i2cflags_t errors; /*!< @brief Error flags.*/
-
- i2caddr_t slave_addr; /*!< @brief Current slave address without R/W bit. */
-
- /*********** End of the mandatory fields. **********************************/
-
- uint32_t dmamode; /*!< @brief DMA mode bit mask.*/
- const stm32_dma_stream_t *dmarx; /*!< @brief Receive DMA channel.*/
- const stm32_dma_stream_t *dmatx; /*!< @brief Transmit DMA channel.*/
-
- I2C_TypeDef *i2c; /*!< @brief Pointer to the I2Cx registers block. */
+ Thread *thread;
+ /**
+ * @brief Number of bytes to receive in the receive phase.
+ */
+ size_t rxbytes;
+ /**
+ * @brief Pointer to receive buffer.
+ */
+ uint8_t *rxbuf;
+ /**
+ * @brief Current slave address without R/W bit.
+ */
+ i2caddr_t addr;
+ /**
+ * @brief DMA mode bit mask.
+ */
+ uint32_t dmamode;
+ /**
+ * @brief Receive DMA channel.
+ */
+ const stm32_dma_stream_t *dmarx;
+ /**
+ * @brief Transmit DMA channel.
+ */
+ const stm32_dma_stream_t *dmatx;
+ /**
+ * @brief Pointer to the I2Cx registers block.
+ */
+ I2C_TypeDef *i2c;
};
-
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
@@ -450,7 +464,7 @@ struct I2CDriver{
/* External declarations. */
/*===========================================================================*/
-/** @cond never*/
+#if !defined(__DOXYGEN__)
#if STM32_I2C_USE_I2C1
extern I2CDriver I2CD1;
#endif
@@ -462,30 +476,26 @@ extern I2CDriver I2CD2;
#if STM32_I2C_USE_I2C3
extern I2CDriver I2CD3;
#endif
+#endif
#ifdef __cplusplus
extern "C" {
#endif
-
void i2c_lld_init(void);
void i2c_lld_reset(I2CDriver *i2cp);
void i2c_lld_start(I2CDriver *i2cp);
void i2c_lld_stop(I2CDriver *i2cp);
-msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, uint8_t slave_addr,
+msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr,
const uint8_t *txbuf, size_t txbytes,
uint8_t *rxbuf, size_t rxbytes,
systime_t timeout);
-msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp,
- uint8_t slave_addr,
- uint8_t *rxbuf,
- size_t rxbytes,
- systime_t timeout);
-
+msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr,
+ uint8_t *rxbuf, size_t rxbytes,
+ systime_t timeout);
#ifdef __cplusplus
}
#endif
-/** @endcond*/
-#endif /* CH_HAL_USE_I2C */
+#endif /* HAL_USE_I2C */
#endif /* _I2C_LLD_H_ */