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authorbarthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-06-23 18:50:13 +0000
committerbarthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-06-23 18:50:13 +0000
commit97e643a2a2086bf8d52c77d599748849ff6a8148 (patch)
treeaedb080275694db8f9cd34374623ebac30d2a2ec /os/hal/platforms/STM32/i2c_lld.h
parent2f77482083766da5b081e3f7bd07924db88ee024 (diff)
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I2C. Commetns style changed to /**/.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3073 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/i2c_lld.h')
-rw-r--r--os/hal/platforms/STM32/i2c_lld.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/os/hal/platforms/STM32/i2c_lld.h b/os/hal/platforms/STM32/i2c_lld.h
index 7083bf562..d0c1415c4 100644
--- a/os/hal/platforms/STM32/i2c_lld.h
+++ b/os/hal/platforms/STM32/i2c_lld.h
@@ -72,9 +72,9 @@
#define I2C_EV9_MASTER_ADDR_10BIT ((uint32_t)(((I2C_SR2_MSL|I2C_SR2_BUSY)<< 16)|I2C_SR1_ADD10)) /* BUSY, MSL and ADD10 flags */
#define I2C_EV_MASK 0x00FFFFFF
-#define I2C_FLG_1BTR 0x01 // Single byte to be received and processed
-#define I2C_FLG_2BTR 0x02 // Two bytes to be received and processed
-#define I2C_FLG_3BTR 0x04 // Last three received bytes to be processed
+#define I2C_FLG_1BTR 0x01 /* Single byte to be received and processed */
+#define I2C_FLG_2BTR 0x02 /* Two bytes to be received and processed */
+#define I2C_FLG_3BTR 0x04 /* Last three received bytes to be processed */
#define I2C_FLG_MASTER_RECEIVER 0x10
#define I2C_FLG_HEADER_SENT 0x80
@@ -235,6 +235,6 @@ void i2c_lld_master_receive(I2CDriver *i2cp, uint16_t slave_addr, size_t rxbytes
#endif
/** @endcond*/
-#endif // CH_HAL_USE_I2C
+#endif /* CH_HAL_USE_I2C */
-#endif // _I2C_LLD_H_
+#endif /* _I2C_LLD_H_ */