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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2010-05-14 06:43:02 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2010-05-14 06:43:02 +0000
commit55b7744199ce9771ac761fc708d173bc487145e8 (patch)
tree3b7a61cd3019849544e2bbe25ace9ff658a75e75 /os/hal/platforms/STM32/hal_lld_F10x.h
parentfee72530476c5b9eed43fde792df9de367d56800 (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1916 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/hal_lld_F10x.h')
-rw-r--r--os/hal/platforms/STM32/hal_lld_F10x.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/os/hal/platforms/STM32/hal_lld_F10x.h b/os/hal/platforms/STM32/hal_lld_F10x.h
index 67876e6b2..8e9063e64 100644
--- a/os/hal/platforms/STM32/hal_lld_F10x.h
+++ b/os/hal/platforms/STM32/hal_lld_F10x.h
@@ -73,6 +73,12 @@
#define STM32_PLLXTPRE_DIV1 (0 << 17) /**< HSE divided by 1. */
#define STM32_PLLXTPRE_DIV2 (1 << 17) /**< HSE divided by 2. */
+#define STM32_MCO_NOCLOCK (0 << 24) /**< No clock on MCO pin. */
+#define STM32_MCO_SYSCLK (4 << 24) /**< SYSCLK on MCO pin. */
+#define STM32_MCO_HSI (5 << 24) /**< HSI clock on MCO pin. */
+#define STM32_MCO_HSE (6 << 24) /**< HSE clock on MCO pin. */
+#define STM32_MCO_PLLDIV2 (7 << 24) /**< PLL/2 clock on MCO pin. */
+
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
@@ -150,6 +156,13 @@
#define STM32_ADCPRE STM32_ADCPRE_DIV4
#endif
+/**
+ * @brief MCO pin setting.
+ */
+#if !defined(STM32_MCO) || defined(__DOXYGEN__)
+#define STM32_MCO STM32_MCO_NOCLOCK
+#endif
+
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/