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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2009-11-30 21:34:05 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2009-11-30 21:34:05 +0000
commit8a433087afe80e92aea1c558965994b53bfcfb48 (patch)
tree6d57405dddc07daa8ef7995d8898dbd7256a5258 /os/hal/platforms/STM32/can_lld.h
parent770c4873d20623f6d4f678d62b67eb6218e259bf (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1368 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/can_lld.h')
-rw-r--r--os/hal/platforms/STM32/can_lld.h63
1 files changed, 53 insertions, 10 deletions
diff --git a/os/hal/platforms/STM32/can_lld.h b/os/hal/platforms/STM32/can_lld.h
index 6b7cf3b6c..a02ce15fc 100644
--- a/os/hal/platforms/STM32/can_lld.h
+++ b/os/hal/platforms/STM32/can_lld.h
@@ -40,6 +40,15 @@
/*===========================================================================*/
/**
+ * @brief ADC1 driver enable switch.
+ * @details If set to @p TRUE the support for ADC1 is included.
+ * @note The default is @p TRUE.
+ */
+#if !defined(USE_STM32_CAN1) || defined(__DOXYGEN__)
+#define USE_STM32_CAN1 TRUE
+#endif
+
+/**
* @brief Sleep mode related APIs inclusion switch.
* @note This switch is enforced to @p FALSE if the driver implementation
* does not support the sleep mode.
@@ -61,6 +70,11 @@
/*===========================================================================*/
/**
+ * @brief CAN status flags.
+ */
+typedef uint32_t canstatus_t;
+
+/**
* @brief CAN frame.
* @note Accessing the frame data as word16 or word32 is not portable because
* machine data endianness, it can be still useful for a quick filling.
@@ -79,9 +93,20 @@ typedef struct {
/**
* @brief Driver configuration structure.
- * @note It could be empty on some architectures.
*/
typedef struct {
+ /**
+ * @brief CAN MCR register initialization data.
+ * @note Some bits in this register are enforced by the driver regardless
+ * their status in this field.
+ */
+ uint32_t cc_mcr;
+ /**
+ * @brief CAN BTR register initialization data.
+ * @note Some bits in this register are enforced by the driver regardless
+ * their status in this field.
+ */
+ uint32_t cc_btr;
} CANConfig;
/**
@@ -91,44 +116,61 @@ typedef struct {
/**
* @brief Driver state.
*/
- canstate_t can_state;
+ canstate_t cd_state;
/**
* @brief Current configuration data.
*/
- const CANConfig *can_config;
+ const CANConfig *cd_config;
/**
* @brief Transmission queue semaphore.
*/
- Semaphore can_txsem;
+ Semaphore cd_txsem;
/**
* @brief Receive queue semaphore.
*/
- Semaphore can_rxsem;
+ Semaphore cd_rxsem;
/**
* @brief One or more frames become available.
*/
- EventSource can_rxfull_event;
+ EventSource cd_rxfull_event;
+ /**
+ * @brief One or more transmission slots become available.
+ */
+ EventSource cd_txempty_event;
+ /**
+ * @brief A CAN bus error happened.
+ */
+ EventSource cd_error_event;
/**
- * @brief One or more transmission slots become available.
+ * @brief Error flags set when an error event is broadcasted.
*/
- EventSource can_txempty_event;
+ canstatus_t cd_status;
#if CAN_USE_SLEEP_MODE || defined (__DOXYGEN__)
/**
* @brief Entering sleep state event.
*/
- EventSource can_sleep_event;
+ EventSource cd_sleep_event;
/**
* @brief Exiting sleep state event.
*/
- EventSource can_wakeup_event;
+ EventSource cd_wakeup_event;
#endif /* CAN_USE_SLEEP_MODE */
/* End of the mandatory fields.*/
+ /**
+ * @brief Pointer to the CAN registers.
+ */
+ CAN_TypeDef *cd_canp;
} CANDriver;
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
+/** @cond never*/
+#if USE_STM32_CAN1
+extern CANDriver CAND1;
+#endif
+
#ifdef __cplusplus
extern "C" {
#endif
@@ -146,6 +188,7 @@ extern "C" {
#ifdef __cplusplus
}
#endif
+/** @endcond*/
#endif /* CH_HAL_USE_CAN */