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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-08-08 07:57:28 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-08-08 07:57:28 +0000 |
| commit | a2cfd2054ad5da4dbf8b583a7eaf164d9dac6006 (patch) | |
| tree | fcc2f570a92b65a714b7ca3b38ab700918aeb816 /os/hal/platforms/STM32/can_lld.c | |
| parent | bb27a7d32a5b35a41f6e736540a689fd30d0854c (diff) | |
| download | ChibiOS-a2cfd2054ad5da4dbf8b583a7eaf164d9dac6006.tar.gz ChibiOS-a2cfd2054ad5da4dbf8b583a7eaf164d9dac6006.tar.bz2 ChibiOS-a2cfd2054ad5da4dbf8b583a7eaf164d9dac6006.zip | |
Fixed bug 3041414. Various improvements to the STM32 HAL.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2119 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/can_lld.c')
| -rw-r--r-- | os/hal/platforms/STM32/can_lld.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/os/hal/platforms/STM32/can_lld.c b/os/hal/platforms/STM32/can_lld.c index 6e20d856e..7b390bb7e 100644 --- a/os/hal/platforms/STM32/can_lld.c +++ b/os/hal/platforms/STM32/can_lld.c @@ -35,7 +35,7 @@ /*===========================================================================*/
/** @brief ADC1 driver identifier.*/
-#if USE_STM32_CAN1 || defined(__DOXYGEN__)
+#if STM32_CAN_USE_CAN1 || defined(__DOXYGEN__)
CANDriver CAND1;
#endif
@@ -154,7 +154,7 @@ CH_IRQ_HANDLER(CAN1_SCE_IRQHandler) { */
void can_lld_init(void) {
-#if USE_STM32_CAN1
+#if STM32_CAN_USE_CAN1
/* CAN reset, ensures reset state in order to avoid trouble with JTAGs.*/
RCC->APB1RSTR = RCC_APB1RSTR_CAN1RST;
RCC->APB1RSTR = 0;
@@ -173,16 +173,16 @@ void can_lld_init(void) { void can_lld_start(CANDriver *canp) {
/* Clock activation.*/
-#if USE_STM32_CAN1
+#if STM32_CAN_USE_CAN1
if (&CAND1 == canp) {
NVICEnableVector(USB_HP_CAN1_TX_IRQn,
- CORTEX_PRIORITY_MASK(STM32_CAN1_IRQ_PRIORITY));
+ CORTEX_PRIORITY_MASK(STM32_CAN_CAN1_IRQ_PRIORITY));
NVICEnableVector(USB_LP_CAN1_RX0_IRQn,
- CORTEX_PRIORITY_MASK(STM32_CAN1_IRQ_PRIORITY));
+ CORTEX_PRIORITY_MASK(STM32_CAN_CAN1_IRQ_PRIORITY));
NVICEnableVector(CAN1_RX1_IRQn,
- CORTEX_PRIORITY_MASK(STM32_CAN1_IRQ_PRIORITY));
+ CORTEX_PRIORITY_MASK(STM32_CAN_CAN1_IRQ_PRIORITY));
NVICEnableVector(CAN1_SCE_IRQn,
- CORTEX_PRIORITY_MASK(STM32_CAN1_IRQ_PRIORITY));
+ CORTEX_PRIORITY_MASK(STM32_CAN_CAN1_IRQ_PRIORITY));
RCC->APB1ENR |= RCC_APB1ENR_CAN1EN;
}
#endif
@@ -258,7 +258,7 @@ void can_lld_stop(CANDriver *canp) { /* If in ready state then disables the CAN peripheral.*/
if (canp->cd_state == CAN_READY) {
-#if USE_STM32_CAN1
+#if STM32_CAN_USE_CAN1
if (&CAND1 == canp) {
CAN1->MCR = 0x00010002; /* Register reset value. */
CAN1->IER = 0x00000000; /* All sources disabled. */
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