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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-11-23 16:16:53 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-11-23 16:16:53 +0000 |
commit | a5bdf86e5b89a7abb281ac5514c7d6cb4d64c365 (patch) | |
tree | df5b738ab072ac68f42a769032d37278b43b4677 /os/hal/platforms/STM32/adc_lld.h | |
parent | 64c9d79b312dd40757cbcb66003c10690f415079 (diff) | |
download | ChibiOS-a5bdf86e5b89a7abb281ac5514c7d6cb4d64c365.tar.gz ChibiOS-a5bdf86e5b89a7abb281ac5514c7d6cb4d64c365.tar.bz2 ChibiOS-a5bdf86e5b89a7abb281ac5514c7d6cb4d64c365.zip |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2424 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/adc_lld.h')
-rw-r--r-- | os/hal/platforms/STM32/adc_lld.h | 113 |
1 files changed, 77 insertions, 36 deletions
diff --git a/os/hal/platforms/STM32/adc_lld.h b/os/hal/platforms/STM32/adc_lld.h index aa62ca514..c6ba26c05 100644 --- a/os/hal/platforms/STM32/adc_lld.h +++ b/os/hal/platforms/STM32/adc_lld.h @@ -56,6 +56,15 @@ #define ADC_CHANNEL_SENSOR 16 /**< @brief Internal temperature sensor.*/
#define ADC_CHANNEL_VREFINT 17 /**< @brief Internal reference. */
+#define ADC_SAMPLE_1P5 0 /**< @brief 1.5 cycles sampling time. */
+#define ADC_SAMPLE_7P5 1 /**< @brief 7.5 cycles sampling time. */
+#define ADC_SAMPLE_13P5 2 /**< @brief 13.5 cycles sampling time. */
+#define ADC_SAMPLE_28P5 3 /**< @brief 28.5 cycles sampling time. */
+#define ADC_SAMPLE_41P5 4 /**< @brief 41.5 cycles sampling time. */
+#define ADC_SAMPLE_55P5 5 /**< @brief 55.5 cycles sampling time. */
+#define ADC_SAMPLE_71P5 6 /**< @brief 71.5 cycles sampling time. */
+#define ADC_SAMPLE_239P5 7 /**< @brief 239.5 cycles sampling time. */
+
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
@@ -143,52 +152,59 @@ typedef void (*adccallback_t)(ADCDriver *adcp, adcsample_t *buffer, size_t n); */
typedef struct {
/**
- * @brief Enables the circular buffer mode for the group.
+ * @brief Enables the circular buffer mode for the group.
*/
bool_t acg_circular;
/**
- * @brief Number of the analog channels belonging to the conversion group.
+ * @brief Number of the analog channels belonging to the conversion group.
*/
adc_channels_num_t acg_num_channels;
/**
- * @brief Callback function associated to the group or @p NULL.
- * @note In order to use synchronous functions this field must be set to
- * @p NULL, callbacks and synchronous operations are mutually
- * exclusive.
+ * @brief Callback function associated to the group or @p NULL.
+ * @note In order to use synchronous functions this field must be set to
+ * @p NULL, callbacks and synchronous operations are mutually
+ * exclusive.
*/
adccallback_t acg_endcb;
/* End of the mandatory fields.*/
/**
- * @brief ADC CR1 register initialization data.
- * @note All the required bits must be defined into this field except
- * @p ADC_CR1_SCAN that is enforced inside the driver.
+ * @brief ADC CR1 register initialization data.
+ * @note All the required bits must be defined into this field except
+ * @p ADC_CR1_SCAN that is enforced inside the driver.
*/
uint32_t acg_cr1;
/**
- * @brief ADC CR2 register initialization data.
- * @note All the required bits must be defined into this field except
- * @p ADC_CR2_DMA and @p ADC_CR2_ADON that are enforced inside the
- * driver.
+ * @brief ADC CR2 register initialization data.
+ * @note All the required bits must be defined into this field except
+ * @p ADC_CR2_DMA and @p ADC_CR2_ADON that are enforced inside the
+ * driver.
*/
uint32_t acg_cr2;
/**
- * @brief ADC SMPR1 register initialization data.
+ * @brief ADC SMPR1 register initialization data.
+ * @details In this field must be specified the sample times for channels
+ * 10...17.
*/
uint32_t acg_smpr1;
/**
- * @brief ADC SMPR2 register initialization data.
+ * @brief ADC SMPR2 register initialization data.
+ * @details In this field must be specified the sample times for channels
+ * 0...9.
*/
uint32_t acg_smpr2;
/**
- * @brief ADC SQR1 register initialization data.
+ * @brief ADC SQR1 register initialization data.
+ * @details Conversion group sequence 13...16 + sequence length.
*/
uint32_t acg_sqr1;
/**
- * @brief ADC SQR2 register initialization data.
+ * @brief ADC SQR2 register initialization data.
+ * @details Conversion group sequence 7...12.
*/
uint32_t acg_sqr2;
/**
- * @brief ADC SQR3 register initialization data.
+ * @brief ADC SQR3 register initialization data.
+ * @details Conversion group sequence 0...6.
*/
uint32_t acg_sqr3;
} ADCConversionGroup;
@@ -262,26 +278,51 @@ struct ADCDriver { /* Driver macros. */
/*===========================================================================*/
+/**
+ * @brief Number of channels in a conversion sequence.
+ */
#define ADC_SQR1_NUM_CH(n) (((n) - 1) << 20)
-#define ADC_SQR3_SQ0_N(n) ((n) << 0)
-#define ADC_SQR3_SQ1_N(n) ((n) << 5)
-#define ADC_SQR3_SQ2_N(n) ((n) << 10)
-#define ADC_SQR3_SQ3_N(n) ((n) << 15)
-#define ADC_SQR3_SQ4_N(n) ((n) << 20)
-#define ADC_SQR3_SQ5_N(n) ((n) << 25)
-
-#define ADC_SQR2_SQ6_N(n) ((n) << 0)
-#define ADC_SQR2_SQ7_N(n) ((n) << 5)
-#define ADC_SQR2_SQ8_N(n) ((n) << 10)
-#define ADC_SQR2_SQ9_N(n) ((n) << 15)
-#define ADC_SQR2_SQ10_N(n) ((n) << 20)
-#define ADC_SQR2_SQ11_N(n) ((n) << 25)
-
-#define ADC_SQR1_SQ13_N(n) ((n) << 0)
-#define ADC_SQR1_SQ14_N(n) ((n) << 5)
-#define ADC_SQR1_SQ15_N(n) ((n) << 10)
-#define ADC_SQR1_SQ16_N(n) ((n) << 15)
+#define ADC_SQR3_SQ0_N(n) ((n) << 0) /**< @brief 1st channel in seq. */
+#define ADC_SQR3_SQ1_N(n) ((n) << 5) /**< @brief 2nd channel in seq. */
+#define ADC_SQR3_SQ2_N(n) ((n) << 10) /**< @brief 3rd channel in seq. */
+#define ADC_SQR3_SQ3_N(n) ((n) << 15) /**< @brief 4th channel in seq. */
+#define ADC_SQR3_SQ4_N(n) ((n) << 20) /**< @brief 5th channel in seq. */
+#define ADC_SQR3_SQ5_N(n) ((n) << 25) /**< @brief 6th channel in seq. */
+
+#define ADC_SQR2_SQ6_N(n) ((n) << 0) /**< @brief 7th channel in seq. */
+#define ADC_SQR2_SQ7_N(n) ((n) << 5) /**< @brief 8th channel in seq. */
+#define ADC_SQR2_SQ8_N(n) ((n) << 10) /**< @brief 9th channel in seq. */
+#define ADC_SQR2_SQ9_N(n) ((n) << 15) /**< @brief 10th channel in seq.*/
+#define ADC_SQR2_SQ10_N(n) ((n) << 20) /**< @brief 11th channel in seq.*/
+#define ADC_SQR2_SQ11_N(n) ((n) << 25) /**< @brief 12th channel in seq.*/
+
+#define ADC_SQR1_SQ13_N(n) ((n) << 0) /**< @brief 13th channel in seq.*/
+#define ADC_SQR1_SQ14_N(n) ((n) << 5) /**< @brief 14th channel in seq.*/
+#define ADC_SQR1_SQ15_N(n) ((n) << 10) /**< @brief 15th channel in seq.*/
+#define ADC_SQR1_SQ16_N(n) ((n) << 15) /**< @brief 16th channel in seq.*/
+
+#define ADC_SMPR2_SMP_AN0(n) ((n) << 0) /**< @brief AN0 sampling time. */
+#define ADC_SMPR2_SMP_AN1(n) ((n) << 3) /**< @brief AN1 sampling time. */
+#define ADC_SMPR2_SMP_AN2(n) ((n) << 6) /**< @brief AN2 sampling time. */
+#define ADC_SMPR2_SMP_AN3(n) ((n) << 9) /**< @brief AN3 sampling time. */
+#define ADC_SMPR2_SMP_AN4(n) ((n) << 12) /**< @brief AN4 sampling time. */
+#define ADC_SMPR2_SMP_AN5(n) ((n) << 15) /**< @brief AN5 sampling time. */
+#define ADC_SMPR2_SMP_AN6(n) ((n) << 18) /**< @brief AN6 sampling time. */
+#define ADC_SMPR2_SMP_AN7(n) ((n) << 21) /**< @brief AN7 sampling time. */
+#define ADC_SMPR2_SMP_AN8(n) ((n) << 24) /**< @brief AN8 sampling time. */
+#define ADC_SMPR2_SMP_AN9(n) ((n) << 27) /**< @brief AN9 sampling time. */
+
+#define ADC_SMPR1_SMP_AN10(n) ((n) << 0) /**< @brief AN10 sampling time. */
+#define ADC_SMPR1_SMP_AN11(n) ((n) << 3) /**< @brief AN11 sampling time. */
+#define ADC_SMPR1_SMP_AN12(n) ((n) << 6) /**< @brief AN12 sampling time. */
+#define ADC_SMPR1_SMP_AN13(n) ((n) << 9) /**< @brief AN13 sampling time. */
+#define ADC_SMPR1_SMP_AN14(n) ((n) << 12) /**< @brief AN14 sampling time. */
+#define ADC_SMPR1_SMP_AN15(n) ((n) << 15) /**< @brief AN15 sampling time. */
+#define ADC_SMPR1_SMP_SENSOR(n) ((n) << 18) /**< @brief Temperature Sensor
+ sampling time. */
+#define ADC_SMPR1_SMP_VREF(n) ((n) << 21) /**< @brief Voltage Reference
+ sampling time. */
/*===========================================================================*/
/* External declarations. */
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