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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-10-01 08:04:14 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-10-01 08:04:14 +0000
commit2950a0a7b8316a742a7a67b5acb4f224a98397ff (patch)
treef3c81f2ad4202021f05d419d44f3876d9be01950 /os/hal/platforms/STM32/RTCv1/rtc_lld.c
parentd2fa0e3fdee679a6cdd5dd6616aca527eca3f080 (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3413 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/RTCv1/rtc_lld.c')
-rw-r--r--os/hal/platforms/STM32/RTCv1/rtc_lld.c333
1 files changed, 159 insertions, 174 deletions
diff --git a/os/hal/platforms/STM32/RTCv1/rtc_lld.c b/os/hal/platforms/STM32/RTCv1/rtc_lld.c
index df90bcc11..2876b990d 100644
--- a/os/hal/platforms/STM32/RTCv1/rtc_lld.c
+++ b/os/hal/platforms/STM32/RTCv1/rtc_lld.c
@@ -29,16 +29,16 @@
#include "ch.h"
#include "hal.h"
-
#if HAL_USE_RTC || defined(__DOXYGEN__)
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
-/** @brief RTC driver identifier.*/
-RTCDriver RTCD;
-
+/**
+ * @brief RTC driver identifier.
+ */
+RTCDriver RTCD1;
/*===========================================================================*/
/* Driver local variables. */
@@ -55,33 +55,37 @@ RTCDriver RTCD;
*
* @notapi
*/
-#if RTC_SUPPORTS_CALLBACKS
+static void rtc_lld_serve_interrupt(RTCDriver *rtcp) {
-static void rtc_lld_serve_interrupt(RTCDriver *rtcp){
chSysLockFromIsr();
- if ((RTC->CRH & RTC_CRH_SECIE) && \
- (RTC->CRL & RTC_CRL_SECF) && \
- (rtcp->second_cb != NULL)){
- rtcp->second_cb(rtcp);
+ if ((RTC->CRH & RTC_CRH_SECIE) && (RTC->CRL & RTC_CRL_SECF)) {
+ rtcp->rtc_cb(rtcp, RTC_EVENT_SECOND);
RTC->CRL &= ~RTC_CRL_SECF;
}
- if ((RTC->CRH & RTC_CRH_ALRIE) && \
- (RTC->CRL & RTC_CRL_ALRF) && \
- (rtcp->alarm_cb != NULL)){
- rtcp->alarm_cb(rtcp);
+ if ((RTC->CRH & RTC_CRH_ALRIE) && (RTC->CRL & RTC_CRL_ALRF)) {
+ rtcp->rtc_cb(rtcp, RTC_EVENT_ALARM);
RTC->CRL &= ~RTC_CRL_ALRF;
}
- if ((RTC->CRH & RTC_CRH_OWIE) && \
- (RTC->CRL & RTC_CRL_OWF) && \
- (rtcp->overflow_cb != NULL)){
- rtcp->overflow_cb(rtcp);
+ if ((RTC->CRH & RTC_CRH_OWIE) && (RTC->CRL & RTC_CRL_OWF)) {
+ rtcp->rtc_cb(rtcp, RTC_EVENT_OVERFLOW);
RTC->CRL &= ~RTC_CRL_OWF;
}
chSysUnlockFromIsr();
}
-#endif /* RTC_SUPPORTS_CALLBACKS */
+
+/**
+ * @brief Waits for the previous registers write to finish.
+ *
+ * @notapi
+ */
+static void rtc_lld_wait_write(void) {
+
+ /* Waits registers write completion.*/
+ while (!(RTC->CRL & RTC_CRL_RTOFF))
+ ;
+}
/*===========================================================================*/
/* Driver interrupt handlers. */
@@ -89,18 +93,18 @@ static void rtc_lld_serve_interrupt(RTCDriver *rtcp){
/**
* @brief RTC interrupt handler.
+ *
* @isr
*/
-#if RTC_SUPPORTS_CALLBACKS
-
CH_IRQ_HANDLER(RTC_IRQHandler) {
+
CH_IRQ_PROLOGUE();
- rtc_lld_serve_interrupt(&RTCD);
+
+ rtc_lld_serve_interrupt(&RTCD1);
+
CH_IRQ_EPILOGUE();
}
-#endif /* RTC_SUPPORTS_CALLBACKS */
-
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
@@ -108,226 +112,207 @@ CH_IRQ_HANDLER(RTC_IRQHandler) {
/**
* @brief Enable access to registers and initialize RTC if BKP domain
* was previously reseted.
- *
* @note: Cold start time of LSE oscillator on STM32 platform
* takes about 3 seconds.
*
* @notapi
*/
void rtc_lld_init(void){
- uint32_t preload = 0;
+ uint32_t preload;
rccEnableBKPInterface(FALSE);
- /* enable access to BKP registers */
+ /* Enables access to BKP registers.*/
PWR->CR |= PWR_CR_DBP;
- /* select clock source */
- RCC->BDCR |= STM32_RTC;
-#if STM32_RTC == STM32_RTC_LSE
- if (! ((RCC->BDCR & RCC_BDCR_RTCEN) || (RCC->BDCR & RCC_BDCR_LSEON))){
- RCC->BDCR |= RCC_BDCR_LSEON;
- while(!(RCC->BDCR & RCC_BDCR_LSERDY))
- ;
- RCC->BDCR |= RCC_BDCR_RTCEN;
- }
- preload = STM32_LSECLK - 1;
+ /* If the RTC is not enabled then performs a reset of the backup domain.*/
+ if (!(RCC->BDCR & RCC_BDCR_RTCEN)) {
+ RCC->BDCR = RCC_BDCR_BDRST;
+ RCC->BDCR = 0;
+ }
-#elif STM32_RTC == STM32_RTC_LSI
- RCC->CSR |= RCC_CSR_LSION;
- while(!(RCC->CSR & RCC_CSR_LSIRDY))
- ;
- /* According to errata sheet we must wait additional 100 uS for stabilization */
- uint32_t tmo = (STM32_SYSCLK / 1000000 ) * 100;
- while(tmo--)
+#if STM32_RTC == STM32_RTC_LSE
+ if (!(RCC->BDCR & RCC_BDCR_LSEON)) {
+ RCC->BDCR |= RCC_BDCR_LSEON;
+ while (!(RCC->BDCR & RCC_BDCR_LSERDY))
;
- RCC->BDCR |= RCC_BDCR_RTCEN;
- preload = STM32_LSICLK - 1;
-
+ }
+ preload = STM32_LSECLK - 1;
+#elif STM32_RTC == STM32_RTC_LSI
+ /* TODO: Move the LSI clock initialization in the HAL low level driver.*/
+ RCC->CSR |= RCC_CSR_LSION;
+ while (!(RCC->CSR & RCC_CSR_LSIRDY))
+ ;
+ /* According to errata sheet we must wait additional 100 uS for
+ stabilization.
+ TODO: Change this code, software loops are not reliable.*/
+ uint32_t tmo = (STM32_SYSCLK / 1000000) * 100;
+ while (tmo--)
+ ;
+ preload = STM32_LSICLK - 1;
#elif STM32_RTC == STM32_RTC_HSE
- preload = (STM32_HSICLK / 128) - 1;
-
-#else
-#error "RTC clock source not selected"
+ preload = (STM32_HSICLK / 128) - 1;
#endif
+ /* Selects clock source (previously enabled and stabilized.*/
+ RCC->BDCR = (RCC->BDCR & ~RCC_BDCR_RTCSEL) | STM32_RTC;
+
+ /* RTC enabled regardless its previous status.*/
+ RCC->BDCR |= RCC_BDCR_RTCEN;
+
/* Ensure that RTC_CNT and RTC_DIV contain actual values after enabling
- * clocking on APB1, because these values only update when APB1 functioning.*/
- RTC->CRL &= ~(RTC_CRL_RSF);
+ clocking on APB1, because these values only update when APB1
+ functioning.*/
+ RTC->CRL = 0;
while (!(RTC->CRL & RTC_CRL_RSF))
;
- /* Write preload register only if its value changed */
- if (preload != ((((uint32_t)(RTC->PRLH)) << 16) + RTC->PRLL)){
- while(!(RTC->CRL & RTC_CRL_RTOFF))
- ;
+ /* Write preload register only if its value differs.*/
+ if (preload != ((((uint32_t)(RTC->PRLH)) << 16) + (uint32_t)RTC->PRLL)) {
- RTC->CRL |= RTC_CRL_CNF; /* switch on configure mode */
- RTC->PRLH = (uint16_t)((preload >> 16) & 0b1111); /* write preloader */
- RTC->PRLL = (uint16_t)(preload & 0xFFFF);
- RTC->CRL &= ~RTC_CRL_CNF; /* switch off configure mode */
+ rtc_lld_wait_write();
- while(!(RTC->CRL & RTC_CRL_RTOFF)) /* wait for completion */
- ;
+ /* Enters configuration mode and writes PRLx registers then leaves the
+ configuration mode.*/
+ RTC->CRL |= RTC_CRL_CNF;
+ RTC->PRLH = (uint16_t)(preload >> 16);
+ RTC->PRLL = (uint16_t)(preload & 0xFFFF);
+ RTC->CRL &= ~RTC_CRL_CNF;
}
- /* disable all interrupts and clear all even flags just to be safe */
- RTC->CRH &= ~(RTC_CRH_OWIE | RTC_CRH_ALRIE | RTC_CRH_SECIE);
- RTC->CRL &= ~(RTC_CRL_SECF | RTC_CRL_ALRF | RTC_CRL_OWF);
+ /* All interrupts initially disabled.*/
+ RTC->CRH = 0;
-#if RTC_SUPPORTS_CALLBACKS
- RTCD.alarm_cb = NULL;
- RTCD.overflow_cb = NULL;
- RTCD.second_cb = NULL;
-#endif /* RTC_SUPPORTS_CALLBACKS */
+ /* Callback initially disabled.*/
+ RTCD1.rtc_cb = NULL;
}
/**
- * @brief Enables and disables callbacks on the fly.
+ * @brief Set current time.
+ * @note Fractional part will be silently ignored. There is no possibility
+ * to change it on STM32F1xx platform.
*
- * @details Pass callback function(s) in argument(s) to enable callback(s).
- * Pass NULL to disable callback.
- *
- * @pre To use this function you must set @p RTC_SUPPORTS_CALLBACKS
- * to @p TRUE.
- *
- * @param[in] rtcp pointer to RTC driver structure.
- * @param[in] overflowcb overflow callback function.
- * @param[in] secondcb every second callback function.
- * @param[in] alarmcb alarm callback function.
+ * @param[in] rtcp pointer to RTC driver structure
+ * @param[in] timespec pointer to a @p RTCTime structure
*
* @notapi
*/
-#if RTC_SUPPORTS_CALLBACKS
-void rtc_lld_set_callback(RTCDriver *rtcp, rtccb_t overflowcb,
- rtccb_t secondcb, rtccb_t alarmcb){
+void rtc_lld_set_time(RTCDriver *rtcp, const RTCTime *timespec) {
- uint16_t isr_flags = 0;
+ (void)rtcp;
- if (overflowcb != NULL){
- rtcp->overflow_cb = *overflowcb;
- isr_flags |= RTC_CRH_OWIE;
- }
- else{
- rtcp->overflow_cb = NULL;
- isr_flags &= ~RTC_CRH_OWIE;
- }
+ rtc_lld_wait_write();
- if (alarmcb != NULL){
- rtcp->alarm_cb = *alarmcb;
- isr_flags |= RTC_CRH_ALRIE;
- }
- else{
- rtcp->alarm_cb = NULL;
- isr_flags &= ~RTC_CRH_ALRIE;
- }
-
- if (secondcb != NULL){
- rtcp->second_cb = *secondcb;
- isr_flags |= RTC_CRH_SECIE;
- }
- else{
- rtcp->second_cb = NULL;
- isr_flags &= ~RTC_CRH_SECIE;
- }
-
- if(isr_flags != 0){
- NVICEnableVector(RTC_IRQn, CORTEX_PRIORITY_MASK(STM32_RTC_IRQ_PRIORITY));
- RTC->CRH |= isr_flags;
- }
- else{
- NVICDisableVector(RTC_IRQn);
- RTC->CRH = 0;
- }
+ RTC->CRL |= RTC_CRL_CNF;
+ RTC->CNTH = (uint16_t)(timespec->tv_sec >> 16);
+ RTC->CNTL = (uint16_t)(timespec->tv_sec & 0xFFFF);
+ RTC->CRL &= ~RTC_CRL_CNF;
}
-#endif /* RTC_SUPPORTS_CALLBACKS */
/**
- * @brief Set current time.
+ * @brief Get current time.
*
- * @param[in] timespec pointer to variable storing time.
+ * @param[in] rtcp pointer to RTC driver structure
+ * @param[out] timespec pointer to a @p RTCTime structure
*
- * @note Fractional part will be silently ignored. There is no possibility
- * to change it on STM32F1xx platform.
* @notapi
*/
-void rtc_lld_set_time(RTCDateTime *timespec){
+void rtc_lld_get_time(RTCDriver *rtcp, RTCTime *timespec) {
+ uint32_t time_frac;
- while(!(RTC->CRL & RTC_CRL_RTOFF))
- ;
+ (void)rtcp;
- RTC->CRL |= RTC_CRL_CNF; /* switch on configure mode */
- RTC->CNTH = (uint16_t)((timespec->tv_sec >> 16) & 0xFFFF);
- RTC->CNTL = (uint16_t)(timespec->tv_sec & 0xFFFF);
- RTC->CRL &= ~RTC_CRL_CNF; /* switch off configure mode */
-
- while(!(RTC->CRL & RTC_CRL_RTOFF)) /* wait for completion */
- ;
+ time_frac = (((uint32_t)RTC->DIVH) << 16) + (uint32_t)RTC->DIVL;
+ timespec->tv_msec = (uint16_t)(((STM32_LSECLK - time_frac) * 1000) /
+ STM32_LSECLK);
+ timespec->tv_sec = (RTC->CNTH << 16) + RTC->CNTL;
}
/**
- * @brief Get current time.
+ * @brief Set alarm time.
+ *
+ * @note Default value after BKP domain reset is 0xFFFFFFFF
*
- * @param[in] msec pointer to variable for storing fractional part of
- * time (milliseconds).
+ * @param[in] rtcp pointer to RTC driver structure
+ * @param[in] alarm alarm identifier
+ * @param[in] alarmspec pointer to a @p RTCAlarm structure
*
* @notapi
*/
-inline void rtc_lld_get_time(RTCDateTime *timespec){
- uint32_t time_frac = 0;
- time_frac = (((uint32_t)RTC->DIVH) << 16) + (RTC->DIVL);
+void rtc_lld_set_alarm(RTCDriver *rtcp,
+ rtcalarm_t alarm,
+ const RTCAlarm *alarmspec) {
- timespec->tv_msec = (uint16_t)(((STM32_LSECLK - time_frac) * 1000) / STM32_LSECLK);
- timespec->tv_sec = (RTC->CNTH << 16) + RTC->CNTL;
+ (void)rtcp;
+ (void)alarm;
+
+ rtc_lld_wait_write();
+
+ /* Enters configuration mode and writes ALRHx registers then leaves the
+ configuration mode.*/
+ RTC->CRL |= RTC_CRL_CNF;
+ if (alarmspec != NULL) {
+ RTC->ALRH = (uint16_t)(alarmspec->tv_sec >> 16);
+ RTC->ALRL = (uint16_t)(alarmspec->tv_sec & 0xFFFF);
+ }
+ else {
+ RTC->ALRH = 0;
+ RTC->ALRL = 0;
+ }
+ RTC->CRL &= ~RTC_CRL_CNF;
}
/**
- * @brief Set alarm time.
+ * @brief Get current alarm.
+ * @note If an alarm has not been set then the returned alarm specification
+ * is not meaningful.
*
- * @param[in] timespec pointer to variable storing time of alarm.
+ * @note Default value after BKP domain reset is 0xFFFFFFFF.
*
- * @note Fractional part will be silently ignored. There is no possibility
- * to change it on STM32F1xx platform.
- *
- * @note Default value after BKP domain reset is 0xFFFFFFFF
+ * @param[in] rtcp pointer to RTC driver structure
+ * @param[in] alarm alarm identifier
+ * @param[out] alarmspec pointer to a @p RTCAlarm structure
*
* @notapi
*/
-void rtc_lld_set_alarm(RTCDateTime *timespec){
+void rtc_lld_get_alarm(RTCDriver *rtcp,
+ rtcalarm_t alarm,
+ RTCAlarm *alarmspec) {
- while(!(RTC->CRL & RTC_CRL_RTOFF))
- ;
-
- RTC->CRL |= RTC_CRL_CNF; /* switch on configure mode */
- RTC->ALRH = (uint16_t)((timespec->tv_sec >> 16) & 0xFFFF);
- RTC->ALRL = (uint16_t)(timespec->tv_sec & 0xFFFF);
- RTC->CRL &= ~RTC_CRL_CNF; /* switch off configure mode */
-
-#if !(RTC_SUPPORTS_CALLBACKS)
- RTC->CRL &= ~RTC_CRL_ALRF;
- RTC->CRH |= RTC_CRH_ALRIE;
-#endif /* !(RTC_SUPPORTS_CALLBACKS) */
+ (void)rtcp;
+ (void)alarm;
- while(!(RTC->CRL & RTC_CRL_RTOFF)) /* wait for completion */
- ;
+ alarmspec->tv_sec = ((RTC->ALRH << 16) + RTC->ALRL);
}
/**
- * @brief Get current alarm time.
- *
- * @param[in] timespec pointer to variable storing time of alarm.
+ * @brief Enables or disables RTC callbacks.
+ * @details This function enables or disables callbacks, use a @p NULL pointer
+ * in order to disable a callback.
*
- * @note Fractional part will be silently ignored. There is no possibility
- * to change it on STM32F1xx platform.
- *
- * @note Default value after BKP domain reset is 0xFFFFFFFF
+ * @param[in] rtcp pointer to RTC driver structure
+ * @param[in] callback callback function pointer or @p NULL
*
* @notapi
*/
-inline void rtc_lld_get_alarm(RTCDateTime *timespec){
- timespec->tv_sec = ((RTC->ALRH << 16) + RTC->ALRL);
-}
+void rtc_lld_set_callback(RTCDriver *rtcp, rtccb_t callback) {
+
+ if (callback != NULL) {
+ rtcp->rtc_cb = callback;
+ NVICEnableVector(RTC_IRQn, CORTEX_PRIORITY_MASK(STM32_RTC_IRQ_PRIORITY));
+ /* Interrupts are enabled only after setting up the callback, this
+ way there is no need to check for the NULL callback pointer inside
+ the IRQ handler.*/
+ RTC->CRL &= ~(RTC_CRL_OWF | RTC_CRL_ALRF | RTC_CRL_SECF);
+ RTC->CRH |= RTC_CRH_OWIE | RTC_CRH_ALRIE | RTC_CRH_SECIE;
+ }
+ else {
+ NVICDisableVector(RTC_IRQn);
+ RTC->CRL = 0;
+ RTC->CRH = 0;
+ }
+}
#endif /* HAL_USE_RTC */