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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-08-18 08:43:10 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-08-18 08:43:10 +0000 |
| commit | ebc792e58d45d96506bdb7afe379b4ddee9bc48e (patch) | |
| tree | c2432ac1ea4370c9ecf1e2c87739219d106bbe72 /os/hal/platforms/STM32/OTGv1/stm32_otg.h | |
| parent | aedb7fddf11a5c5fad8b1a7a15d22534f145c763 (diff) | |
| download | ChibiOS-ebc792e58d45d96506bdb7afe379b4ddee9bc48e.tar.gz ChibiOS-ebc792e58d45d96506bdb7afe379b4ddee9bc48e.tar.bz2 ChibiOS-ebc792e58d45d96506bdb7afe379b4ddee9bc48e.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4577 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/OTGv1/stm32_otg.h')
| -rw-r--r-- | os/hal/platforms/STM32/OTGv1/stm32_otg.h | 17 |
1 files changed, 13 insertions, 4 deletions
diff --git a/os/hal/platforms/STM32/OTGv1/stm32_otg.h b/os/hal/platforms/STM32/OTGv1/stm32_otg.h index 7e08fae7f..7313174b7 100644 --- a/os/hal/platforms/STM32/OTGv1/stm32_otg.h +++ b/os/hal/platforms/STM32/OTGv1/stm32_otg.h @@ -171,6 +171,7 @@ typedef struct { volatile uint32_t PCGCCTL; /**< @brief Power and clock gating control
register. */
volatile uint32_t resvdE04[127];
+ volatile uint32_t FIFO[16][1024];
} stm32_otg_t;
/**
@@ -211,6 +212,11 @@ typedef struct { level. */
#define GAHBCFG_TXFELVL (1U<<7) /**< Non-periodic TxFIFO empty
level. */
+#define GAHBCFG_DMAEN (1U<<5) /**< DMA enable (HS only). */
+#define GAHBCFG_HBSTLEN_MASK (15U<<1) /**< Burst length/type mask (HS
+ only). */
+#define GAHBCFG_HBSTLEN(n) ((n)<<1) /**< Burst length/type (HS
+ only). */
#define GAHBCFG_GINTMSK (1U<<0) /**< Global interrupt mask. */
/** @} */
@@ -877,19 +883,22 @@ typedef struct { /**
* @brief OTG registers block memory address.
*/
-#define OTG_ADDR 0x50000000
+#define OTG_FS_ADDR 0x50000000
+#define OTG_HS_ADDR 0x40040000
/**
* @brief Accesses to the OTG registers block.
*/
-#define OTG ((stm32_otg_t *)OTG_ADDR)
+#define OTG_FS ((stm32_otg_t *)OTG_FS_ADDR)
+#define OTG OTG_FS
+#define OTG_HS ((stm32_otg_t *)OTG_HS_ADDR)
/**
* @brief Returns a FIFO address.
*/
-#define OTG_FIFO(n) ((volatile uint32_t *)(OTG_ADDR + \
+/*#define OTG1_FIFO(addr, n) ((volatile uint32_t *)((addr) + \
0x1000 + \
- (0x1000 * (n))))
+ (0x1000 * (n))))*/
#endif /* _STM32_OTG_H_ */
|