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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-03-31 17:20:26 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-03-31 17:20:26 +0000 |
| commit | 6c8a2507a88047d8165859e787520d2cf902259d (patch) | |
| tree | dcd4f342edc7ba70235ee90b802c96ad60fef5df /os/hal/platforms/STM32/I2Cv2 | |
| parent | b0b6214a6253eedb438e003dcfd408d52ed0a6c4 (diff) | |
| download | ChibiOS-6c8a2507a88047d8165859e787520d2cf902259d.tar.gz ChibiOS-6c8a2507a88047d8165859e787520d2cf902259d.tar.bz2 ChibiOS-6c8a2507a88047d8165859e787520d2cf902259d.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5523 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/I2Cv2')
| -rw-r--r-- | os/hal/platforms/STM32/I2Cv2/i2c_lld.c | 6 | ||||
| -rw-r--r-- | os/hal/platforms/STM32/I2Cv2/i2c_lld.h | 48 |
2 files changed, 35 insertions, 19 deletions
diff --git a/os/hal/platforms/STM32/I2Cv2/i2c_lld.c b/os/hal/platforms/STM32/I2Cv2/i2c_lld.c index 69d35134d..82b5ed13b 100644 --- a/os/hal/platforms/STM32/I2Cv2/i2c_lld.c +++ b/os/hal/platforms/STM32/I2Cv2/i2c_lld.c @@ -497,14 +497,14 @@ void i2c_lld_start(I2CDriver *i2cp) { dmaStreamSetPeripheral(i2cp->dmatx, &dp->TXDR);
/* Reset i2c peripheral.*/
- dp->CR1 = i2cp->config->cr1 | I2C_CR1_ERRIE | I2C_CR1_TCIE | I2C_CR1_TXDMAEN | I2C_CR1_RXDMAEN;
+ dp->CR1 = i2cp->config->cr1 | I2C_CR1_ERRIE | I2C_CR1_TCIE |
+ I2C_CR1_TXDMAEN | I2C_CR1_RXDMAEN;
/* Set slave address field (master mode) */
- //dp->CR2 = (i2cp->config->cr2 & ~I2C_CR2_SADD) | I2C_CR2_AUTOEND;
dp->CR2 = (i2cp->config->cr2 & ~I2C_CR2_SADD);
/* Setup I2C parameters.*/
- dp->TIMINGR = i2cp->config->clock_timing;
+ dp->TIMINGR = i2cp->config->timingr;
/* Ready to go.*/
dp->CR1 |= I2C_CR1_PE;
diff --git a/os/hal/platforms/STM32/I2Cv2/i2c_lld.h b/os/hal/platforms/STM32/I2Cv2/i2c_lld.h index 64f2f6fff..7114022bd 100644 --- a/os/hal/platforms/STM32/I2Cv2/i2c_lld.h +++ b/os/hal/platforms/STM32/I2Cv2/i2c_lld.h @@ -35,6 +35,22 @@ /* Driver constants. */
/*===========================================================================*/
+/**
+ * @name TIMINGR register definitions
+ * @{
+ */
+#define STM32_TIMINGR_PRESC_MASK (15U << 28)
+#define STM32_TIMINGR_PRESC(n) ((n) << 28)
+#define STM32_TIMINGR_SCLDEL_MASK (15U << 20)
+#define STM32_TIMINGR_SCLDEL(n) ((n) << 20)
+#define STM32_TIMINGR_SDADEL_MASK (15U << 16)
+#define STM32_TIMINGR_SDADEL(n) ((n) << 16)
+#define STM32_TIMINGR_SCLH_MASK (255U << 8)
+#define STM32_TIMINGR_SCLH(n) ((n) << 8)
+#define STM32_TIMINGR_SCLL_MASK (255U << 0)
+#define STM32_TIMINGR_SCLL(n) ((n) << 0)
+/** @} */
+
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
@@ -184,25 +200,25 @@ typedef uint16_t i2caddr_t; typedef uint32_t i2cflags_t;
/**
- * @brief Supported modes for the I2C bus.
- */
-typedef enum {
- OPMODE_I2C = 1,
- OPMODE_SMBUS_DEVICE = 2,
- OPMODE_SMBUS_HOST = 3,
-} i2copmode_t;
-
-/**
* @brief Driver configuration structure.
*/
typedef struct {
- i2copmode_t op_mode; /**< @brief Specifies the I2C mode. */
- uint32_t clock_timing; /**< @brief Specifies the clock timing.
- @note See TRM for further info. */
- uint32_t cr1; /**< @brief I2C register initialization
- data. */
- uint32_t cr2; /**< @brief I2C register initialization
- data. */
+ /**
+ * @brief TIMINGR register initialization.
+ * @note Refer to the STM32 reference manual, the values are affected
+ * by the system clock settings in mcuconf.h.
+ */
+ uint32_t timingr;
+ /**
+ * @brief CR1 register initialization.
+ * @note Leave to zero unless you know what you are doing.
+ */
+ uint32_t cr1;
+ /**
+ * @brief CR2 register initialization.
+ * @note Only the ADD10 bit can eventually be specified here.
+ */
+ uint32_t cr2;
} I2CConfig;
/**
|