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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2012-10-24 09:46:46 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2012-10-24 09:46:46 +0000
commitca0b2a235d6b537896efeb11f263d7e103a92d82 (patch)
tree3148ea55ee51596b608f905096c2d9384c07ea4b /os/hal/platforms/STM32/GPIOv2
parent7112dfa32e35f35998bf4ab05888317ef5aed59a (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4778 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/GPIOv2')
-rw-r--r--os/hal/platforms/STM32/GPIOv2/pal_lld.c4
-rw-r--r--os/hal/platforms/STM32/GPIOv2/pal_lld.h1
2 files changed, 5 insertions, 0 deletions
diff --git a/os/hal/platforms/STM32/GPIOv2/pal_lld.c b/os/hal/platforms/STM32/GPIOv2/pal_lld.c
index 4fa4a2194..7f8771b5f 100644
--- a/os/hal/platforms/STM32/GPIOv2/pal_lld.c
+++ b/os/hal/platforms/STM32/GPIOv2/pal_lld.c
@@ -47,6 +47,10 @@
RCC_AHB1ENR_GPIOGEN | RCC_AHB1ENR_GPIOHEN | \
RCC_AHB1ENR_GPIOIEN)
#define AHB1_LPEN_MASK AHB1_EN_MASK
+#elif defined(STM32F30X)
+#define AHB_EN_MASK (RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | \
+ RCC_AHBENR_GPIOCEN | RCC_AHBENR_GPIODEN | \
+ RCC_AHBENR_GPIOEEN | RCC_AHBENR_GPIOFEN)
#elif defined(STM32F4XX)
#define AHB1_EN_MASK (RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOBEN | \
RCC_AHB1ENR_GPIOCEN | RCC_AHB1ENR_GPIODEN | \
diff --git a/os/hal/platforms/STM32/GPIOv2/pal_lld.h b/os/hal/platforms/STM32/GPIOv2/pal_lld.h
index 4a1ffa5b5..93eac7889 100644
--- a/os/hal/platforms/STM32/GPIOv2/pal_lld.h
+++ b/os/hal/platforms/STM32/GPIOv2/pal_lld.h
@@ -59,6 +59,7 @@
#define PAL_STM32_OTYPE_OPENDRAIN (1 << 2)
#define PAL_STM32_OSPEED_MASK (3 << 3)
+/* TODO: F0 and F3 are different from F2/F4 here.*/
#define PAL_STM32_OSPEED_LOWEST (0 << 3)
#define PAL_STM32_OSPEED_MID1 (1 << 3)
#define PAL_STM32_OSPEED_MID2 (2 << 3)