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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2012-12-06 10:53:16 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2012-12-06 10:53:16 +0000
commit633098ebcd87d2a654deede6feff0d93fdabaebc (patch)
treeb1f97259ff9915cae042e4c419aca1897d0892c6 /os/hal/platforms/STM32/GPIOv2
parentcc3cf07897dbd9f4fc27c6117c88fb7cbf85b1a6 (diff)
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STM32F3 SPI working, STM32F0 support update.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4879 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/GPIOv2')
-rw-r--r--os/hal/platforms/STM32/GPIOv2/pal_lld.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/os/hal/platforms/STM32/GPIOv2/pal_lld.h b/os/hal/platforms/STM32/GPIOv2/pal_lld.h
index 93eac7889..d00180461 100644
--- a/os/hal/platforms/STM32/GPIOv2/pal_lld.h
+++ b/os/hal/platforms/STM32/GPIOv2/pal_lld.h
@@ -59,10 +59,13 @@
#define PAL_STM32_OTYPE_OPENDRAIN (1 << 2)
#define PAL_STM32_OSPEED_MASK (3 << 3)
-/* TODO: F0 and F3 are different from F2/F4 here.*/
#define PAL_STM32_OSPEED_LOWEST (0 << 3)
+#if defined(STM32F0XX) || defined(STM32F30X)
+#define PAL_STM32_OSPEED_MID (1 << 3)
+#else
#define PAL_STM32_OSPEED_MID1 (1 << 3)
#define PAL_STM32_OSPEED_MID2 (2 << 3)
+#endif
#define PAL_STM32_OSPEED_HIGHEST (3 << 3)
#define PAL_STM32_PUDR_MASK (3 << 5)