diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-09-16 17:38:22 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-09-16 17:38:22 +0000 |
| commit | 3a94137eb38857d9780a5ef65be30736804dea46 (patch) | |
| tree | 3f2742af90d08db7c09a6ba9d0304a49225000fd /os/hal/platforms/STM32/GPIOv2 | |
| parent | 46538d795be83d1d54b132e7d57213cb6d975c51 (diff) | |
| download | ChibiOS-3a94137eb38857d9780a5ef65be30736804dea46.tar.gz ChibiOS-3a94137eb38857d9780a5ef65be30736804dea46.tar.bz2 ChibiOS-3a94137eb38857d9780a5ef65be30736804dea46.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3320 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/GPIOv2')
| -rw-r--r-- | os/hal/platforms/STM32/GPIOv2/pal_lld.c | 16 |
1 files changed, 7 insertions, 9 deletions
diff --git a/os/hal/platforms/STM32/GPIOv2/pal_lld.c b/os/hal/platforms/STM32/GPIOv2/pal_lld.c index c84df64f6..8f84f225e 100644 --- a/os/hal/platforms/STM32/GPIOv2/pal_lld.c +++ b/os/hal/platforms/STM32/GPIOv2/pal_lld.c @@ -32,15 +32,14 @@ #if HAL_USE_PAL || defined(__DOXYGEN__)
#if defined(STM32L1XX_MD)
-#define AHB_EN_MASK (RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | \
- RCC_AHBENR_GPIOCEN | RCC_AHBENR_GPIODEN | \
+#define AHB_EN_MASK (RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | \
+ RCC_AHBENR_GPIOCEN | RCC_AHBENR_GPIODEN | \
RCC_AHBENR_GPIOEEN | RCC_AHBENR_GPIOHEN)
-#define AHB_LPEN_MASK AHB_EN_MASK
#elif defined(STM32F2XX)
-#define AHB1_EN_MASK (RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOBEN | \
- RCC_AHB1ENR_GPIOCEN | RCC_AHB1ENR_GPIODEN | \
- RCC_AHB1ENR_GPIOEEN | RCC_AHB1ENR_GPIOFEN | \
- RCC_AHB1ENR_GPIOGEN | RCC_AHB1ENR_GPIOHEN | \
+#define AHB1_EN_MASK (RCC_AHB1ENR_GPIOAEN | RCC_AHB1ENR_GPIOBEN | \
+ RCC_AHB1ENR_GPIOCEN | RCC_AHB1ENR_GPIODEN | \
+ RCC_AHB1ENR_GPIOEEN | RCC_AHB1ENR_GPIOFEN | \
+ RCC_AHB1ENR_GPIOGEN | RCC_AHB1ENR_GPIOHEN | \
RCC_AHB1ENR_GPIOIEN)
#define AHB1_LPEN_MASK AHB1_EN_MASK
#else
@@ -92,8 +91,7 @@ void _pal_lld_init(const PALConfig *config) { * Enables the GPIO related clocks.
*/
#if defined(STM32L1XX_MD)
- RCC->AHBENR |= AHB_EN_MASK;
- RCC->AHBLPENR |= AHB_LPEN_MASK;
+ rccEnableAHB(AHB_EN_MASK, TRUE);
#elif defined(STM32F2XX)
RCC->AHB1ENR |= AHB1_EN_MASK;
RCC->AHB1LPENR |= AHB1_LPEN_MASK;
|