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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-09-18 18:23:50 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-09-18 18:23:50 +0000 |
commit | 07f868d3792cadd6377fdb5039c7cbf27f68bd92 (patch) | |
tree | cff5fe6a2845c508f8c2fec3a65700a27cf670da /os/hal/platforms/STM32/GPIOv2/pal_lld.h | |
parent | 373735d5290c3d0869fe014e4bd93e5d4824c89b (diff) | |
download | ChibiOS-07f868d3792cadd6377fdb5039c7cbf27f68bd92.tar.gz ChibiOS-07f868d3792cadd6377fdb5039c7cbf27f68bd92.tar.bz2 ChibiOS-07f868d3792cadd6377fdb5039c7cbf27f68bd92.zip |
GPT driver tested on STM32L.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3341 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/GPIOv2/pal_lld.h')
-rw-r--r-- | os/hal/platforms/STM32/GPIOv2/pal_lld.h | 16 |
1 files changed, 5 insertions, 11 deletions
diff --git a/os/hal/platforms/STM32/GPIOv2/pal_lld.h b/os/hal/platforms/STM32/GPIOv2/pal_lld.h index 6c799c14c..a73f80c7a 100644 --- a/os/hal/platforms/STM32/GPIOv2/pal_lld.h +++ b/os/hal/platforms/STM32/GPIOv2/pal_lld.h @@ -135,13 +135,7 @@ typedef struct { volatile uint32_t PUPDR;
volatile uint32_t IDR;
volatile uint32_t ODR;
- volatile union {
- uint32_t W;
- struct {
- uint16_t set;
- uint16_t clear;
- } H;
- } BSRR;
+ volatile uint32_t BSRR;
volatile uint32_t LCKR;
volatile uint32_t AFRL;
volatile uint32_t AFRH;
@@ -375,7 +369,7 @@ typedef GPIO_TypeDef * ioportid_t; *
* @notapi
*/
-#define pal_lld_setport(port, bits) ((port)->BSRR.H.set = (uint16_t)(bits))
+#define pal_lld_setport(port, bits) ((port)->BSRR = (uint32_t)(bits))
/**
* @brief Clears a bits mask on a I/O port.
@@ -392,7 +386,7 @@ typedef GPIO_TypeDef * ioportid_t; *
* @notapi
*/
-#define pal_lld_clearport(port, bits) ((port)->BSRR.H.clear = (uint16_t)(bits))
+#define pal_lld_clearport(port, bits) ((port)->BSRR = (uint32_t)(bits) << 16)
/**
* @brief Writes a group of bits.
@@ -413,8 +407,8 @@ typedef GPIO_TypeDef * ioportid_t; * @notapi
*/
#define pal_lld_writegroup(port, mask, offset, bits) \
- ((port)->BSRR.W = ((~(bits) & (mask)) << (16 + (offset))) | \
- (((bits) & (mask)) << (offset)))
+ ((port)->BSRR = ((~(bits) & (mask)) << (16 + (offset))) | \
+ (((bits) & (mask)) << (offset)))
/**
* @brief Pads group mode setup.
|