diff options
author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-09-14 18:35:47 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-09-14 18:35:47 +0000 |
commit | 061a1d4844a0eeffca59ae09b2799cc8ff24e05b (patch) | |
tree | 44b17fd8964b162c98e05796f4903c06d620e890 /os/hal/platforms/STM32/DMAv1 | |
parent | 0bc5166a21ee2ff41c1b1ae8cc2d543a542cf2c3 (diff) | |
download | ChibiOS-061a1d4844a0eeffca59ae09b2799cc8ff24e05b.tar.gz ChibiOS-061a1d4844a0eeffca59ae09b2799cc8ff24e05b.tar.bz2 ChibiOS-061a1d4844a0eeffca59ae09b2799cc8ff24e05b.zip |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3317 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/DMAv1')
-rw-r--r-- | os/hal/platforms/STM32/DMAv1/sdc_lld.c | 730 | ||||
-rw-r--r-- | os/hal/platforms/STM32/DMAv1/sdc_lld.h | 203 | ||||
-rw-r--r-- | os/hal/platforms/STM32/DMAv1/spi_lld.c | 445 | ||||
-rw-r--r-- | os/hal/platforms/STM32/DMAv1/spi_lld.h | 285 | ||||
-rw-r--r-- | os/hal/platforms/STM32/DMAv1/uart_lld.c | 557 | ||||
-rw-r--r-- | os/hal/platforms/STM32/DMAv1/uart_lld.h | 318 |
6 files changed, 0 insertions, 2538 deletions
diff --git a/os/hal/platforms/STM32/DMAv1/sdc_lld.c b/os/hal/platforms/STM32/DMAv1/sdc_lld.c deleted file mode 100644 index b9e02a815..000000000 --- a/os/hal/platforms/STM32/DMAv1/sdc_lld.c +++ /dev/null @@ -1,730 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file STM32/sdc_lld.c
- * @brief STM32 SDC subsystem low level driver source.
- *
- * @addtogroup SDC
- * @{
- */
-
-#include <string.h>
-
-#include "ch.h"
-#include "hal.h"
-
-#if HAL_USE_SDC || defined(__DOXYGEN__)
-
-/*===========================================================================*/
-/* Driver exported variables. */
-/*===========================================================================*/
-
-/** @brief SDCD1 driver identifier.*/
-SDCDriver SDCD1;
-
-/*===========================================================================*/
-/* Driver local variables. */
-/*===========================================================================*/
-
-#if STM32_SDC_UNALIGNED_SUPPORT
-/**
- * @brief Buffer for temporary storage during unaligned transfers.
- */
-static union {
- uint32_t alignment;
- uint8_t buf[SDC_BLOCK_SIZE];
-} u;
-#endif
-
-/*===========================================================================*/
-/* Driver local functions. */
-/*===========================================================================*/
-
-/**
- * @brief Reads one or more blocks.
- *
- * @param[in] sdcp pointer to the @p SDCDriver object
- * @param[in] startblk first block to read
- * @param[out] buf pointer to the read buffer, it must be aligned to
- * four bytes boundary
- * @param[in] n number of blocks to read
- * @return The operation status.
- * @retval FALSE operation succeeded, the requested blocks have been
- * read.
- * @retval TRUE operation failed, the state of the buffer is uncertain.
- *
- * @notapi
- */
-static bool_t sdc_lld_read_multiple(SDCDriver *sdcp, uint32_t startblk,
- uint8_t *buf, uint32_t n) {
- uint32_t resp[1];
-
- /* Checks for errors and waits for the card to be ready for reading.*/
- if (_sdc_wait_for_transfer_state(sdcp))
- return TRUE;
-
- /* Prepares the DMA channel for reading.*/
- dmaStreamSetMemory0(STM32_DMA2_STREAM4, buf);
- dmaStreamSetTransactionSize(STM32_DMA2_STREAM4,
- (n * SDC_BLOCK_SIZE) / sizeof (uint32_t));
- dmaStreamSetMode(STM32_DMA2_STREAM4,
- STM32_DMA_CR_PL(STM32_SDC_SDIO_DMA_PRIORITY) |
- STM32_DMA_CR_DIR_P2M | STM32_DMA_CR_PSIZE_WORD |
- STM32_DMA_CR_MSIZE_WORD | STM32_DMA_CR_MINC);
-
- /* Setting up data transfer.
- Options: Card to Controller, Block mode, DMA mode, 512 bytes blocks.*/
- SDIO->ICR = 0xFFFFFFFF;
- SDIO->MASK = SDIO_MASK_DCRCFAILIE | SDIO_MASK_DTIMEOUTIE |
- SDIO_MASK_DATAENDIE | SDIO_MASK_STBITERRIE;
- SDIO->DLEN = n * SDC_BLOCK_SIZE;
- SDIO->DCTRL = SDIO_DCTRL_DTDIR |
- SDIO_DCTRL_DBLOCKSIZE_3 | SDIO_DCTRL_DBLOCKSIZE_0 |
- SDIO_DCTRL_DMAEN |
- SDIO_DCTRL_DTEN;
-
- /* DMA channel activation.*/
- dmaStreamEnable(STM32_DMA2_STREAM4);
-
- /* Read multiple blocks command.*/
- if ((sdcp->cardmode & SDC_MODE_HIGH_CAPACITY) == 0)
- startblk *= SDC_BLOCK_SIZE;
- if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_READ_MULTIPLE_BLOCK,
- startblk, resp) ||
- SDC_R1_ERROR(resp[0]))
- goto error;
-
- chSysLock();
- if (SDIO->MASK != 0) {
- chDbgAssert(sdcp->thread == NULL,
- "sdc_lld_read_multiple(), #1", "not NULL");
- sdcp->thread = chThdSelf();
- chSchGoSleepS(THD_STATE_SUSPENDED);
- chDbgAssert(sdcp->thread == NULL,
- "sdc_lld_read_multiple(), #2", "not NULL");
- }
- if ((SDIO->STA & SDIO_STA_DATAEND) == 0) {
- chSysUnlock();
- goto error;
- }
- dmaStreamDisable(STM32_DMA2_STREAM4);
- SDIO->ICR = 0xFFFFFFFF;
- SDIO->DCTRL = 0;
- chSysUnlock();
-
- return sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_STOP_TRANSMISSION, 0, resp);
-error:
- dmaStreamDisable(STM32_DMA2_STREAM4);
- SDIO->ICR = 0xFFFFFFFF;
- SDIO->MASK = 0;
- SDIO->DCTRL = 0;
- return TRUE;
-}
-
-/**
- * @brief Reads one block.
- *
- * @param[in] sdcp pointer to the @p SDCDriver object
- * @param[in] startblk first block to read
- * @param[out] buf pointer to the read buffer, it must be aligned to
- * four bytes boundary
- * @return The operation status.
- * @retval FALSE operation succeeded, the requested blocks have been
- * read.
- * @retval TRUE operation failed, the state of the buffer is uncertain.
- *
- * @notapi
- */
-static bool_t sdc_lld_read_single(SDCDriver *sdcp, uint32_t startblk,
- uint8_t *buf) {
- uint32_t resp[1];
-
- /* Checks for errors and waits for the card to be ready for reading.*/
- if (_sdc_wait_for_transfer_state(sdcp))
- return TRUE;
-
- /* Prepares the DMA channel for reading.*/
- dmaStreamSetMemory0(STM32_DMA2_STREAM4, buf);
- dmaStreamSetTransactionSize(STM32_DMA2_STREAM4,
- SDC_BLOCK_SIZE / sizeof (uint32_t));
- dmaStreamSetMode(STM32_DMA2_STREAM4,
- STM32_DMA_CR_PL(STM32_SDC_SDIO_DMA_PRIORITY) |
- STM32_DMA_CR_DIR_P2M | STM32_DMA_CR_PSIZE_WORD |
- STM32_DMA_CR_MSIZE_WORD | STM32_DMA_CR_MINC);
-
- /* Setting up data transfer.
- Options: Card to Controller, Block mode, DMA mode, 512 bytes blocks.*/
- SDIO->ICR = 0xFFFFFFFF;
- SDIO->MASK = SDIO_MASK_DCRCFAILIE | SDIO_MASK_DTIMEOUTIE |
- SDIO_MASK_DATAENDIE | SDIO_MASK_STBITERRIE;
- SDIO->DLEN = SDC_BLOCK_SIZE;
- SDIO->DCTRL = SDIO_DCTRL_DTDIR |
- SDIO_DCTRL_DBLOCKSIZE_3 | SDIO_DCTRL_DBLOCKSIZE_0 |
- SDIO_DCTRL_DMAEN |
- SDIO_DCTRL_DTEN;
-
- /* DMA channel activation.*/
- dmaStreamEnable(STM32_DMA2_STREAM4);
-
- /* Read single block command.*/
- if ((sdcp->cardmode & SDC_MODE_HIGH_CAPACITY) == 0)
- startblk *= SDC_BLOCK_SIZE;
- if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_READ_SINGLE_BLOCK,
- startblk, resp) ||
- SDC_R1_ERROR(resp[0]))
- goto error;
-
- chSysLock();
- if (SDIO->MASK != 0) {
- chDbgAssert(sdcp->thread == NULL,
- "sdc_lld_read_single(), #1", "not NULL");
- sdcp->thread = chThdSelf();
- chSchGoSleepS(THD_STATE_SUSPENDED);
- chDbgAssert(sdcp->thread == NULL,
- "sdc_lld_read_single(), #2", "not NULL");
- }
- if ((SDIO->STA & SDIO_STA_DATAEND) == 0) {
- chSysUnlock();
- goto error;
- }
- dmaStreamDisable(STM32_DMA2_STREAM4);
- SDIO->ICR = 0xFFFFFFFF;
- SDIO->DCTRL = 0;
- chSysUnlock();
-
- return FALSE;
-error:
- dmaStreamDisable(STM32_DMA2_STREAM4);
- SDIO->ICR = 0xFFFFFFFF;
- SDIO->MASK = 0;
- SDIO->DCTRL = 0;
- return TRUE;
-}
-
-/**
- * @brief Writes one or more blocks.
- *
- * @param[in] sdcp pointer to the @p SDCDriver object
- * @param[in] startblk first block to write
- * @param[out] buf pointer to the write buffer, it must be aligned to
- * four bytes boundary
- * @param[in] n number of blocks to write
- * @return The operation status.
- * @retval FALSE operation succeeded, the requested blocks have been
- * written.
- * @retval TRUE operation failed.
- *
- * @notapi
- */
-static bool_t sdc_lld_write_multiple(SDCDriver *sdcp, uint32_t startblk,
- const uint8_t *buf, uint32_t n) {
- uint32_t resp[1];
-
- /* Checks for errors and waits for the card to be ready for writing.*/
- if (_sdc_wait_for_transfer_state(sdcp))
- return TRUE;
-
- /* Prepares the DMA channel for writing.*/
- dmaStreamSetMemory0(STM32_DMA2_STREAM4, buf);
- dmaStreamSetTransactionSize(STM32_DMA2_STREAM4,
- (n * SDC_BLOCK_SIZE) / sizeof (uint32_t));
- dmaStreamSetMode(STM32_DMA2_STREAM4,
- STM32_DMA_CR_PL(STM32_SDC_SDIO_DMA_PRIORITY) |
- STM32_DMA_CR_DIR_M2P | STM32_DMA_CR_PSIZE_WORD |
- STM32_DMA_CR_MSIZE_WORD | STM32_DMA_CR_MINC);
-
- /* Write multiple blocks command.*/
- if ((sdcp->cardmode & SDC_MODE_HIGH_CAPACITY) == 0)
- startblk *= SDC_BLOCK_SIZE;
- if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_WRITE_MULTIPLE_BLOCK,
- startblk, resp) ||
- SDC_R1_ERROR(resp[0]))
- return TRUE;
-
- /* Setting up data transfer.
- Options: Controller to Card, Block mode, DMA mode, 512 bytes blocks.*/
- SDIO->ICR = 0xFFFFFFFF;
- SDIO->MASK = SDIO_MASK_DCRCFAILIE | SDIO_MASK_DTIMEOUTIE |
- SDIO_MASK_DATAENDIE | SDIO_MASK_TXUNDERRIE |
- SDIO_MASK_STBITERRIE;
- SDIO->DLEN = n * SDC_BLOCK_SIZE;
- SDIO->DCTRL = SDIO_DCTRL_DBLOCKSIZE_3 | SDIO_DCTRL_DBLOCKSIZE_0 |
- SDIO_DCTRL_DMAEN |
- SDIO_DCTRL_DTEN;
-
- /* DMA channel activation.*/
- dmaStreamEnable(STM32_DMA2_STREAM4);
-
- /* Note the mask is checked before going to sleep because the interrupt
- may have occurred before reaching the critical zone.*/
- chSysLock();
- if (SDIO->MASK != 0) {
- chDbgAssert(sdcp->thread == NULL,
- "sdc_lld_write_multiple(), #1", "not NULL");
- sdcp->thread = chThdSelf();
- chSchGoSleepS(THD_STATE_SUSPENDED);
- chDbgAssert(sdcp->thread == NULL,
- "sdc_lld_write_multiple(), #2", "not NULL");
- }
- if ((SDIO->STA & SDIO_STA_DATAEND) == 0) {
- chSysUnlock();
- goto error;
- }
- dmaStreamDisable(STM32_DMA2_STREAM4);
- SDIO->ICR = 0xFFFFFFFF;
- SDIO->DCTRL = 0;
- chSysUnlock();
-
- return sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_STOP_TRANSMISSION, 0, resp);
-error:
- dmaStreamDisable(STM32_DMA2_STREAM4);
- SDIO->ICR = 0xFFFFFFFF;
- SDIO->MASK = 0;
- SDIO->DCTRL = 0;
- return TRUE;
-}
-
-/**
- * @brief Writes one block.
- *
- * @param[in] sdcp pointer to the @p SDCDriver object
- * @param[in] startblk first block to write
- * @param[out] buf pointer to the write buffer, it must be aligned to
- * four bytes boundary
- * @param[in] n number of blocks to write
- * @return The operation status.
- * @retval FALSE operation succeeded, the requested blocks have been
- * written.
- * @retval TRUE operation failed.
- *
- * @notapi
- */
-static bool_t sdc_lld_write_single(SDCDriver *sdcp, uint32_t startblk,
- const uint8_t *buf) {
- uint32_t resp[1];
-
- /* Checks for errors and waits for the card to be ready for writing.*/
- if (_sdc_wait_for_transfer_state(sdcp))
- return TRUE;
-
- /* Prepares the DMA channel for writing.*/
- dmaStreamSetMemory0(STM32_DMA2_STREAM4, buf);
- dmaStreamSetTransactionSize(STM32_DMA2_STREAM4,
- SDC_BLOCK_SIZE / sizeof (uint32_t));
- dmaStreamSetMode(STM32_DMA2_STREAM4,
- STM32_DMA_CR_PL(STM32_SDC_SDIO_DMA_PRIORITY) |
- STM32_DMA_CR_DIR_M2P | STM32_DMA_CR_PSIZE_WORD |
- STM32_DMA_CR_MSIZE_WORD | STM32_DMA_CR_MINC);
-
- /* Write single block command.*/
- if ((sdcp->cardmode & SDC_MODE_HIGH_CAPACITY) == 0)
- startblk *= SDC_BLOCK_SIZE;
- if (sdc_lld_send_cmd_short_crc(sdcp, SDC_CMD_WRITE_BLOCK,
- startblk, resp) ||
- SDC_R1_ERROR(resp[0]))
- return TRUE;
-
- /* Setting up data transfer.
- Options: Controller to Card, Block mode, DMA mode, 512 bytes blocks.*/
- SDIO->ICR = 0xFFFFFFFF;
- SDIO->MASK = SDIO_MASK_DCRCFAILIE | SDIO_MASK_DTIMEOUTIE |
- SDIO_MASK_DATAENDIE | SDIO_MASK_TXUNDERRIE |
- SDIO_MASK_STBITERRIE;
- SDIO->DLEN = SDC_BLOCK_SIZE;
- SDIO->DCTRL = SDIO_DCTRL_DBLOCKSIZE_3 | SDIO_DCTRL_DBLOCKSIZE_0 |
- SDIO_DCTRL_DMAEN |
- SDIO_DCTRL_DTEN;
-
- /* DMA channel activation.*/
- dmaStreamEnable(STM32_DMA2_STREAM4);
-
- /* Note the mask is checked before going to sleep because the interrupt
- may have occurred before reaching the critical zone.*/
- chSysLock();
- if (SDIO->MASK != 0) {
- chDbgAssert(sdcp->thread == NULL,
- "sdc_lld_write_single(), #1", "not NULL");
- sdcp->thread = chThdSelf();
- chSchGoSleepS(THD_STATE_SUSPENDED);
- chDbgAssert(sdcp->thread == NULL,
- "sdc_lld_write_single(), #2", "not NULL");
- }
- if ((SDIO->STA & SDIO_STA_DATAEND) == 0) {
- chSysUnlock();
- goto error;
- }
- dmaStreamDisable(STM32_DMA2_STREAM4);
- SDIO->ICR = 0xFFFFFFFF;
- SDIO->DCTRL = 0;
- chSysUnlock();
-
- return FALSE;
-error:
- dmaStreamDisable(STM32_DMA2_STREAM4);
- SDIO->ICR = 0xFFFFFFFF;
- SDIO->MASK = 0;
- SDIO->DCTRL = 0;
- return TRUE;
-}
-
-/*===========================================================================*/
-/* Driver interrupt handlers. */
-/*===========================================================================*/
-
-/**
- * @brief SDIO IRQ handler.
- *
- * @isr
- */
-CH_IRQ_HANDLER(SDIO_IRQHandler) {
-
- CH_IRQ_PROLOGUE();
-
- chSysLockFromIsr();
- if (SDCD1.thread != NULL) {
- chSchReadyI(SDCD1.thread);
- SDCD1.thread = NULL;
- }
- chSysUnlockFromIsr();
-
- /* Disables the source but the status flags are not reset because the
- read/write functions need to check them.*/
- SDIO->MASK = 0;
-
- CH_IRQ_EPILOGUE();
-}
-
-/*===========================================================================*/
-/* Driver exported functions. */
-/*===========================================================================*/
-
-/**
- * @brief Low level SDC driver initialization.
- *
- * @notapi
- */
-void sdc_lld_init(void) {
-
- sdcObjectInit(&SDCD1);
- SDCD1.thread = NULL;
-}
-
-/**
- * @brief Configures and activates the SDC peripheral.
- *
- * @param[in] sdcp pointer to the @p SDCDriver object, must be @p NULL,
- * this driver does not require any configuration
- *
- * @notapi
- */
-void sdc_lld_start(SDCDriver *sdcp) {
-
- if (sdcp->state == SDC_STOP) {
- /* Note, the DMA must be enabled before the IRQs.*/
- dmaStreamAllocate(STM32_DMA2_STREAM4, 0, NULL, NULL);
- dmaStreamSetPeripheral(STM32_DMA2_STREAM4, &SDIO->FIFO);
- NVICEnableVector(SDIO_IRQn,
- CORTEX_PRIORITY_MASK(STM32_SDC_SDIO_IRQ_PRIORITY));
- RCC->AHBENR |= RCC_AHBENR_SDIOEN;
- }
- /* Configuration, card clock is initially stopped.*/
- SDIO->POWER = 0;
- SDIO->CLKCR = 0;
- SDIO->DCTRL = 0;
- SDIO->DTIMER = STM32_SDC_DATATIMEOUT;
-}
-
-/**
- * @brief Deactivates the SDC peripheral.
- *
- * @param[in] sdcp pointer to the @p SDCDriver object
- *
- * @notapi
- */
-void sdc_lld_stop(SDCDriver *sdcp) {
-
- if ((sdcp->state == SDC_READY) || (sdcp->state == SDC_ACTIVE)) {
- SDIO->POWER = 0;
- SDIO->CLKCR = 0;
- SDIO->DCTRL = 0;
- SDIO->DTIMER = 0;
-
- /* Clock deactivation.*/
- NVICDisableVector(SDIO_IRQn);
- dmaStreamRelease(STM32_DMA2_STREAM4);
- }
-}
-
-/**
- * @brief Starts the SDIO clock and sets it to init mode (400KHz or less).
- *
- * @param[in] sdcp pointer to the @p SDCDriver object
- *
- * @notapi
- */
-void sdc_lld_start_clk(SDCDriver *sdcp) {
-
- (void)sdcp;
- /* Initial clock setting: 400KHz, 1bit mode.*/
- SDIO->CLKCR = STM32_SDIO_DIV_LS;
- SDIO->POWER |= SDIO_POWER_PWRCTRL_0 | SDIO_POWER_PWRCTRL_1;
- SDIO->CLKCR |= SDIO_CLKCR_CLKEN;
-}
-
-/**
- * @brief Sets the SDIO clock to data mode (25MHz or less).
- *
- * @param[in] sdcp pointer to the @p SDCDriver object
- *
- * @notapi
- */
-void sdc_lld_set_data_clk(SDCDriver *sdcp) {
-
- (void)sdcp;
- SDIO->CLKCR = (SDIO->CLKCR & 0xFFFFFF00) | STM32_SDIO_DIV_HS;
-}
-
-/**
- * @brief Stops the SDIO clock.
- *
- * @param[in] sdcp pointer to the @p SDCDriver object
- *
- * @notapi
- */
-void sdc_lld_stop_clk(SDCDriver *sdcp) {
-
- (void)sdcp;
- SDIO->CLKCR = 0;
- SDIO->POWER = 0;
-}
-
-/**
- * @brief Switches the bus to 4 bits mode.
- *
- * @param[in] sdcp pointer to the @p SDCDriver object
- * @param[in] mode bus mode
- *
- * @notapi
- */
-void sdc_lld_set_bus_mode(SDCDriver *sdcp, sdcbusmode_t mode) {
- uint32_t clk = SDIO->CLKCR & ~SDIO_CLKCR_WIDBUS;
-
- (void)sdcp;
- switch (mode) {
- case SDC_MODE_1BIT:
- SDIO->CLKCR = clk;
- break;
- case SDC_MODE_4BIT:
- SDIO->CLKCR = clk | SDIO_CLKCR_WIDBUS_0;
- break;
- case SDC_MODE_8BIT:
- SDIO->CLKCR = clk | SDIO_CLKCR_WIDBUS_1;
- }
-}
-
-/**
- * @brief Sends an SDIO command with no response expected.
- *
- * @param[in] sdcp pointer to the @p SDCDriver object
- * @param[in] cmd card command
- * @param[in] arg command argument
- *
- * @notapi
- */
-void sdc_lld_send_cmd_none(SDCDriver *sdcp, uint8_t cmd, uint32_t arg) {
-
- (void)sdcp;
- SDIO->ARG = arg;
- SDIO->CMD = (uint32_t)cmd | SDIO_CMD_CPSMEN;
- while ((SDIO->STA & SDIO_STA_CMDSENT) == 0)
- ;
- SDIO->ICR = SDIO_ICR_CMDSENTC;
-}
-
-/**
- * @brief Sends an SDIO command with a short response expected.
- * @note The CRC is not verified.
- *
- * @param[in] sdcp pointer to the @p SDCDriver object
- * @param[in] cmd card command
- * @param[in] arg command argument
- * @param[out] resp pointer to the response buffer (one word)
- * @return The operation status.
- * @retval FALSE the operation succeeded.
- * @retval TRUE the operation failed because timeout, CRC check or
- * other errors.
- *
- * @notapi
- */
-bool_t sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
- uint32_t *resp) {
- uint32_t sta;
-
- (void)sdcp;
- SDIO->ARG = arg;
- SDIO->CMD = (uint32_t)cmd | SDIO_CMD_WAITRESP_0 | SDIO_CMD_CPSMEN;
- while (((sta = SDIO->STA) & (SDIO_STA_CMDREND | SDIO_STA_CTIMEOUT |
- SDIO_STA_CCRCFAIL)) == 0)
- ;
- SDIO->ICR = SDIO_ICR_CMDRENDC | SDIO_ICR_CTIMEOUTC | SDIO_ICR_CCRCFAILC;
- if ((sta & (SDIO_STA_CTIMEOUT)) != 0)
- return TRUE;
- *resp = SDIO->RESP1;
- return FALSE;
-}
-
-/**
- * @brief Sends an SDIO command with a short response expected and CRC.
- *
- * @param[in] sdcp pointer to the @p SDCDriver object
- * @param[in] cmd card command
- * @param[in] arg command argument
- * @param[out] resp pointer to the response buffer (one word)
- * @return The operation status.
- * @retval FALSE the operation succeeded.
- * @retval TRUE the operation failed because timeout, CRC check or
- * other errors.
- *
- * @notapi
- */
-bool_t sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
- uint32_t *resp) {
- uint32_t sta;
-
- (void)sdcp;
- SDIO->ARG = arg;
- SDIO->CMD = (uint32_t)cmd | SDIO_CMD_WAITRESP_0 | SDIO_CMD_CPSMEN;
- while (((sta = SDIO->STA) & (SDIO_STA_CMDREND | SDIO_STA_CTIMEOUT |
- SDIO_STA_CCRCFAIL)) == 0)
- ;
- SDIO->ICR = SDIO_ICR_CMDRENDC | SDIO_ICR_CTIMEOUTC | SDIO_ICR_CCRCFAILC;
- if ((sta & (SDIO_STA_CTIMEOUT | SDIO_STA_CCRCFAIL)) != 0)
- return TRUE;
- *resp = SDIO->RESP1;
- return FALSE;
-}
-
-/**
- * @brief Sends an SDIO command with a long response expected and CRC.
- *
- * @param[in] sdcp pointer to the @p SDCDriver object
- * @param[in] cmd card command
- * @param[in] arg command argument
- * @param[out] resp pointer to the response buffer (four words)
- * @return The operation status.
- * @retval FALSE the operation succeeded.
- * @retval TRUE the operation failed because timeout, CRC check or
- * other errors.
- *
- * @notapi
- */
-bool_t sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
- uint32_t *resp) {
-
- uint32_t sta;
-
- (void)sdcp;
- SDIO->ARG = arg;
- SDIO->CMD = (uint32_t)cmd | SDIO_CMD_WAITRESP_0 | SDIO_CMD_WAITRESP_1 |
- SDIO_CMD_CPSMEN;
- while (((sta = SDIO->STA) & (SDIO_STA_CMDREND | SDIO_STA_CTIMEOUT |
- SDIO_STA_CCRCFAIL)) == 0)
- ;
- SDIO->ICR = SDIO_ICR_CMDRENDC | SDIO_ICR_CTIMEOUTC | SDIO_ICR_CCRCFAILC;
- if ((sta & (SDIO_STA_CTIMEOUT | SDIO_STA_CCRCFAIL)) != 0)
- return TRUE;
- *resp = SDIO->RESP1;
- return FALSE;
-}
-
-/**
- * @brief Reads one or more blocks.
- *
- * @param[in] sdcp pointer to the @p SDCDriver object
- * @param[in] startblk first block to read
- * @param[out] buf pointer to the read buffer
- * @param[in] n number of blocks to read
- * @return The operation status.
- * @retval FALSE operation succeeded, the requested blocks have been
- * read.
- * @retval TRUE operation failed, the state of the buffer is uncertain.
- *
- * @notapi
- */
-bool_t sdc_lld_read(SDCDriver *sdcp, uint32_t startblk,
- uint8_t *buf, uint32_t n) {
-
-#if STM32_SDC_UNALIGNED_SUPPORT
- if (((unsigned)buf & 3) != 0) {
- uint32_t i;
- for (i = 0; i < n; i++) {
- if (sdc_lld_read_single(sdcp, startblk, u.buf))
- return TRUE;
- memcpy(buf, u.buf, SDC_BLOCK_SIZE);
- buf += SDC_BLOCK_SIZE;
- startblk++;
- }
- return FALSE;
- }
-#endif
- if (n == 1)
- return sdc_lld_read_single(sdcp, startblk, buf);
- return sdc_lld_read_multiple(sdcp, startblk, buf, n);
-}
-
-/**
- * @brief Writes one or more blocks.
- *
- * @param[in] sdcp pointer to the @p SDCDriver object
- * @param[in] startblk first block to write
- * @param[out] buf pointer to the write buffer
- * @param[in] n number of blocks to write
- * @return The operation status.
- * @retval FALSE operation succeeded, the requested blocks have been
- * written.
- * @retval TRUE operation failed.
- *
- * @notapi
- */
-bool_t sdc_lld_write(SDCDriver *sdcp, uint32_t startblk,
- const uint8_t *buf, uint32_t n) {
-
- #if STM32_SDC_UNALIGNED_SUPPORT
- if (((unsigned)buf & 3) != 0) {
- uint32_t i;
- for (i = 0; i < n; i++) {
- memcpy(u.buf, buf, SDC_BLOCK_SIZE);
- buf += SDC_BLOCK_SIZE;
- if (sdc_lld_write_single(sdcp, startblk, u.buf))
- return TRUE;
- startblk++;
- }
- return FALSE;
- }
-#endif
- if (n == 1)
- return sdc_lld_write_single(sdcp, startblk, buf);
- return sdc_lld_write_multiple(sdcp, startblk, buf, n);
-}
-
-#endif /* HAL_USE_SDC */
-
-/** @} */
diff --git a/os/hal/platforms/STM32/DMAv1/sdc_lld.h b/os/hal/platforms/STM32/DMAv1/sdc_lld.h deleted file mode 100644 index eea76dadd..000000000 --- a/os/hal/platforms/STM32/DMAv1/sdc_lld.h +++ /dev/null @@ -1,203 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file STM32/sdc_lld.h
- * @brief STM32 SDC subsystem low level driver header.
- *
- * @addtogroup SDC
- * @{
- */
-
-#ifndef _SDC_LLD_H_
-#define _SDC_LLD_H_
-
-#if HAL_USE_SDC || defined(__DOXYGEN__)
-
-/*===========================================================================*/
-/* Driver constants. */
-/*===========================================================================*/
-
-
-/*===========================================================================*/
-/* Driver pre-compile time settings. */
-/*===========================================================================*/
-
-/**
- * @brief SDIO data timeout in SDIO clock cycles.
- */
-#if !defined(STM32_SDC_DATATIMEOUT) || defined(__DOXYGEN__)
-#define STM32_SDC_DATATIMEOUT 0x000FFFFF
-#endif
-
-/**
- * @brief SDIO DMA priority (0..3|lowest..highest).
- */
-#if !defined(STM32_SDC_SDIO_DMA_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_SDC_SDIO_DMA_PRIORITY 3
-#endif
-
-/**
- * @brief SDIO interrupt priority level setting.
- */
-#if !defined(STM32_SDC_SDIO_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_SDC_SDIO_IRQ_PRIORITY 9
-#endif
-
-/**
- * @brief SDIO support for unaligned transfers.
- */
-#if !defined(STM32_SDC_UNALIGNED_SUPPORT) || defined(__DOXYGEN__)
-#define STM32_SDC_UNALIGNED_SUPPORT TRUE
-#endif
-
-/*===========================================================================*/
-/* Derived constants and error checks. */
-/*===========================================================================*/
-
-#if !STM32_HAS_SDIO
-#error "SDIO not present in the selected device"
-#endif
-
-#if !defined(STM32_DMA_REQUIRED)
-#define STM32_DMA_REQUIRED
-#endif
-
-/*
- * SDIO clock divider.
- */
-#if STM32_HCLK > 48000000
-#define STM32_SDIO_DIV_HS 0x01
-#define STM32_SDIO_DIV_LS 0xB2
-#else
-#define STM32_SDIO_DIV_HS 0x00
-#define STM32_SDIO_DIV_LS 0x76
-#endif
-
-/*===========================================================================*/
-/* Driver data structures and types. */
-/*===========================================================================*/
-
-/**
- * @brief Type of SDIO bus mode.
- */
-typedef enum {
- SDC_MODE_1BIT = 0,
- SDC_MODE_4BIT,
- SDC_MODE_8BIT
-} sdcbusmode_t;
-
-/**
- * @brief Type of card flags.
- */
-typedef uint32_t sdcmode_t;
-
-/**
- * @brief Type of a structure representing an SDC driver.
- */
-typedef struct SDCDriver SDCDriver;
-
-/**
- * @brief Driver configuration structure.
- * @note It could be empty on some architectures.
- */
-typedef struct {
- uint32_t dummy;
-} SDCConfig;
-
-/**
- * @brief Structure representing an SDC driver.
- */
-struct SDCDriver {
- /**
- * @brief Driver state.
- */
- sdcstate_t state;
- /**
- * @brief Current configuration data.
- */
- const SDCConfig *config;
- /**
- * @brief Various flags regarding the mounted card.
- */
- sdcmode_t cardmode;
- /**
- * @brief Card CID.
- */
- uint32_t cid[4];
- /**
- * @brief Card CSD.
- */
- uint32_t csd[4];
- /**
- * @brief Card RCA.
- */
- uint32_t rca;
- /* End of the mandatory fields.*/
- /**
- * @brief Thread waiting for I/O completion IRQ.
- */
- Thread *thread;
-};
-
-/*===========================================================================*/
-/* Driver macros. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* External declarations. */
-/*===========================================================================*/
-
-#if !defined(__DOXYGEN__)
-extern SDCDriver SDCD1;
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void sdc_lld_init(void);
- void sdc_lld_start(SDCDriver *sdcp);
- void sdc_lld_stop(SDCDriver *sdcp);
- void sdc_lld_start_clk(SDCDriver *sdcp);
- void sdc_lld_set_data_clk(SDCDriver *sdcp);
- void sdc_lld_stop_clk(SDCDriver *sdcp);
- void sdc_lld_set_bus_mode(SDCDriver *sdcp, sdcbusmode_t mode);
- void sdc_lld_send_cmd_none(SDCDriver *sdcp, uint8_t cmd, uint32_t arg);
- bool_t sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
- uint32_t *resp);
- bool_t sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
- uint32_t *resp);
- bool_t sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
- uint32_t *resp);
- bool_t sdc_lld_read(SDCDriver *sdcp, uint32_t startblk,
- uint8_t *buf, uint32_t n);
- bool_t sdc_lld_write(SDCDriver *sdcp, uint32_t startblk,
- const uint8_t *buf, uint32_t n);
- bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp);
- bool_t sdc_lld_is_write_protected(SDCDriver *sdcp);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* HAL_USE_SDC */
-
-#endif /* _SDC_LLD_H_ */
-
-/** @} */
diff --git a/os/hal/platforms/STM32/DMAv1/spi_lld.c b/os/hal/platforms/STM32/DMAv1/spi_lld.c deleted file mode 100644 index 9302b0102..000000000 --- a/os/hal/platforms/STM32/DMAv1/spi_lld.c +++ /dev/null @@ -1,445 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file STM32/spi_lld.c
- * @brief STM32 SPI subsystem low level driver source.
- *
- * @addtogroup SPI
- * @{
- */
-
-#include "ch.h"
-#include "hal.h"
-
-#if HAL_USE_SPI || defined(__DOXYGEN__)
-
-/*===========================================================================*/
-/* Driver exported variables. */
-/*===========================================================================*/
-
-/** @brief SPI1 driver identifier.*/
-#if STM32_SPI_USE_SPI1 || defined(__DOXYGEN__)
-SPIDriver SPID1;
-#endif
-
-/** @brief SPI2 driver identifier.*/
-#if STM32_SPI_USE_SPI2 || defined(__DOXYGEN__)
-SPIDriver SPID2;
-#endif
-
-/** @brief SPI3 driver identifier.*/
-#if STM32_SPI_USE_SPI3 || defined(__DOXYGEN__)
-SPIDriver SPID3;
-#endif
-
-/*===========================================================================*/
-/* Driver local variables. */
-/*===========================================================================*/
-
-static uint16_t dummytx;
-static uint16_t dummyrx;
-
-/*===========================================================================*/
-/* Driver local functions. */
-/*===========================================================================*/
-
-/**
- * @brief Stops the SPI DMA channels.
- *
- * @param[in] spip pointer to the @p SPIDriver object
- */
-#define dma_stop(spip) { \
- dmaStreamDisable(spip->dmatx); \
- dmaStreamDisable(spip->dmarx); \
-}
-
-/**
- * @brief Starts the SPI DMA channels.
- *
- * @param[in] spip pointer to the @p SPIDriver object
- */
-#define dma_start(spip) { \
- dmaChannelEnable((spip)->dmarx); \
- dmaChannelEnable((spip)->dmatx); \
-}
-
-/**
- * @brief Shared end-of-rx service routine.
- *
- * @param[in] spip pointer to the @p SPIDriver object
- * @param[in] flags pre-shifted content of the ISR register
- */
-static void spi_lld_serve_rx_interrupt(SPIDriver *spip, uint32_t flags) {
-
- /* DMA errors handling.*/
-#if defined(STM32_SPI_DMA_ERROR_HOOK)
- if ((flags & STM32_DMA_ISR_TEIF) != 0) {
- STM32_SPI_DMA_ERROR_HOOK(spip);
- }
-#else
- (void)flags;
-#endif
-
- /* Stop everything.*/
- dma_stop(spip);
-
- /* Portable SPI ISR code defined in the high level driver, note, it is
- a macro.*/
- _spi_isr_code(spip);
-}
-
-/**
- * @brief Shared end-of-tx service routine.
- *
- * @param[in] spip pointer to the @p SPIDriver object
- * @param[in] flags pre-shifted content of the ISR register
- */
-static void spi_lld_serve_tx_interrupt(SPIDriver *spip, uint32_t flags) {
-
- /* DMA errors handling.*/
-#if defined(STM32_SPI_DMA_ERROR_HOOK)
- (void)spip;
- if ((flags & STM32_DMA_ISR_TEIF) != 0) {
- STM32_SPI_DMA_ERROR_HOOK(spip);
- }
-#else
- (void)spip;
- (void)flags;
-#endif
-}
-
-/*===========================================================================*/
-/* Driver interrupt handlers. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver exported functions. */
-/*===========================================================================*/
-
-/**
- * @brief Low level SPI driver initialization.
- *
- * @notapi
- */
-void spi_lld_init(void) {
-
- dummytx = 0xFFFF;
-
-#if STM32_SPI_USE_SPI1
- spiObjectInit(&SPID1);
- SPID1.thread = NULL;
- SPID1.spi = SPI1;
- SPID1.dmarx = STM32_DMA1_STREAM2;
- SPID1.dmatx = STM32_DMA1_STREAM3;
-#endif
-
-#if STM32_SPI_USE_SPI2
- spiObjectInit(&SPID2);
- SPID2.thread = NULL;
- SPID2.spi = SPI2;
- SPID2.dmarx = STM32_DMA1_STREAM4;
- SPID2.dmatx = STM32_DMA1_STREAM5;
-#endif
-
-#if STM32_SPI_USE_SPI3
- spiObjectInit(&SPID3);
- SPID3.thread = NULL;
- SPID3.spi = SPI3;
- SPID3.dmarx = STM32_DMA2_STREAM1;
- SPID3.dmatx = STM32_DMA2_STREAM2;
-#endif
-}
-
-/**
- * @brief Configures and activates the SPI peripheral.
- *
- * @param[in] spip pointer to the @p SPIDriver object
- *
- * @notapi
- */
-void spi_lld_start(SPIDriver *spip) {
-
- /* If in stopped state then enables the SPI and DMA clocks.*/
- if (spip->state == SPI_STOP) {
-#if STM32_SPI_USE_SPI1
- if (&SPID1 == spip) {
- bool_t b;
- b = dmaStreamAllocate(STM32_DMA1_STREAM2,
- STM32_SPI_SPI1_IRQ_PRIORITY,
- (stm32_dmaisr_t)spi_lld_serve_rx_interrupt,
- (void *)spip);
- chDbgAssert(!b, "spi_lld_start(), #1", "stream already allocated");
- b = dmaStreamAllocate(STM32_DMA1_STREAM3,
- STM32_SPI_SPI1_IRQ_PRIORITY,
- (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
- (void *)spip);
- chDbgAssert(!b, "spi_lld_start(), #2", "stream already allocated");
- RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
- }
-#endif
-#if STM32_SPI_USE_SPI2
- if (&SPID2 == spip) {
- bool_t b;
- b = dmaStreamAllocate(STM32_DMA1_STREAM4,
- STM32_SPI_SPI2_IRQ_PRIORITY,
- (stm32_dmaisr_t)spi_lld_serve_rx_interrupt,
- (void *)spip);
- chDbgAssert(!b, "spi_lld_start(), #3", "stream already allocated");
- b = dmaStreamAllocate(STM32_DMA1_STREAM5,
- STM32_SPI_SPI2_IRQ_PRIORITY,
- (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
- (void *)spip);
- chDbgAssert(!b, "spi_lld_start(), #4", "stream already allocated");
- RCC->APB1ENR |= RCC_APB1ENR_SPI2EN;
- }
-#endif
-#if STM32_SPI_USE_SPI3
- if (&SPID3 == spip) {
- bool_t b;
- b = dmaStreamAllocate(STM32_DMA1_STREAM1,
- STM32_SPI_SPI3_IRQ_PRIORITY,
- (stm32_dmaisr_t)spi_lld_serve_rx_interrupt,
- (void *)spip);
- chDbgAssert(!b, "spi_lld_start(), #5", "stream already allocated");
- b = dmaStreamAllocate(STM32_DMA1_STREAM2,
- STM32_SPI_SPI3_IRQ_PRIORITY,
- (stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
- (void *)spip);
- chDbgAssert(!b, "spi_lld_start(), #6", "stream already allocated");
- RCC->APB1ENR |= RCC_APB1ENR_SPI3EN;
- }
-#endif
-
- /* DMA setup.*/
- dmaStreamSetPeripheral(spip->dmarx, &spip->spi->DR);
- dmaStreamSetPeripheral(spip->dmatx, &spip->spi->DR);
- }
-
- /* More DMA setup.*/
- if ((spip->config->cr1 & SPI_CR1_DFF) == 0)
- spip->dmamode = STM32_DMA_CR_PL(STM32_SPI_SPI2_DMA_PRIORITY) |
- STM32_DMA_CR_TEIE |
- STM32_DMA_CR_PSIZE_BYTE |
- STM32_DMA_CR_MSIZE_BYTE; /* 8 bits transfers. */
- else
- spip->dmamode = STM32_DMA_CR_PL(STM32_SPI_SPI2_DMA_PRIORITY) |
- STM32_DMA_CR_TEIE |
- STM32_DMA_CR_PSIZE_HWORD |
- STM32_DMA_CR_MSIZE_HWORD; /* 16 bits transfers. */
-
- /* SPI setup and enable.*/
- spip->spi->CR1 = 0;
- spip->spi->CR1 = spip->config->cr1 | SPI_CR1_MSTR | SPI_CR1_SSM |
- SPI_CR1_SSI;
- spip->spi->CR2 = SPI_CR2_SSOE | SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN;
- spip->spi->CR1 |= SPI_CR1_SPE;
-}
-
-/**
- * @brief Deactivates the SPI peripheral.
- *
- * @param[in] spip pointer to the @p SPIDriver object
- *
- * @notapi
- */
-void spi_lld_stop(SPIDriver *spip) {
-
- /* If in ready state then disables the SPI clock.*/
- if (spip->state == SPI_READY) {
-
- /* SPI disable.*/
- spip->spi->CR1 = 0;
-
-#if STM32_SPI_USE_SPI1
- if (&SPID1 == spip) {
- dmaStreamRelease(STM32_DMA1_STREAM2);
- dmaStreamRelease(STM32_DMA1_STREAM3);
- RCC->APB2ENR &= ~RCC_APB2ENR_SPI1EN;
- }
-#endif
-#if STM32_SPI_USE_SPI2
- if (&SPID2 == spip) {
- dmaStreamRelease(STM32_DMA1_STREAM4);
- dmaStreamRelease(STM32_DMA1_STREAM5);
- RCC->APB1ENR &= ~RCC_APB1ENR_SPI2EN;
- }
-#endif
-#if STM32_SPI_USE_SPI3
- if (&SPID3 == spip) {
- dmaStreamRelease(STM32_DMA1_STREAM1);
- dmaStreamRelease(STM32_DMA1_STREAM2);
- RCC->APB1ENR &= ~RCC_APB1ENR_SPI3EN;
- }
-#endif
- }
-}
-
-/**
- * @brief Asserts the slave select signal and prepares for transfers.
- *
- * @param[in] spip pointer to the @p SPIDriver object
- *
- * @notapi
- */
-void spi_lld_select(SPIDriver *spip) {
-
- palClearPad(spip->config->ssport, spip->config->sspad);
-}
-
-/**
- * @brief Deasserts the slave select signal.
- * @details The previously selected peripheral is unselected.
- *
- * @param[in] spip pointer to the @p SPIDriver object
- *
- * @notapi
- */
-void spi_lld_unselect(SPIDriver *spip) {
-
- palSetPad(spip->config->ssport, spip->config->sspad);
-}
-
-/**
- * @brief Ignores data on the SPI bus.
- * @details This asynchronous function starts the transmission of a series of
- * idle words on the SPI bus and ignores the received data.
- * @post At the end of the operation the configured callback is invoked.
- *
- * @param[in] spip pointer to the @p SPIDriver object
- * @param[in] n number of words to be ignored
- *
- * @notapi
- */
-void spi_lld_ignore(SPIDriver *spip, size_t n) {
-
- dmaStreamSetMemory0(spip->dmarx, &dummyrx);
- dmaStreamSetTransactionSize(spip->dmarx, n);
- dmaStreamSetMode(spip->dmarx, spip->dmamode | STM32_DMA_CR_DIR_P2M |
- STM32_DMA_CR_TCIE | STM32_DMA_CR_EN);
- dmaStreamSetMemory0(spip->dmatx, &dummytx);
- dmaStreamSetTransactionSize(spip->dmatx, n);
- dmaStreamSetMode(spip->dmatx, spip->dmamode | STM32_DMA_CR_DIR_M2P |
- STM32_DMA_CR_EN);
-}
-
-/**
- * @brief Exchanges data on the SPI bus.
- * @details This asynchronous function starts a simultaneous transmit/receive
- * operation.
- * @post At the end of the operation the configured callback is invoked.
- * @note The buffers are organized as uint8_t arrays for data sizes below or
- * equal to 8 bits else it is organized as uint16_t arrays.
- *
- * @param[in] spip pointer to the @p SPIDriver object
- * @param[in] n number of words to be exchanged
- * @param[in] txbuf the pointer to the transmit buffer
- * @param[out] rxbuf the pointer to the receive buffer
- *
- * @notapi
- */
-void spi_lld_exchange(SPIDriver *spip, size_t n,
- const void *txbuf, void *rxbuf) {
-
- dmaStreamSetMemory0(spip->dmarx, rxbuf);
- dmaStreamSetTransactionSize(spip->dmarx, n);
- dmaStreamSetMode(spip->dmarx, spip->dmamode | STM32_DMA_CR_DIR_P2M |
- STM32_DMA_CR_TCIE | STM32_DMA_CR_MINC |
- STM32_DMA_CR_EN);
- dmaStreamSetMemory0(spip->dmatx, txbuf);
- dmaStreamSetTransactionSize(spip->dmatx, n);
- dmaStreamSetMode(spip->dmatx, spip->dmamode | STM32_DMA_CR_DIR_M2P |
- STM32_DMA_CR_MINC | STM32_DMA_CR_EN);
-}
-
-/**
- * @brief Sends data over the SPI bus.
- * @details This asynchronous function starts a transmit operation.
- * @post At the end of the operation the configured callback is invoked.
- * @note The buffers are organized as uint8_t arrays for data sizes below or
- * equal to 8 bits else it is organized as uint16_t arrays.
- *
- * @param[in] spip pointer to the @p SPIDriver object
- * @param[in] n number of words to send
- * @param[in] txbuf the pointer to the transmit buffer
- *
- * @notapi
- */
-void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
-
- dmaStreamSetMemory0(spip->dmarx, &dummyrx);
- dmaStreamSetTransactionSize(spip->dmarx, n);
- dmaStreamSetMode(spip->dmarx, spip->dmamode | STM32_DMA_CR_DIR_P2M |
- STM32_DMA_CR_TCIE | STM32_DMA_CR_EN);
- dmaStreamSetMemory0(spip->dmatx, txbuf);
- dmaStreamSetTransactionSize(spip->dmatx, n);
- dmaStreamSetMode(spip->dmatx, spip->dmamode | STM32_DMA_CR_DIR_M2P |
- STM32_DMA_CR_MINC | STM32_DMA_CR_EN);
-}
-
-/**
- * @brief Receives data from the SPI bus.
- * @details This asynchronous function starts a receive operation.
- * @post At the end of the operation the configured callback is invoked.
- * @note The buffers are organized as uint8_t arrays for data sizes below or
- * equal to 8 bits else it is organized as uint16_t arrays.
- *
- * @param[in] spip pointer to the @p SPIDriver object
- * @param[in] n number of words to receive
- * @param[out] rxbuf the pointer to the receive buffer
- *
- * @notapi
- */
-void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {
-
- dmaStreamSetMemory0(spip->dmarx, rxbuf);
- dmaStreamSetTransactionSize(spip->dmarx, n);
- dmaStreamSetMode(spip->dmarx, spip->dmamode | STM32_DMA_CR_DIR_P2M |
- STM32_DMA_CR_TCIE | STM32_DMA_CR_MINC |
- STM32_DMA_CR_EN);
- dmaStreamSetMemory0(spip->dmatx, &dummytx);
- dmaStreamSetTransactionSize(spip->dmatx, n);
- dmaStreamSetMode(spip->dmatx, spip->dmamode | STM32_DMA_CR_DIR_M2P |
- STM32_DMA_CR_EN);
-}
-
-/**
- * @brief Exchanges one frame using a polled wait.
- * @details This synchronous function exchanges one frame using a polled
- * synchronization method. This function is useful when exchanging
- * small amount of data on high speed channels, usually in this
- * situation is much more efficient just wait for completion using
- * polling than suspending the thread waiting for an interrupt.
- *
- * @param[in] spip pointer to the @p SPIDriver object
- * @param[in] frame the data frame to send over the SPI bus
- * @return The received data frame from the SPI bus.
- */
-uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) {
-
- spip->spi->DR = frame;
- while ((spip->spi->SR & SPI_SR_RXNE) == 0)
- ;
- return spip->spi->DR;
-}
-
-#endif /* HAL_USE_SPI */
-
-/** @} */
diff --git a/os/hal/platforms/STM32/DMAv1/spi_lld.h b/os/hal/platforms/STM32/DMAv1/spi_lld.h deleted file mode 100644 index c8c1e0661..000000000 --- a/os/hal/platforms/STM32/DMAv1/spi_lld.h +++ /dev/null @@ -1,285 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file STM32/spi_lld.h
- * @brief STM32 SPI subsystem low level driver header.
- *
- * @addtogroup SPI
- * @{
- */
-
-#ifndef _SPI_LLD_H_
-#define _SPI_LLD_H_
-
-#if HAL_USE_SPI || defined(__DOXYGEN__)
-
-/*===========================================================================*/
-/* Driver constants. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver pre-compile time settings. */
-/*===========================================================================*/
-
-/**
- * @brief SPI1 driver enable switch.
- * @details If set to @p TRUE the support for SPI1 is included.
- * @note The default is @p TRUE.
- */
-#if !defined(STM32_SPI_USE_SPI1) || defined(__DOXYGEN__)
-#define STM32_SPI_USE_SPI1 TRUE
-#endif
-
-/**
- * @brief SPI2 driver enable switch.
- * @details If set to @p TRUE the support for SPI2 is included.
- * @note The default is @p TRUE.
- */
-#if !defined(STM32_SPI_USE_SPI2) || defined(__DOXYGEN__)
-#define STM32_SPI_USE_SPI2 TRUE
-#endif
-
-/**
- * @brief SPI3 driver enable switch.
- * @details If set to @p TRUE the support for SPI3 is included.
- * @note The default is @p TRUE.
- */
-#if !defined(STM32_SPI_USE_SPI3) || defined(__DOXYGEN__)
-#define STM32_SPI_USE_SPI3 FALSE
-#endif
-
-/**
- * @brief SPI1 DMA priority (0..3|lowest..highest).
- * @note The priority level is used for both the TX and RX DMA channels but
- * because of the channels ordering the RX channel has always priority
- * over the TX channel.
- */
-#if !defined(STM32_SPI_SPI1_DMA_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_SPI_SPI1_DMA_PRIORITY 1
-#endif
-
-/**
- * @brief SPI2 DMA priority (0..3|lowest..highest).
- * @note The priority level is used for both the TX and RX DMA channels but
- * because of the channels ordering the RX channel has always priority
- * over the TX channel.
- */
-#if !defined(STM32_SPI_SPI2_DMA_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_SPI_SPI2_DMA_PRIORITY 1
-#endif
-
-/**
- * @brief SPI3 DMA priority (0..3|lowest..highest).
- * @note The priority level is used for both the TX and RX DMA channels but
- * because of the channels ordering the RX channel has always priority
- * over the TX channel.
- */
-#if !defined(STM32_SPI_SPI3_DMA_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_SPI_SPI3_DMA_PRIORITY 1
-#endif
-
-/**
- * @brief SPI1 interrupt priority level setting.
- */
-#if !defined(STM32_SPI_SPI1_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_SPI_SPI1_IRQ_PRIORITY 10
-#endif
-
-/**
- * @brief SPI2 interrupt priority level setting.
- */
-#if !defined(STM32_SPI_SPI2_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_SPI_SPI2_IRQ_PRIORITY 10
-#endif
-
-/**
- * @brief SPI3 interrupt priority level setting.
- */
-#if !defined(STM32_SPI_SPI3_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_SPI_SPI3_IRQ_PRIORITY 10
-#endif
-
-/**
- * @brief SPI DMA error hook.
- * @note The default action for DMA errors is a system halt because DMA
- * error can only happen because programming errors.
- */
-#if !defined(STM32_SPI_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
-#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt()
-#endif
-
-/*===========================================================================*/
-/* Derived constants and error checks. */
-/*===========================================================================*/
-
-#if STM32_SPI_USE_SPI1 && !STM32_HAS_SPI1
-#error "SPI1 not present in the selected device"
-#endif
-
-#if STM32_SPI_USE_SPI2 && !STM32_HAS_SPI2
-#error "SPI2 not present in the selected device"
-#endif
-
-#if STM32_SPI_USE_SPI3 && !STM32_HAS_SPI3
-#error "SPI3 not present in the selected device"
-#endif
-
-#if !STM32_SPI_USE_SPI1 && !STM32_SPI_USE_SPI2 && !STM32_SPI_USE_SPI3
-#error "SPI driver activated but no SPI peripheral assigned"
-#endif
-
-#if !defined(STM32_DMA_REQUIRED)
-#define STM32_DMA_REQUIRED
-#endif
-
-/*===========================================================================*/
-/* Driver data structures and types. */
-/*===========================================================================*/
-
-/**
- * @brief Type of a structure representing an SPI driver.
- */
-typedef struct SPIDriver SPIDriver;
-
-/**
- * @brief SPI notification callback type.
- *
- * @param[in] spip pointer to the @p SPIDriver object triggering the
- * callback
- */
-typedef void (*spicallback_t)(SPIDriver *spip);
-
-/**
- * @brief Driver configuration structure.
- */
-typedef struct {
- /**
- * @brief Operation complete callback or @p NULL.
- */
- spicallback_t end_cb;
- /* End of the mandatory fields.*/
- /**
- * @brief The chip select line port.
- */
- ioportid_t ssport;
- /**
- * @brief The chip select line pad number.
- */
- uint16_t sspad;
- /**
- * @brief SPI initialization data.
- */
- uint16_t cr1;
-} SPIConfig;
-
-/**
- * @brief Structure representing a SPI driver.
- */
-struct SPIDriver{
- /**
- * @brief Driver state.
- */
- spistate_t state;
- /**
- * @brief Current configuration data.
- */
- const SPIConfig *config;
-#if SPI_USE_WAIT || defined(__DOXYGEN__)
- /**
- * @brief Waiting thread.
- */
- Thread *thread;
-#endif /* SPI_USE_WAIT */
-#if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
-#if CH_USE_MUTEXES || defined(__DOXYGEN__)
- /**
- * @brief Mutex protecting the bus.
- */
- Mutex mutex;
-#elif CH_USE_SEMAPHORES
- Semaphore semaphore;
-#endif
-#endif /* SPI_USE_MUTUAL_EXCLUSION */
-#if defined(SPI_DRIVER_EXT_FIELDS)
- SPI_DRIVER_EXT_FIELDS
-#endif
- /* End of the mandatory fields.*/
- /**
- * @brief Pointer to the SPIx registers block.
- */
- SPI_TypeDef *spi;
- /**
- * @brief Receive DMA channel.
- */
- const stm32_dma_stream_t *dmarx;
- /**
- * @brief Transmit DMA channel.
- */
- const stm32_dma_stream_t *dmatx;
- /**
- * @brief DMA mode bit mask.
- */
- uint32_t dmamode;
-};
-
-/*===========================================================================*/
-/* Driver macros. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* External declarations. */
-/*===========================================================================*/
-
-#if STM32_SPI_USE_SPI1 && !defined(__DOXYGEN__)
-extern SPIDriver SPID1;
-#endif
-
-#if STM32_SPI_USE_SPI2 && !defined(__DOXYGEN__)
-extern SPIDriver SPID2;
-#endif
-
-#if STM32_SPI_USE_SPI3 && !defined(__DOXYGEN__)
-extern SPIDriver SPID3;
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void spi_lld_init(void);
- void spi_lld_start(SPIDriver *spip);
- void spi_lld_stop(SPIDriver *spip);
- void spi_lld_select(SPIDriver *spip);
- void spi_lld_unselect(SPIDriver *spip);
- void spi_lld_ignore(SPIDriver *spip, size_t n);
- void spi_lld_exchange(SPIDriver *spip, size_t n,
- const void *txbuf, void *rxbuf);
- void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf);
- void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf);
- uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* HAL_USE_SPI */
-
-#endif /* _SPI_LLD_H_ */
-
-/** @} */
diff --git a/os/hal/platforms/STM32/DMAv1/uart_lld.c b/os/hal/platforms/STM32/DMAv1/uart_lld.c deleted file mode 100644 index a9303744d..000000000 --- a/os/hal/platforms/STM32/DMAv1/uart_lld.c +++ /dev/null @@ -1,557 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file STM32/uart_lld.c
- * @brief STM32 low level UART driver code.
- *
- * @addtogroup UART
- * @{
- */
-
-#include "ch.h"
-#include "hal.h"
-
-#if HAL_USE_UART || defined(__DOXYGEN__)
-
-/*===========================================================================*/
-/* Driver exported variables. */
-/*===========================================================================*/
-
-/** @brief USART1 UART driver identifier.*/
-#if STM32_UART_USE_USART1 || defined(__DOXYGEN__)
-UARTDriver UARTD1;
-#endif
-
-/** @brief USART2 UART driver identifier.*/
-#if STM32_UART_USE_USART2 || defined(__DOXYGEN__)
-UARTDriver UARTD2;
-#endif
-
-/** @brief USART3 UART driver identifier.*/
-#if STM32_UART_USE_USART3 || defined(__DOXYGEN__)
-UARTDriver UARTD3;
-#endif
-
-/*===========================================================================*/
-/* Driver local variables. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver local functions. */
-/*===========================================================================*/
-
-/**
- * @brief Status bits translation.
- *
- * @param[in] sr USART SR register value
- *
- * @return The error flags.
- */
-static uartflags_t translate_errors(uint16_t sr) {
- uartflags_t sts = 0;
-
- if (sr & USART_SR_ORE)
- sts |= UART_OVERRUN_ERROR;
- if (sr & USART_SR_PE)
- sts |= UART_PARITY_ERROR;
- if (sr & USART_SR_FE)
- sts |= UART_FRAMING_ERROR;
- if (sr & USART_SR_NE)
- sts |= UART_NOISE_ERROR;
- if (sr & USART_SR_LBD)
- sts |= UART_BREAK_DETECTED;
- return sts;
-}
-
-/**
- * @brief Puts the receiver in the UART_RX_IDLE state.
- *
- * @param[in] uartp pointer to the @p UARTDriver object
- */
-static void set_rx_idle_loop(UARTDriver *uartp) {
- uint32_t mode;
-
- /* RX DMA channel preparation, if the char callback is defined then the
- TCIE interrupt is enabled too.*/
- if (uartp->config->rxchar_cb == NULL)
- mode = STM32_DMA_CR_DIR_P2M | STM32_DMA_CR_CIRC | STM32_DMA_CR_TEIE;
- else
- mode = STM32_DMA_CR_DIR_P2M | STM32_DMA_CR_CIRC | STM32_DMA_CR_TEIE |
- STM32_DMA_CR_TCIE;
- dmaStreamSetMemory0(uartp->dmarx, &uartp->rxbuf);
- dmaStreamSetTransactionSize(uartp->dmarx, 1);
- dmaStreamSetMode(uartp->dmarx, uartp->dmamode | mode);
- dmaStreamEnable(uartp->dmarx);
-}
-
-/**
- * @brief USART de-initialization.
- * @details This function must be invoked with interrupts disabled.
- *
- * @param[in] uartp pointer to the @p UARTDriver object
- */
-static void usart_stop(UARTDriver *uartp) {
-
- /* Stops RX and TX DMA channels.*/
- dmaStreamDisable(uartp->dmarx);
- dmaStreamClearInterrupt(uartp->dmarx);
- dmaStreamDisable(uartp->dmatx);
- dmaStreamClearInterrupt(uartp->dmatx);
-
- /* Stops USART operations.*/
- uartp->usart->CR1 = 0;
- uartp->usart->CR2 = 0;
- uartp->usart->CR3 = 0;
-}
-
-/**
- * @brief USART initialization.
- * @details This function must be invoked with interrupts disabled.
- *
- * @param[in] uartp pointer to the @p UARTDriver object
- */
-static void usart_start(UARTDriver *uartp) {
- uint16_t cr1;
- USART_TypeDef *u = uartp->usart;
-
- /* Defensive programming, starting from a clean state.*/
- usart_stop(uartp);
-
- /* Baud rate setting.*/
- if (uartp->usart == USART1)
- u->BRR = STM32_PCLK2 / uartp->config->speed;
- else
- u->BRR = STM32_PCLK1 / uartp->config->speed;
-
- /* Resetting eventual pending status flags.*/
- (void)u->SR; /* SR reset step 1.*/
- (void)u->DR; /* SR reset step 2.*/
- u->SR = 0;
-
- /* Note that some bits are enforced because required for correct driver
- operations.*/
- if (uartp->config->txend2_cb == NULL)
- cr1 = USART_CR1_UE | USART_CR1_PEIE | USART_CR1_TE | USART_CR1_RE;
- else
- cr1 = USART_CR1_UE | USART_CR1_PEIE | USART_CR1_TE | USART_CR1_RE |
- USART_CR1_TCIE;
- u->CR1 = uartp->config->cr1 | cr1;
- u->CR2 = uartp->config->cr2 | USART_CR2_LBDIE;
- u->CR3 = uartp->config->cr3 | USART_CR3_DMAT | USART_CR3_DMAR |
- USART_CR3_EIE;
-
- /* Starting the receiver idle loop.*/
- set_rx_idle_loop(uartp);
-}
-
-/**
- * @brief RX DMA common service routine.
- *
- * @param[in] uartp pointer to the @p UARTDriver object
- * @param[in] flags pre-shifted content of the ISR register
- */
-static void uart_lld_serve_rx_end_irq(UARTDriver *uartp, uint32_t flags) {
-
- /* DMA errors handling.*/
-#if defined(STM32_UART_DMA_ERROR_HOOK)
- if ((flags & STM32_DMA_ISR_TEIF) != 0) {
- STM32_UART_DMA_ERROR_HOOK(uartp);
- }
-#else
- (void)flags;
-#endif
-
- if (uartp->rxstate == UART_RX_IDLE) {
- /* Receiver in idle state, a callback is generated, if enabled, for each
- received character and then the driver stays in the same state.*/
- if (uartp->config->rxchar_cb != NULL)
- uartp->config->rxchar_cb(uartp, uartp->rxbuf);
- }
- else {
- /* Receiver in active state, a callback is generated, if enabled, after
- a completed transfer.*/
- dmaStreamDisable(uartp->dmarx);
- uartp->rxstate = UART_RX_COMPLETE;
- if (uartp->config->rxend_cb != NULL)
- uartp->config->rxend_cb(uartp);
- /* If the callback didn't explicitly change state then the receiver
- automatically returns to the idle state.*/
- if (uartp->rxstate == UART_RX_COMPLETE) {
- uartp->rxstate = UART_RX_IDLE;
- set_rx_idle_loop(uartp);
- }
- }
-}
-
-/**
- * @brief TX DMA common service routine.
- *
- * @param[in] uartp pointer to the @p UARTDriver object
- * @param[in] flags pre-shifted content of the ISR register
- */
-static void uart_lld_serve_tx_end_irq(UARTDriver *uartp, uint32_t flags) {
-
- /* DMA errors handling.*/
-#if defined(STM32_UART_DMA_ERROR_HOOK)
- if ((flags & STM32_DMA_ISR_TEIF) != 0) {
- STM32_UART_DMA_ERROR_HOOK(uartp);
- }
-#else
- (void)flags;
-#endif
-
- dmaStreamDisable(uartp->dmatx);
- /* A callback is generated, if enabled, after a completed transfer.*/
- uartp->txstate = UART_TX_COMPLETE;
- if (uartp->config->txend1_cb != NULL)
- uartp->config->txend1_cb(uartp);
- /* If the callback didn't explicitly change state then the transmitter
- automatically returns to the idle state.*/
- if (uartp->txstate == UART_TX_COMPLETE)
- uartp->txstate = UART_TX_IDLE;
-}
-
-/**
- * @brief USART common service routine.
- *
- * @param[in] uartp pointer to the @p UARTDriver object
- */
-static void serve_usart_irq(UARTDriver *uartp) {
- uint16_t sr;
- USART_TypeDef *u = uartp->usart;
-
- sr = u->SR; /* SR reset step 1.*/
- (void)u->DR; /* SR reset step 2.*/
- if (sr & (USART_SR_LBD | USART_SR_ORE | USART_SR_NE |
- USART_SR_FE | USART_SR_PE)) {
- u->SR = ~USART_SR_LBD;
- if (uartp->config->rxerr_cb != NULL)
- uartp->config->rxerr_cb(uartp, translate_errors(sr));
- }
- if (sr & USART_SR_TC) {
- u->SR = ~USART_SR_TC;
- /* End of transmission, a callback is generated.*/
- if (uartp->config->txend2_cb != NULL)
- uartp->config->txend2_cb(uartp);
- }
-}
-
-/*===========================================================================*/
-/* Driver interrupt handlers. */
-/*===========================================================================*/
-
-#if STM32_UART_USE_USART1 || defined(__DOXYGEN__)
-/**
- * @brief USART1 IRQ handler.
- *
- * @isr
- */
-CH_IRQ_HANDLER(USART1_IRQHandler) {
-
- CH_IRQ_PROLOGUE();
-
- serve_usart_irq(&UARTD1);
-
- CH_IRQ_EPILOGUE();
-}
-#endif /* STM32_UART_USE_USART1 */
-
-#if STM32_UART_USE_USART2 || defined(__DOXYGEN__)
-/**
- * @brief USART2 IRQ handler.
- *
- * @isr
- */
-CH_IRQ_HANDLER(USART2_IRQHandler) {
-
- CH_IRQ_PROLOGUE();
-
- serve_usart_irq(&UARTD2);
-
- CH_IRQ_EPILOGUE();
-}
-#endif /* STM32_UART_USE_USART2 */
-
-#if STM32_UART_USE_USART3 || defined(__DOXYGEN__)
-/**
- * @brief USART3 IRQ handler.
- *
- * @isr
- */
-CH_IRQ_HANDLER(USART3_IRQHandler) {
-
- CH_IRQ_PROLOGUE();
-
- serve_usart_irq(&UARTD3);
-
- CH_IRQ_EPILOGUE();
-}
-#endif /* STM32_UART_USE_USART3 */
-
-/*===========================================================================*/
-/* Driver exported functions. */
-/*===========================================================================*/
-
-/**
- * @brief Low level UART driver initialization.
- *
- * @notapi
- */
-void uart_lld_init(void) {
-
-#if STM32_UART_USE_USART1
- uartObjectInit(&UARTD1);
- UARTD1.usart = USART1;
- UARTD1.dmarx = STM32_DMA1_STREAM5;
- UARTD1.dmatx = STM32_DMA1_STREAM4;
-#endif
-
-#if STM32_UART_USE_USART2
- uartObjectInit(&UARTD2);
- UARTD2.usart = USART2;
- UARTD2.dmarx = STM32_DMA1_STREAM6;
- UARTD2.dmatx = STM32_DMA1_STREAM7;
-#endif
-
-#if STM32_UART_USE_USART3
- uartObjectInit(&UARTD3);
- UARTD3.usart = USART3;
- UARTD3.dmarx = STM32_DMA1_STREAM3;
- UARTD3.dmatx = STM32_DMA1_STREAM2;
-#endif
-}
-
-/**
- * @brief Configures and activates the UART peripheral.
- *
- * @param[in] uartp pointer to the @p UARTDriver object
- *
- * @notapi
- */
-void uart_lld_start(UARTDriver *uartp) {
-
- if (uartp->state == UART_STOP) {
-#if STM32_UART_USE_USART1
- if (&UARTD1 == uartp) {
- bool_t b;
- b = dmaStreamAllocate(STM32_DMA1_STREAM4,
- STM32_UART_USART1_IRQ_PRIORITY,
- (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
- (void *)uartp);
- chDbgAssert(!b, "uart_lld_start(), #1", "stream already allocated");
- b = dmaStreamAllocate(STM32_DMA1_STREAM5,
- STM32_UART_USART1_IRQ_PRIORITY,
- (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
- (void *)uartp);
- chDbgAssert(!b, "uart_lld_start(), #2", "stream already allocated");
- RCC->APB2ENR |= RCC_APB2ENR_USART1EN;
- NVICEnableVector(USART1_IRQn,
- CORTEX_PRIORITY_MASK(STM32_UART_USART1_IRQ_PRIORITY));
- }
-#endif
-
-#if STM32_UART_USE_USART2
- if (&UARTD2 == uartp) {
- bool_t b;
- b = dmaStreamAllocate(STM32_DMA1_STREAM6,
- STM32_UART_USART2_IRQ_PRIORITY,
- (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
- (void *)uartp);
- chDbgAssert(!b, "uart_lld_start(), #3", "stream already allocated");
- b = dmaStreamAllocate(STM32_DMA1_STREAM7,
- STM32_UART_USART2_IRQ_PRIORITY,
- (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
- (void *)uartp);
- chDbgAssert(!b, "uart_lld_start(), #4", "stream already allocated");
- RCC->APB1ENR |= RCC_APB1ENR_USART2EN;
- NVICEnableVector(USART2_IRQn,
- CORTEX_PRIORITY_MASK(STM32_UART_USART2_IRQ_PRIORITY));
- }
-#endif
-
-#if STM32_UART_USE_USART3
- if (&UARTD3 == uartp) {
- bool_t b;
- b = dmaStreamAllocate(STM32_DMA1_STREAM2,
- STM32_UART_USART3_IRQ_PRIORITY,
- (stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
- (void *)uartp);
- chDbgAssert(!b, "uart_lld_start(), #5", "stream already allocated");
- b = dmaStreamAllocate(STM32_DMA1_STREAM3,
- STM32_UART_USART3_IRQ_PRIORITY,
- (stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
- (void *)uartp);
- chDbgAssert(!b, "uart_lld_start(), #6", "stream already allocated");
- RCC->APB1ENR |= RCC_APB1ENR_USART3EN;
- NVICEnableVector(USART3_IRQn,
- CORTEX_PRIORITY_MASK(STM32_UART_USART3_IRQ_PRIORITY));
- }
-#endif
-
- /* Static DMA setup, the transfer size depends on the USART settings,
- it is 16 bits if M=1 and PCE=0 else it is 8 bits.*/
- uartp->dmamode = STM32_DMA_CR_PL(STM32_UART_USART1_DMA_PRIORITY);
- if ((uartp->config->cr1 & (USART_CR1_M | USART_CR1_PCE)) == USART_CR1_M)
- uartp->dmamode |= STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
- dmaStreamSetPeripheral(uartp->dmarx, &uartp->usart->DR);
- dmaStreamSetPeripheral(uartp->dmatx, &uartp->usart->DR);
- uartp->rxbuf = 0;
- }
-
- uartp->rxstate = UART_RX_IDLE;
- uartp->txstate = UART_TX_IDLE;
- usart_start(uartp);
-}
-
-/**
- * @brief Deactivates the UART peripheral.
- *
- * @param[in] uartp pointer to the @p UARTDriver object
- *
- * @notapi
- */
-void uart_lld_stop(UARTDriver *uartp) {
-
- if (uartp->state == UART_READY) {
- usart_stop(uartp);
-
-#if STM32_UART_USE_USART1
- if (&UARTD1 == uartp) {
- dmaStreamRelease(STM32_DMA1_STREAM4);
- dmaStreamRelease(STM32_DMA1_STREAM5);
- NVICDisableVector(USART1_IRQn);
- RCC->APB2ENR &= ~RCC_APB2ENR_USART1EN;
- return;
- }
-#endif
-
-#if STM32_UART_USE_USART2
- if (&UARTD2 == uartp) {
- dmaStreamRelease(STM32_DMA1_STREAM6);
- dmaStreamRelease(STM32_DMA1_STREAM7);
- NVICDisableVector(USART2_IRQn);
- RCC->APB1ENR &= ~RCC_APB1ENR_USART2EN;
- return;
- }
-#endif
-
-#if STM32_UART_USE_USART3
- if (&UARTD3 == uartp) {
- dmaStreamRelease(STM32_DMA1_STREAM2);
- dmaStreamRelease(STM32_DMA1_STREAM3);
- NVICDisableVector(USART3_IRQn);
- RCC->APB1ENR &= ~RCC_APB1ENR_USART3EN;
- return;
- }
-#endif
- }
-}
-
-/**
- * @brief Starts a transmission on the UART peripheral.
- * @note The buffers are organized as uint8_t arrays for data sizes below
- * or equal to 8 bits else it is organized as uint16_t arrays.
- *
- * @param[in] uartp pointer to the @p UARTDriver object
- * @param[in] n number of data frames to send
- * @param[in] txbuf the pointer to the transmit buffer
- *
- * @notapi
- */
-void uart_lld_start_send(UARTDriver *uartp, size_t n, const void *txbuf) {
-
- /* TX DMA channel preparation and start.*/
- dmaStreamSetMemory0(uartp->dmatx, txbuf);
- dmaStreamSetTransactionSize(uartp->dmatx, n);
- dmaStreamSetMode(uartp->dmatx, uartp->dmamode | STM32_DMA_CR_DIR_M2P |
- STM32_DMA_CR_MINC | STM32_DMA_CR_TEIE |
- STM32_DMA_CR_TCIE);
- dmaStreamEnable(uartp->dmatx);
-}
-
-/**
- * @brief Stops any ongoing transmission.
- * @note Stopping a transmission also suppresses the transmission callbacks.
- *
- * @param[in] uartp pointer to the @p UARTDriver object
- *
- * @return The number of data frames not transmitted by the
- * stopped transmit operation.
- *
- * @notapi
- */
-size_t uart_lld_stop_send(UARTDriver *uartp) {
-
- dmaStreamDisable(uartp->dmatx);
- dmaStreamClearInterrupt(uartp->dmatx);
- return dmaStreamGetTransactionSize(uartp->dmatx);
-}
-
-/**
- * @brief Starts a receive operation on the UART peripheral.
- * @note The buffers are organized as uint8_t arrays for data sizes below
- * or equal to 8 bits else it is organized as uint16_t arrays.
- *
- * @param[in] uartp pointer to the @p UARTDriver object
- * @param[in] n number of data frames to send
- * @param[out] rxbuf the pointer to the receive buffer
- *
- * @notapi
- */
-void uart_lld_start_receive(UARTDriver *uartp, size_t n, void *rxbuf) {
-
- /* Stopping previous activity (idle state).*/
- dmaStreamDisable(uartp->dmarx);
- dmaStreamClearInterrupt(uartp->dmarx);
-
- /* RX DMA channel preparation and start.*/
- dmaStreamSetMemory0(uartp->dmarx, rxbuf);
- dmaStreamSetTransactionSize(uartp->dmarx, n);
- dmaStreamSetMode(uartp->dmarx, uartp->dmamode | STM32_DMA_CR_DIR_P2M |
- STM32_DMA_CR_MINC | STM32_DMA_CR_TEIE |
- STM32_DMA_CR_TCIE);
- dmaStreamEnable(uartp->dmarx);
-}
-
-/**
- * @brief Stops any ongoing receive operation.
- * @note Stopping a receive operation also suppresses the receive callbacks.
- *
- * @param[in] uartp pointer to the @p UARTDriver object
- *
- * @return The number of data frames not received by the
- * stopped receive operation.
- *
- * @notapi
- */
-size_t uart_lld_stop_receive(UARTDriver *uartp) {
- size_t n;
-
- dmaStreamDisable(uartp->dmarx);
- dmaStreamClearInterrupt(uartp->dmarx);
- n = dmaStreamGetTransactionSize(uartp->dmarx);
- set_rx_idle_loop(uartp);
- return n;
-}
-
-#endif /* HAL_USE_UART */
-
-/** @} */
diff --git a/os/hal/platforms/STM32/DMAv1/uart_lld.h b/os/hal/platforms/STM32/DMAv1/uart_lld.h deleted file mode 100644 index aff7f52ba..000000000 --- a/os/hal/platforms/STM32/DMAv1/uart_lld.h +++ /dev/null @@ -1,318 +0,0 @@ -/*
- ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
- 2011 Giovanni Di Sirio.
-
- This file is part of ChibiOS/RT.
-
- ChibiOS/RT is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS/RT is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file STM32/uart_lld.h
- * @brief STM32 low level UART driver header.
- *
- * @addtogroup UART
- * @{
- */
-
-#ifndef _UART_LLD_H_
-#define _UART_LLD_H_
-
-#if HAL_USE_UART || defined(__DOXYGEN__)
-
-/*===========================================================================*/
-/* Driver constants. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver pre-compile time settings. */
-/*===========================================================================*/
-
-/**
- * @brief UART driver on USART1 enable switch.
- * @details If set to @p TRUE the support for USART1 is included.
- * @note The default is @p FALSE.
- */
-#if !defined(STM32_UART_USE_USART1) || defined(__DOXYGEN__)
-#define STM32_UART_USE_USART1 TRUE
-#endif
-
-/**
- * @brief UART driver on USART2 enable switch.
- * @details If set to @p TRUE the support for USART2 is included.
- * @note The default is @p FALSE.
- */
-#if !defined(STM32_UART_USE_USART2) || defined(__DOXYGEN__)
-#define STM32_UART_USE_USART2 TRUE
-#endif
-
-/**
- * @brief UART driver on USART3 enable switch.
- * @details If set to @p TRUE the support for USART3 is included.
- * @note The default is @p FALSE.
- */
-#if !defined(STM32_UART_USE_USART3) || defined(__DOXYGEN__)
-#define STM32_UART_USE_USART3 TRUE
-#endif
-
-/**
- * @brief USART1 interrupt priority level setting.
- */
-#if !defined(STM32_UART_USART1_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_UART_USART1_IRQ_PRIORITY 12
-#endif
-
-/**
- * @brief USART2 interrupt priority level setting.
- */
-#if !defined(STM32_UART_USART2_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_UART_USART2_IRQ_PRIORITY 12
-#endif
-
-/**
- * @brief USART3 interrupt priority level setting.
- */
-#if !defined(STM32_UART_USART3_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_UART_USART3_IRQ_PRIORITY 12
-#endif
-
-/**
- * @brief USART1 DMA priority (0..3|lowest..highest).
- * @note The priority level is used for both the TX and RX DMA channels but
- * because of the channels ordering the RX channel has always priority
- * over the TX channel.
- */
-#if !defined(STM32_UART_USART1_DMA_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_UART_USART1_DMA_PRIORITY 0
-#endif
-
-/**
- * @brief USART2 DMA priority (0..3|lowest..highest).
- * @note The priority level is used for both the TX and RX DMA channels but
- * because of the channels ordering the RX channel has always priority
- * over the TX channel.
- */
-#if !defined(STM32_UART_USART2_DMA_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_UART_USART2_DMA_PRIORITY 0
-#endif
-/**
- * @brief USART3 DMA priority (0..3|lowest..highest).
- * @note The priority level is used for both the TX and RX DMA channels but
- * because of the channels ordering the RX channel has always priority
- * over the TX channel.
- */
-#if !defined(STM32_UART_USART3_DMA_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_UART_USART3_DMA_PRIORITY 0
-#endif
-
-/**
- * @brief USART1 DMA error hook.
- * @note The default action for DMA errors is a system halt because DMA
- * error can only happen because programming errors.
- */
-#if !defined(STM32_UART_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
-#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt()
-#endif
-
-/*===========================================================================*/
-/* Derived constants and error checks. */
-/*===========================================================================*/
-
-#if STM32_UART_USE_USART1 && !STM32_HAS_USART1
-#error "USART1 not present in the selected device"
-#endif
-
-#if STM32_UART_USE_USART2 && !STM32_HAS_USART2
-#error "USART2 not present in the selected device"
-#endif
-
-#if STM32_UART_USE_USART3 && !STM32_HAS_USART3
-#error "USART3 not present in the selected device"
-#endif
-
-#if !STM32_UART_USE_USART1 && !STM32_UART_USE_USART2 && \
- !STM32_UART_USE_USART3
-#error "UART driver activated but no USART/UART peripheral assigned"
-#endif
-
-#if !defined(STM32_DMA_REQUIRED)
-#define STM32_DMA_REQUIRED
-#endif
-
-/*===========================================================================*/
-/* Driver data structures and types. */
-/*===========================================================================*/
-
-/**
- * @brief UART driver condition flags type.
- */
-typedef uint32_t uartflags_t;
-
-/**
- * @brief Structure representing an UART driver.
- */
-typedef struct UARTDriver UARTDriver;
-
-/**
- * @brief Generic UART notification callback type.
- *
- * @param[in] uartp pointer to the @p UARTDriver object
- */
-typedef void (*uartcb_t)(UARTDriver *uartp);
-
-/**
- * @brief Character received UART notification callback type.
- *
- * @param[in] uartp pointer to the @p UARTDriver object
- * @param[in] c received character
- */
-typedef void (*uartccb_t)(UARTDriver *uartp, uint16_t c);
-
-/**
- * @brief Receive error UART notification callback type.
- *
- * @param[in] uartp pointer to the @p UARTDriver object
- * @param[in] e receive error mask
- */
-typedef void (*uartecb_t)(UARTDriver *uartp, uartflags_t e);
-
-/**
- * @brief Driver configuration structure.
- * @note It could be empty on some architectures.
- */
-typedef struct {
- /**
- * @brief End of transmission buffer callback.
- */
- uartcb_t txend1_cb;
- /**
- * @brief Physical end of transmission callback.
- */
- uartcb_t txend2_cb;
- /**
- * @brief Receive buffer filled callback.
- */
- uartcb_t rxend_cb;
- /**
- * @brief Character received while out if the @p UART_RECEIVE state.
- */
- uartccb_t rxchar_cb;
- /**
- * @brief Receive error callback.
- */
- uartecb_t rxerr_cb;
- /* End of the mandatory fields.*/
- /**
- * @brief Bit rate.
- */
- uint32_t speed;
- /**
- * @brief Initialization value for the CR1 register.
- */
- uint16_t cr1;
- /**
- * @brief Initialization value for the CR2 register.
- */
- uint16_t cr2;
- /**
- * @brief Initialization value for the CR3 register.
- */
- uint16_t cr3;
-} UARTConfig;
-
-/**
- * @brief Structure representing an UART driver.
- */
-struct UARTDriver {
- /**
- * @brief Driver state.
- */
- uartstate_t state;
- /**
- * @brief Transmitter state.
- */
- uarttxstate_t txstate;
- /**
- * @brief Receiver state.
- */
- uartrxstate_t rxstate;
- /**
- * @brief Current configuration data.
- */
- const UARTConfig *config;
-#if defined(UART_DRIVER_EXT_FIELDS)
- UART_DRIVER_EXT_FIELDS
-#endif
- /* End of the mandatory fields.*/
- /**
- * @brief Pointer to the USART registers block.
- */
- USART_TypeDef *usart;
- /**
- * @brief DMA mode bit mask.
- */
- uint32_t dmamode;
- /**
- * @brief Receive DMA channel.
- */
- const stm32_dma_stream_t *dmarx;
- /**
- * @brief Transmit DMA channel.
- */
- const stm32_dma_stream_t *dmatx;
- /**
- * @brief Default receive buffer while into @p UART_RX_IDLE state.
- */
- volatile uint16_t rxbuf;
-};
-
-/*===========================================================================*/
-/* Driver macros. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* External declarations. */
-/*===========================================================================*/
-
-#if STM32_UART_USE_USART1 && !defined(__DOXYGEN__)
-extern UARTDriver UARTD1;
-#endif
-
-#if STM32_UART_USE_USART2 && !defined(__DOXYGEN__)
-extern UARTDriver UARTD2;
-#endif
-
-#if STM32_UART_USE_USART3 && !defined(__DOXYGEN__)
-extern UARTDriver UARTD3;
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void uart_lld_init(void);
- void uart_lld_start(UARTDriver *uartp);
- void uart_lld_stop(UARTDriver *uartp);
- void uart_lld_start_send(UARTDriver *uartp, size_t n, const void *txbuf);
- size_t uart_lld_stop_send(UARTDriver *uartp);
- void uart_lld_start_receive(UARTDriver *uartp, size_t n, void *rxbuf);
- size_t uart_lld_stop_receive(UARTDriver *uartp);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* HAL_USE_UART */
-
-#endif /* _UART_LLD_H_ */
-
-/** @} */
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