diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-03-27 14:33:06 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-03-27 14:33:06 +0000 |
| commit | ee1eb360863b0dc94fc4a19587d001747c5fb8d5 (patch) | |
| tree | a0fc538f7dd3795450f3ea1403f0ff75c0f349b2 /os/hal/platforms/SPC5xx | |
| parent | 0a69d7dd419e1d0925c02a7b621e72e44d8c25bb (diff) | |
| download | ChibiOS-ee1eb360863b0dc94fc4a19587d001747c5fb8d5.tar.gz ChibiOS-ee1eb360863b0dc94fc4a19587d001747c5fb8d5.tar.bz2 ChibiOS-ee1eb360863b0dc94fc4a19587d001747c5fb8d5.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5509 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/SPC5xx')
| -rw-r--r-- | os/hal/platforms/SPC5xx/EQADC_v1/adc_lld.h | 8 | ||||
| -rw-r--r-- | os/hal/platforms/SPC5xx/FlexPWM_v1/pwm_lld.h | 8 |
2 files changed, 8 insertions, 8 deletions
diff --git a/os/hal/platforms/SPC5xx/EQADC_v1/adc_lld.h b/os/hal/platforms/SPC5xx/EQADC_v1/adc_lld.h index 9ad820ee4..faffc6394 100644 --- a/os/hal/platforms/SPC5xx/EQADC_v1/adc_lld.h +++ b/os/hal/platforms/SPC5xx/EQADC_v1/adc_lld.h @@ -458,11 +458,11 @@ #error "EQADC not present in the selected device"
#endif
-#define SPC5_ADC_USE_ADC0 (SPC5_ADC_USE_ADC0_Q0 | \
- SPC5_ADC_USE_ADC0_Q1 | \
+#define SPC5_ADC_USE_ADC0 (SPC5_ADC_USE_ADC0_Q0 || \
+ SPC5_ADC_USE_ADC0_Q1 || \
SPC5_ADC_USE_ADC0_Q2)
-#define SPC5_ADC_USE_ADC1 (SPC5_ADC_USE_ADC1_Q3 | \
- SPC5_ADC_USE_ADC1_Q4 | \
+#define SPC5_ADC_USE_ADC1 (SPC5_ADC_USE_ADC1_Q3 || \
+ SPC5_ADC_USE_ADC1_Q4 || \
SPC5_ADC_USE_ADC1_Q5)
#if !SPC5_ADC_USE_ADC0 && !SPC5_ADC_USE_ADC1
diff --git a/os/hal/platforms/SPC5xx/FlexPWM_v1/pwm_lld.h b/os/hal/platforms/SPC5xx/FlexPWM_v1/pwm_lld.h index 042102977..207f314d3 100644 --- a/os/hal/platforms/SPC5xx/FlexPWM_v1/pwm_lld.h +++ b/os/hal/platforms/SPC5xx/FlexPWM_v1/pwm_lld.h @@ -240,28 +240,28 @@ * @brief PWMD5 interrupt priority level setting.
*/
#if !defined(SPC5_PWM_SMOD4_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_PWM_SMOD4_PRIORITY 7
+#define SPC5_PWM_SMOD4_PRIORITY 7
#endif
/**
* @brief PWMD6 interrupt priority level setting.
*/
#if !defined(SPC5_PWM_SMOD5_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_PWM_SMOD5_PRIORITY 7
+#define SPC5_PWM_SMOD5_PRIORITY 7
#endif
/**
* @brief PWMD7 interrupt priority level setting.
*/
#if !defined(SPC5_PWM_SMOD6_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_PWM_SMOD6_PRIORITY 7
+#define SPC5_PWM_SMOD6_PRIORITY 7
#endif
/**
* @brief PWMD8 interrupt priority level setting.
*/
#if !defined(SPC5_PWM_SMOD7_PRIORITY) || defined(__DOXYGEN__)
-#define SPC5_PWM_SMOD7_PRIORITY 7
+#define SPC5_PWM_SMOD7_PRIORITY 7
#endif
/**
|