DSPI changes for SPC56ELxx.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5838 35acf78f-673a-0410-8e92-d51de3d6d3f4

1 files changed, 15 insertions, 45 deletions

diff --git a/os/hal/platforms/SPC5xx/DSPI_v1/spi_lld.c b/os/hal/platforms/SPC5xx/DSPI_v1/spi_lld.c
index d159698a4..ad0e48115 100644
--- a/os/hal/platforms/SPC5xx/DSPI_v1/spi_lld.c
+++ b/os/hal/platforms/SPC5xx/DSPI_v1/spi_lld.c
@@ -775,50 +775,65 @@ void spi_lld_init(void) {
 #if SPC5_SPI_USE_DSPI0

   /* Driver initialization.*/

   spiObjectInit(&SPID1);

+  SPC5_DSPI0_ENABLE_CLOCK();

   SPID1.dspi = &SPC5_DSPI0;

   SPID1.tx1_channel = EDMA_ERROR;

   SPID1.tx2_channel = EDMA_ERROR;

   SPID1.rx_channel  = EDMA_ERROR;

+  SPC5_DSPI0.MCR.R  = SPC5_MCR_MSTR | SPC5_MCR_HALT | SPC5_MCR_MDIS |

+                      SPC5_SPI_DSPI0_MCR;

   INTC.PSR[SPC5_DSPI0_TFFF_NUMBER].R = SPC5_SPI_DSPI0_IRQ_PRIO;

 #endif /* SPC5_SPI_USE_DSPI0 */

 

 #if SPC5_SPI_USE_DSPI1

   /* Driver initialization.*/

+  SPC5_DSPI1_ENABLE_CLOCK();

   spiObjectInit(&SPID2);

   SPID2.dspi = &SPC5_DSPI1;

   SPID2.tx1_channel = EDMA_ERROR;

   SPID2.tx2_channel = EDMA_ERROR;

   SPID2.rx_channel  = EDMA_ERROR;

+  SPC5_DSPI1.MCR.R  = SPC5_MCR_MSTR | SPC5_MCR_HALT | SPC5_MCR_MDIS |

+                      SPC5_SPI_DSPI1_MCR;

   INTC.PSR[SPC5_DSPI1_TFFF_NUMBER].R = SPC5_SPI_DSPI1_IRQ_PRIO;

 #endif /* SPC5_SPI_USE_DSPI1 */

 

 #if SPC5_SPI_USE_DSPI2

   /* Driver initialization.*/

   spiObjectInit(&SPID3);

+  SPC5_DSPI2_ENABLE_CLOCK();

   SPID3.dspi = &SPC5_DSPI2;

   SPID3.tx1_channel = EDMA_ERROR;

   SPID3.tx2_channel = EDMA_ERROR;

   SPID3.rx_channel  = EDMA_ERROR;

+  SPC5_DSPI2.MCR.R  = SPC5_MCR_MSTR | SPC5_MCR_HALT | SPC5_MCR_MDIS |

+                      SPC5_SPI_DSPI2_MCR;

   INTC.PSR[SPC5_DSPI2_TFFF_NUMBER].R = SPC5_SPI_DSPI2_IRQ_PRIO;

 #endif /* SPC5_SPI_USE_DSPI2 */

 

 #if SPC5_SPI_USE_DSPI3

   /* Driver initialization.*/

   spiObjectInit(&SPID4);

+  SPC5_DSPI3_ENABLE_CLOCK();

   SPID4.dspi = &SPC5_DSPI3;

   SPID4.tx1_channel = EDMA_ERROR;

   SPID4.tx2_channel = EDMA_ERROR;

   SPID4.rx_channel  = EDMA_ERROR;

+  SPC5_DSPI3.MCR.R  = SPC5_MCR_MSTR | SPC5_MCR_HALT | SPC5_MCR_MDIS |

+                      SPC5_SPI_DSPI3_MCR;

   INTC.PSR[SPC5_DSPI3_TFFF_NUMBER].R = SPC5_SPI_DSPI3_IRQ_PRIO;

 #endif /* SPC5_SPI_USE_DSPI3 */

 

 #if SPC5_SPI_USE_DSPI4

   /* Driver initialization.*/

   spiObjectInit(&SPID5);

+  SPC5_DSPI4_ENABLE_CLOCK();

   SPID5.dspi = &SPC5_DSPI4;

   SPID5.tx1_channel = EDMA_ERROR;

   SPID5.tx2_channel = EDMA_ERROR;

   SPID5.rx_channel  = EDMA_ERROR;

+  SPC5_DSPI4.MCR.R  = SPC5_MCR_MSTR | SPC5_MCR_HALT | SPC5_MCR_MDIS |

+                      SPC5_SPI_DSPI4_MCR;

   INTC.PSR[SPC5_DSPI4_TFFF_NUMBER].R = SPC5_SPI_DSPI4_IRQ_PRIO;

 #endif /* SPC5_SPI_USE_DSPI4 */

 }

@@ -840,56 +855,41 @@ void spi_lld_start(SPIDriver *spip) {
 

 #if SPC5_SPI_USE_DSPI0

     if (&SPID1 == spip) {

-      SPC5_DSPI0_ENABLE_CLOCK();

       spip->tx1_channel = edmaChannelAllocate(&spi_dspi0_tx1_dma_config);

       spip->tx2_channel = edmaChannelAllocate(&spi_dspi0_tx2_dma_config);

       spip->rx_channel = edmaChannelAllocate(&spi_dspi0_rx_dma_config);

-      SPC5_DSPI0.MCR.R  = SPC5_MCR_MSTR | SPC5_MCR_HALT | SPC5_MCR_MDIS |

-                          SPC5_SPI_DSPI0_MCR;

     }

 #endif /* SPC5_SPI_USE_DSPI0 */

 

 #if SPC5_SPI_USE_DSPI1

     if (&SPID2 == spip) {

-      SPC5_DSPI1_ENABLE_CLOCK();

       spip->tx1_channel = edmaChannelAllocate(&spi_dspi1_tx1_dma_config);

       spip->tx2_channel = edmaChannelAllocate(&spi_dspi1_tx2_dma_config);

       spip->rx_channel = edmaChannelAllocate(&spi_dspi1_rx_dma_config);

-      SPC5_DSPI1.MCR.R  = SPC5_MCR_MSTR | SPC5_MCR_HALT | SPC5_MCR_MDIS |

-                          SPC5_SPI_DSPI1_MCR;

     }

 #endif /* SPC5_SPI_USE_DSPI1 */

 

 #if SPC5_SPI_USE_DSPI2

     if (&SPID3 == spip) {

-      SPC5_DSPI2_ENABLE_CLOCK();

       spip->tx1_channel = edmaChannelAllocate(&spi_dspi2_tx1_dma_config);

       spip->tx2_channel = edmaChannelAllocate(&spi_dspi2_tx2_dma_config);

       spip->rx_channel = edmaChannelAllocate(&spi_dspi2_rx_dma_config);

-      SPC5_DSPI2.MCR.R  = SPC5_MCR_MSTR | SPC5_MCR_HALT | SPC5_MCR_MDIS |

-                          SPC5_SPI_DSPI2_MCR;

     }

 #endif /* SPC5_SPI_USE_DSPI2 */

 

 #if SPC5_SPI_USE_DSPI3

     if (&SPID4 == spip) {

-      SPC5_DSPI3_ENABLE_CLOCK();

       spip->tx1_channel = edmaChannelAllocate(&spi_dspi3_tx1_dma_config);

       spip->tx2_channel = edmaChannelAllocate(&spi_dspi3_tx2_dma_config);

       spip->rx_channel = edmaChannelAllocate(&spi_dspi3_rx_dma_config);

-      SPC5_DSPI3.MCR.R  = SPC5_MCR_MSTR | SPC5_MCR_HALT | SPC5_MCR_MDIS |

-                          SPC5_SPI_DSPI3_MCR;

     }

 #endif /* SPC5_SPI_USE_DSPI3 */

 

 #if SPC5_SPI_USE_DSPI4

     if (&SPID5 == spip) {

-      SPC5_DSPI4_ENABLE_CLOCK();

       spip->tx1_channel = edmaChannelAllocate(&spi_dspi4_tx1_dma_config);

       spip->tx2_channel = edmaChannelAllocate(&spi_dspi4_tx2_dma_config);

       spip->rx_channel = edmaChannelAllocate(&spi_dspi4_rx_dma_config);

-      SPC5_DSPI4.MCR.R  = SPC5_MCR_MSTR | SPC5_MCR_HALT | SPC5_MCR_MDIS |

-                          SPC5_SPI_DSPI4_MCR;

     }

 #endif /* SPC5_SPI_USE_DSPI5 */

 

@@ -929,36 +929,6 @@ void spi_lld_stop(SPIDriver *spip) {
     spip->dspi->MCR.R     |= SPC5_MCR_HALT |

                              SPC5_MCR_CLR_TXF | SPC5_MCR_CLR_RXF;

     spip->dspi->MCR.B.MDIS = 1;

-

-#if SPC5_SPI_USE_DSPI0

-    if (&SPID1 == spip) {

-      SPC5_DSPI0_DISABLE_CLOCK();

-    }

-#endif /* SPC5_SPI_USE_DSPI0 */

-

-#if SPC5_SPI_USE_DSPI1

-    if (&SPID2 == spip) {

-      SPC5_DSPI1_DISABLE_CLOCK();

-    }

-#endif /* SPC5_SPI_USE_DSPI1 */

-

-#if SPC5_SPI_USE_DSPI2

-    if (&SPID3 == spip) {

-      SPC5_DSPI2_DISABLE_CLOCK();

-    }

-#endif /* SPC5_SPI_USE_DSPI2 */

-

-#if SPC5_SPI_USE_DSPI3

-    if (&SPID4 == spip) {

-      SPC5_DSPI3_DISABLE_CLOCK();

-    }

-#endif /* SPC5_SPI_USE_DSPI3 */

-

-#if SPC5_SPI_USE_DSPI4

-    if (&SPID5 == spip) {

-      SPC5_DSPI4_DISABLE_CLOCK();

-    }

-#endif /* SPC5_SPI_USE_DSPI4 */

   }

 }