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| author | acirillo87 <acirillo87@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-03-05 15:22:07 +0000 |
|---|---|---|
| committer | acirillo87 <acirillo87@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-03-05 15:22:07 +0000 |
| commit | ac49c69ca3c062801c55a5bafc705157918f7b6e (patch) | |
| tree | 8e3f9d202fa08acb7cd9c469ad63dd2348217a4f /os/hal/platforms/SPC560Pxx | |
| parent | ca86954570104380214d3f64800e90fde09b9623 (diff) | |
| download | ChibiOS-ac49c69ca3c062801c55a5bafc705157918f7b6e.tar.gz ChibiOS-ac49c69ca3c062801c55a5bafc705157918f7b6e.tar.bz2 ChibiOS-ac49c69ca3c062801c55a5bafc705157918f7b6e.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5361 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/SPC560Pxx')
| -rw-r--r-- | os/hal/platforms/SPC560Pxx/spc560p_registry.h | 78 |
1 files changed, 77 insertions, 1 deletions
diff --git a/os/hal/platforms/SPC560Pxx/spc560p_registry.h b/os/hal/platforms/SPC560Pxx/spc560p_registry.h index 576db76f5..6a39541a6 100644 --- a/os/hal/platforms/SPC560Pxx/spc560p_registry.h +++ b/os/hal/platforms/SPC560Pxx/spc560p_registry.h @@ -61,7 +61,83 @@ #define SPC5_SIUL_NUM_PORTS 8
#define SPC5_SIUL_NUM_PCRS 108
#define SPC5_SIUL_NUM_PADSELS 36
-/** @} */
+
+/* FlexPWM attributes.*/
+#define SPC5_HAS_FLEXPWM0 TRUE
+#define SPC5_FLEXPWM0_CLK_SOURCE SPC5_MCONTROL_CLK
+#define SPC5_FLEXPWM0_PCTL 41
+#define SPC5_FLEXPWM0_RF0_HANDLER vector179
+#define SPC5_FLEXPWM0_COF0_HANDLER vector180
+#define SPC5_FLEXPWM0_CAF0_HANDLER vector181
+#define SPC5_FLEXPWM0_RF1_HANDLER vector182
+#define SPC5_FLEXPWM0_COF1_HANDLER vector183
+#define SPC5_FLEXPWM0_CAF1_HANDLER vector184
+#define SPC5_FLEXPWM0_RF2_HANDLER vector185
+#define SPC5_FLEXPWM0_COF2_HANDLER vector186
+#define SPC5_FLEXPWM0_CAF2_HANDLER vector187
+#define SPC5_FLEXPWM0_RF3_HANDLER vector188
+#define SPC5_FLEXPWM0_COF3_HANDLER vector189
+#define SPC5_FLEXPWM0_CAF3_HANDLER vector190
+#define SPC5_FLEXPWM0_FFLAG_HANDLER vector191
+#define SPC5_FLEXPWM0_REF_HANDLER vector192
+#define SPC5_FLEXPWM0_RF0_NUMBER 179
+#define SPC5_FLEXPWM0_COF0_NUMBER 180
+#define SPC5_FLEXPWM0_CAF0_NUMBER 181
+#define SPC5_FLEXPWM0_RF1_NUMBER 182
+#define SPC5_FLEXPWM0_COF1_NUMBER 183
+#define SPC5_FLEXPWM0_CAF1_NUMBER 184
+#define SPC5_FLEXPWM0_RF2_NUMBER 185
+#define SPC5_FLEXPWM0_COF2_NUMBER 186
+#define SPC5_FLEXPWM0_CAF2_NUMBER 187
+#define SPC5_FLEXPWM0_RF3_NUMBER 188
+#define SPC5_FLEXPWM0_COF3_NUMBER 189
+#define SPC5_FLEXPWM0_CAF3_NUMBER 190
+#define SPC5_FLEXPWM0_FFLAG_NUMBER 191
+#define SPC5_FLEXPWM0_REF_NUMBER 192
+#define SPC5_FLEXPWM0_CLK SPC5_FLEXPWM0_CLK_SOURCE
+
+#define SPC5_HAS_FLEXPWM1 FALSE
+
+/* eTimer attributes.*/
+#define SPC5_HAS_ETIMER0 TRUE
+#define SPC5_ETIMER0_CLK_SOURCE SPC5_MCONTROL_CLK
+#define SPC5_ETIMER0_PCTL 38
+#define SPC5_ETIMER0_TC0IR_HANDLER vector157
+#define SPC5_ETIMER0_TC1IR_HANDLER vector158
+#define SPC5_ETIMER0_TC2IR_HANDLER vector159
+#define SPC5_ETIMER0_TC3IR_HANDLER vector160
+#define SPC5_ETIMER0_TC4IR_HANDLER vector161
+#define SPC5_ETIMER0_TC5IR_HANDLER vector162
+#define SPC5_ETIMER0_WTIF_HANDLER vector165
+#define SPC5_ETIMER0_RCF_HANDLER vector167
+#define SPC5_ETIMER0_TC0IR_NUMBER 157
+#define SPC5_ETIMER0_TC1IR_NUMBER 158
+#define SPC5_ETIMER0_TC2IR_NUMBER 159
+#define SPC5_ETIMER0_TC3IR_NUMBER 160
+#define SPC5_ETIMER0_TC4IR_NUMBER 161
+#define SPC5_ETIMER0_TC5IR_NUMBER 162
+#define SPC5_ETIMER0_WTIF_NUMBER 165
+#define SPC5_ETIMER0_RCF_NUMBER 167
+#define SPC5_ETIMER0_CLK SPC5_ETIMER0_CLK_SOURCE
+
+#define SPC5_HAS_ETIMER1 TRUE
+#define SPC5_ETIMER1_CLK_SOURCE SPC5_MCONTROL_CLK
+#define SPC5_ETIMER1_PCTL 39
+#define SPC5_ETIMER1_TC0IR_HANDLER vector168
+#define SPC5_ETIMER1_TC1IR_HANDLER vector169
+#define SPC5_ETIMER1_TC2IR_HANDLER vector170
+#define SPC5_ETIMER1_TC3IR_HANDLER vector171
+#define SPC5_ETIMER1_TC4IR_HANDLER vector172
+#define SPC5_ETIMER1_TC5IR_HANDLER vector173
+#define SPC5_ETIMER1_RCF_HANDLER vector178
+#define SPC5_ETIMER1_TC0IR_NUMBER 168
+#define SPC5_ETIMER1_TC1IR_NUMBER 169
+#define SPC5_ETIMER1_TC2IR_NUMBER 170
+#define SPC5_ETIMER1_TC3IR_NUMBER 171
+#define SPC5_ETIMER1_TC4IR_NUMBER 172
+#define SPC5_ETIMER1_TC5IR_NUMBER 173
+#define SPC5_ETIMER1_RCF_NUMBER 178
+#define SPC5_ETIMER1_CLK SPC5_ETIMER1_CLK_SOURCE
#endif /* _SPC560P_REGISTRY_H_ */
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