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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2012-11-10 08:32:19 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2012-11-10 08:32:19 +0000
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parentd672c60a80d0a00473a4c86fe5ab44f34730b36f (diff)
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+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @defgroup MSP430_DRIVERS MSP430 Drivers
+ * @details This section describes all the supported drivers on the MSP430
+ * platform and the implementation details of the single drivers.
+ *
+ * @ingroup platforms
+ */
+
+/**
+ * @defgroup MSP430_HAL MSP430 Initialization Support
+ * @details The MSP430 HAL support is responsible for system initialization.
+ *
+ * @section msp430_hal_1 Supported HW resources
+ * - DCOCTL.
+ * - BCSCTL1.
+ * - BCSCTL2.
+ * .
+ * @section msp430_hal_2 MSP430 HAL driver implementation features
+ * - Clock source selection.
+ * .
+ * @ingroup MSP430_DRIVERS
+ */
+
+/**
+ * @defgroup MSP430_PAL MSP430 PAL Support
+ * @details The MSP430 PAL driver uses the PORT peripherals.
+ *
+ * @section msp430_pal_1 Supported HW resources
+ * - PORT1 (where present).
+ * - PORT2 (where present).
+ * - PORT3 (where present).
+ * - PORT4 (where present).
+ * - PORT5 (where present).
+ * - PORT6 (where present).
+ * - PORT7 (where present).
+ * - PORT8 (where present).
+ * - PORT9 (where present).
+ * - PORT10 (where present).
+ * - PORT11 (where present).
+ * - PORT12 (PORT_J) (where present).
+ * .
+ * @section msp430_pal_2 MSP430 PAL driver implementation features
+ * The PAL driver implementation fully supports the following hardware
+ * capabilities:
+ * - 8 bits wide ports.
+ * - Atomic set/reset/toggle functions because special MSP430 instruction set.
+ * - Output latched regardless of the pad setting.
+ * - Direct read of input pads regardless of the pad setting.
+ * .
+ * @section msp430_pal_3 Supported PAL setup modes
+ * The MSP430 PAL driver supports the following I/O modes:
+ * - @p PAL_MODE_RESET.
+ * - @p PAL_MODE_UNCONNECTED.
+ * - @p PAL_MODE_INPUT.
+ * - @p PAL_MODE_OUTPUT_PUSHPULL.
+ * .
+ * Any attempt to setup an invalid mode is ignored.
+ *
+ * @section msp430_pal_4 Suboptimal behavior
+ * The MSP430 PORT is less than optimal in several areas, the limitations
+ * should be taken in account while using the PAL driver:
+ * - Bus/group writes is not atomic.
+ * - Pad/group mode setup is not atomic.
+ * .
+ * @ingroup MSP430_DRIVERS
+ */
+
+/**
+ * @defgroup MSP430_SERIAL MSP430 Serial Support
+ * @details The MSP430 Serial driver uses the USART peripherals in a
+ * buffered, interrupt driven, implementation.
+ *
+ * @section msp430_serial_1 Supported HW resources
+ * The serial driver can support any of the following hardware resources:
+ * - USART0.
+ * - USART1.
+ * .
+ * @section msp430_serial_2 MSP430 Serial driver implementation features
+ * - Each USART can be independently enabled and programmed.
+ * - Fully interrupt driven.
+ * .
+ * @ingroup MSP430_DRIVERS
+ */