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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2010-10-27 19:36:41 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2010-10-27 19:36:41 +0000
commitaf2c001a10015894ee2bb76cbe8f9ed306aaeffe (patch)
treeb161c3c011f178235900c547701b003cece58615 /os/hal/platforms/LPC13xx
parent26e74eaef131c77b6299a430af58f5c583cd6cba (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2297 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/LPC13xx')
-rw-r--r--os/hal/platforms/LPC13xx/hal_lld.c3
-rw-r--r--os/hal/platforms/LPC13xx/hal_lld.h13
-rw-r--r--os/hal/platforms/LPC13xx/pal_lld.c2
-rw-r--r--os/hal/platforms/LPC13xx/platform.mk1
-rw-r--r--os/hal/platforms/LPC13xx/serial_lld.c24
-rw-r--r--os/hal/platforms/LPC13xx/serial_lld.h35
6 files changed, 41 insertions, 37 deletions
diff --git a/os/hal/platforms/LPC13xx/hal_lld.c b/os/hal/platforms/LPC13xx/hal_lld.c
index 33d5f2f11..21d17ab42 100644
--- a/os/hal/platforms/LPC13xx/hal_lld.c
+++ b/os/hal/platforms/LPC13xx/hal_lld.c
@@ -127,9 +127,6 @@ void LPC13xx_clock_init(void) {
LPC_SYSCON->SYSAHBCLKDIV = LPC13xx_SYSABHCLK_DIV;
LPC_SYSCON->SYSAHBCLKCTRL = 0x0001005F;
- /* Peripheral clock dividers initialization.*/
- LPC_SYSCON->UARTCLKDIV = LPC13xx_UART_PCLK_DIV;
-
/* Memory remapping, vectors always in ROM.*/
LPC_SYSCON->SYSMEMREMAP = 2;
}
diff --git a/os/hal/platforms/LPC13xx/hal_lld.h b/os/hal/platforms/LPC13xx/hal_lld.h
index 63f1c6110..da44b5012 100644
--- a/os/hal/platforms/LPC13xx/hal_lld.h
+++ b/os/hal/platforms/LPC13xx/hal_lld.h
@@ -96,14 +96,6 @@
#define LPC13xx_SYSABHCLK_DIV 1
#endif
-/**
- * @brief UART clock divider.
- * @note The value must be chosen between (1...255).
- */
-#if !defined(LPC13xx_UART_PCLK_DIV) || defined(__DOXYGEN__)
-#define LPC13xx_UART_PCLK_DIV 1
-#endif
-
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
@@ -199,11 +191,6 @@
#define LPC13xx_FLASHCFG_FLASHTIM 2
#endif
-/**
- * @brief UART clock.
- */
-#define LPC13xx_UART_PCLK (LPC13xx_MAINCLK / LPC13xx_UART_PCLK_DIV)
-
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
diff --git a/os/hal/platforms/LPC13xx/pal_lld.c b/os/hal/platforms/LPC13xx/pal_lld.c
index d0f9ca3e5..9a0a7fa91 100644
--- a/os/hal/platforms/LPC13xx/pal_lld.c
+++ b/os/hal/platforms/LPC13xx/pal_lld.c
@@ -53,7 +53,7 @@
* @brief LPC13xx I/O ports configuration.
* @details GPIO unit registers initialization.
*
- * @param[in] config the LPC13xx ports configuration
+ * @param[in] config the LPC13xx ports configuration
*
* @notapi
*/
diff --git a/os/hal/platforms/LPC13xx/platform.mk b/os/hal/platforms/LPC13xx/platform.mk
index 59f25ae64..150e2126e 100644
--- a/os/hal/platforms/LPC13xx/platform.mk
+++ b/os/hal/platforms/LPC13xx/platform.mk
@@ -2,6 +2,7 @@
PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/LPC13xx/hal_lld.c \
${CHIBIOS}/os/hal/platforms/LPC13xx/pal_lld.c \
${CHIBIOS}/os/hal/platforms/LPC13xx/serial_lld.c
+ ${CHIBIOS}/os/hal/platforms/LPC13xx/spi_lld.c
# Required include directories
PLATFORMINC = ${CHIBIOS}/os/hal/platforms/LPC13xx
diff --git a/os/hal/platforms/LPC13xx/serial_lld.c b/os/hal/platforms/LPC13xx/serial_lld.c
index 6e186efc5..1da872eac 100644
--- a/os/hal/platforms/LPC13xx/serial_lld.c
+++ b/os/hal/platforms/LPC13xx/serial_lld.c
@@ -34,7 +34,7 @@
/* Driver exported variables. */
/*===========================================================================*/
-#if USE_LPC13xx_UART0 || defined(__DOXYGEN__)
+#if LPC13xx_SERIAL_USE_UART0 || defined(__DOXYGEN__)
/** @brief UART0 serial driver identifier.*/
SerialDriver SD1;
#endif
@@ -63,7 +63,7 @@ static const SerialConfig default_config = {
static void uart_init(SerialDriver *sdp, const SerialConfig *config) {
LPC_UART_TypeDef *u = sdp->uart;
- uint32_t div = LPC13xx_UART_PCLK / (config->sc_speed << 4);
+ uint32_t div = LPC13xx_SERIAL_UART0_PCLK / (config->sc_speed << 4);
u->LCR = config->sc_lcr | LCR_DLAB;
u->DLL = div;
u->DLM = div >> 8;
@@ -149,7 +149,7 @@ static void serve_interrupt(SerialDriver *sdp) {
break;
case IIR_SRC_TX:
{
- int i = LPC13xx_UART_FIFO_PRELOAD;
+ int i = LPC13xx_SERIAL_FIFO_PRELOAD;
do {
msg_t b;
@@ -181,7 +181,7 @@ static void preload(SerialDriver *sdp) {
LPC_UART_TypeDef *u = sdp->uart;
if (u->LSR & LSR_THRE) {
- int i = LPC13xx_UART_FIFO_PRELOAD;
+ int i = LPC13xx_SERIAL_FIFO_PRELOAD;
do {
msg_t b = chOQGetI(&sdp->oqueue);
if (b < Q_OK) {
@@ -197,7 +197,7 @@ static void preload(SerialDriver *sdp) {
/**
* @brief Driver SD1 output notification.
*/
-#if USE_LPC13xx_UART0 || defined(__DOXYGEN__)
+#if LPC13xx_SERIAL_USE_UART0 || defined(__DOXYGEN__)
static void notify1(void) {
preload(&SD1);
@@ -213,8 +213,8 @@ static void notify1(void) {
*
* @isr
*/
-#if USE_LPC13xx_UART0 || defined(__DOXYGEN__)
-CH_IRQ_HANDLER(VectorF8) {
+#if LPC13xx_SERIAL_USE_UART0 || defined(__DOXYGEN__)
+CH_IRQ_HANDLER(Vector94) {
CH_IRQ_PROLOGUE();
@@ -235,7 +235,7 @@ CH_IRQ_HANDLER(VectorF8) {
*/
void sd_lld_init(void) {
-#if USE_LPC13xx_UART0
+#if LPC13xx_SERIAL_USE_UART0
sdObjectInit(&SD1, NULL, notify1);
SD1.uart = LPC_UART;
LPC_IOCON->PIO1_6 = 0xC1; /* RDX without resistors. */
@@ -259,11 +259,12 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
config = &default_config;
if (sdp->state == SD_STOP) {
-#if USE_LPC13xx_UART0
+#if LPC13xx_SERIAL_USE_UART0
if (&SD1 == sdp) {
LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 12);
+ LPC_SYSCON->UARTCLKDIV = LPC13xx_SERIAL_UART0CLKDIV;
NVICEnableVector(UART_IRQn,
- CORTEX_PRIORITY_MASK(LPC13xx_UART0_PRIORITY));
+ CORTEX_PRIORITY_MASK(LPC13xx_SERIAL_UART0_IRQ_PRIORITY));
}
#endif
}
@@ -283,8 +284,9 @@ void sd_lld_stop(SerialDriver *sdp) {
if (sdp->state == SD_READY) {
uart_deinit(sdp->uart);
-#if USE_LPC13xx_UART0
+#if LPC13xx_SERIAL_USE_UART0
if (&SD1 == sdp) {
+ LPC_SYSCON->UARTCLKDIV = 0;
LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 12);
NVICDisableVector(UART_IRQn);
return;
diff --git a/os/hal/platforms/LPC13xx/serial_lld.h b/os/hal/platforms/LPC13xx/serial_lld.h
index 4a4a5fa81..04eedb3e2 100644
--- a/os/hal/platforms/LPC13xx/serial_lld.h
+++ b/os/hal/platforms/LPC13xx/serial_lld.h
@@ -88,8 +88,8 @@
* @details If set to @p TRUE the support for UART0 is included.
* @note The default is @p TRUE .
*/
-#if !defined(USE_LPC13xx_UART0) || defined(__DOXYGEN__)
-#define USE_LPC13xx_UART0 TRUE
+#if !defined(LPC13xx_SERIAL_USE_UART0) || defined(__DOXYGEN__)
+#define LPC13xx_SERIAL_USE_UART0 TRUE
#endif
/**
@@ -101,25 +101,42 @@
* also increase the worst case interrupt response time because the
* preload loops.
*/
-#if !defined(LPC13xx_UART_FIFO_PRELOAD) || defined(__DOXYGEN__)
-#define LPC13xx_UART_FIFO_PRELOAD 16
+#if !defined(LPC13xx_SERIAL_FIFO_PRELOAD) || defined(__DOXYGEN__)
+#define LPC13xx_SERIAL_FIFO_PRELOAD 16
+#endif
+
+/**
+ * @brief UART0 PCLK divider.
+ */
+#if !defined(LPC13xx_SERIAL_UART0CLKDIV) || defined(__DOXYGEN__)
+#define LPC13xx_SERIAL_UART0CLKDIV 1
#endif
/**
* @brief UART0 interrupt priority level setting.
*/
-#if !defined(LPC13xx_UART0_PRIORITY) || defined(__DOXYGEN__)
-#define LPC13xx_UART0_PRIORITY 6
+#if !defined(LPC13xx_SERIAL_UART0_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define LPC13xx_SERIAL_UART0_IRQ_PRIORITY 3
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
-#if (LPC13xx_UART_FIFO_PRELOAD < 1) || (LPC13xx_UART_FIFO_PRELOAD > 16)
-#error "invalid LPC13xx_UART_FIFO_PRELOAD setting"
+#if (LPC13xx_SERIAL_UART0CLKDIV < 1) || (LPC11xx_SERIAL_UART0CLKDIV > 255)
+#error "invalid LPC13xx_SERIAL_UART0CLKDIV setting"
#endif
+#if (LPC13xx_SERIAL_FIFO_PRELOAD < 1) || (LPC13xx_SERIAL_FIFO_PRELOAD > 16)
+#error "invalid LPC13xx_SERIAL_FIFO_PRELOAD setting"
+#endif
+
+/**
+ * @brief UART0 clock.
+ */
+#define LPC13xx_SERIAL_UART0_PCLK \
+ (LPC13xx_MAINCLK / LPC13xx_SERIAL_UART0CLKDIV)
+
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
@@ -180,7 +197,7 @@ typedef struct {
/* External declarations. */
/*===========================================================================*/
-#if USE_LPC13xx_UART0 && !defined(__DOXYGEN__)
+#if LPC13xx_SERIAL_USE_UART0 && !defined(__DOXYGEN__)
extern SerialDriver SD1;
#endif